annotate intercom/g726/g726.h @ 4:26cd8f1ef0b1

import spandsp-0.0.6pre17
author Peter Meerwald <pmeerw@cosy.sbg.ac.at>
date Fri, 25 Jun 2010 15:50:58 +0200
parents 13be24d74cd2
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
2
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1 /*
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2 ============================================================================
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3 File: G726.H 28-Feb-1991 (18:00:00)
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4 ============================================================================
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
5
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
6 UGST/ITU-T G726 MODULE
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
7
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
8 GLOBAL FUNCTION PROTOTYPES
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
9
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
10 History:
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
11 28.Feb.92 v1.0 First version <simao@cpqd.br>
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
12 06.May.94 v2.0 Smart prototypes that work with many compilers <simao>
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
13 ============================================================================
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
14 */
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
15 #ifndef G726_defined
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
16 #define G726_defined 200
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
17
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
18 /* Smart function prototypes: for [ag]cc, VaxC, and [tb]cc */
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
19 #if !defined(ARGS)
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
20 #if (defined(__STDC__) || defined(VMS) || defined(__DECC) || defined(MSDOS) || defined(__MSDOS__)) || defined (__CYGWIN__) || defined (_MSC_VER)
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
21 #define ARGS(s) s
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
22 #else
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
23 #define ARGS(s) ()
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
24 #endif
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
25 #endif
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
26
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
27
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
28 /* State for G726 encoder and decoder */
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
29 typedef struct {
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
30 short sr0, sr1; /* Reconstructed signal with delays 0 and 1 */
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
31 short a1r, a2r; /* Triggered 2nd order predictor coeffs. */
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
32 short b1r; /* Triggered 6nd order predictor coeffs */
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
33 short b2r;
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
34 short b3r;
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
35 short b4r;
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
36 short b5r;
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
37 short b6r;
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
38 short dq5; /* Quantized difference signal with delays 5
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
39 * to 0 */
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
40 short dq4;
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
41 short dq3;
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
42 short dq2;
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
43 short dq1;
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
44 short dq0;
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
45 short dmsp; /* Short term average of the F(I) sequence */
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
46 short dmlp; /* Long term average of the F(I) sequence */
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
47 short apr; /* Triggered unlimited speed control
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
48 * parameter */
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
49 short yup; /* Fast quantizer scale factor */
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
50 short tdr; /* Triggered tone detector */
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
51 short pk0, pk1; /* sign of dq+sez with delays 0 and 1 */
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
52 long ylp; /* Slow quantizer scale factor */
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
53 } G726_state;
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
54
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
55 #ifdef VAXC
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
56 # define SHORT short
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
57 #else
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
58 # define SHORT int
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
59 #endif
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
60
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
61 /* Function prototypes */
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
62 void G726_encode ARGS((unsigned char *inp_buf, short *out_buf, long smpno,
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
63 char *law, SHORT rate, SHORT r, G726_state * state));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
64 void G726_decode ARGS((short *inp_buf, unsigned char *out_buf, long smpno,
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
65 char *law, SHORT rate, SHORT r, G726_state * state));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
66 void G726_expand ARGS((short *s, char *law, short *sl));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
67 void G726_subta ARGS((short *sl, short *se, short *d));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
68 void G726_log ARGS((short *d, short *dl, short *ds));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
69 void G726_quan ARGS((SHORT rate, short *dln, short *ds, short *i));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
70 void G726_subtb ARGS((short *dl, short *y, short *dln));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
71 void G726_adda ARGS((short *dqln, short *y, short *dql));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
72 void G726_antilog ARGS((short *dql, short *dqs, short *dq));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
73 void G726_reconst ARGS((SHORT rate, short *i, short *dqln, short *dqs));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
74 void G726_delaya ARGS((short *r, short *x, short *y));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
75 void G726_delayb ARGS((short *r, short *x, short *y));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
76 void G726_delayc ARGS((short *r, long *x, long *y));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
77 void G726_delayd ARGS((short *r, short *x, short *y));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
78 void G726_filtd ARGS((short *wi, short *y, short *yut));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
79 void G726_filte ARGS((short *yup, long *yl, long *ylp));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
80 void G726_functw ARGS((SHORT rate, short *i, short *wi));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
81 void G726_limb ARGS((short *yut, short *yup));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
82 void G726_mix ARGS((short *al, short *yu, long *yl, short *y));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
83 void G726_filta ARGS((short *fi, short *dms, short *dmsp));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
84 void G726_filtb ARGS((short *fi, short *dml, short *dmlp));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
85 void G726_filtc ARGS((short *ax, short *ap, short *app));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
86 void G726_functf ARGS((SHORT rate, short *i, short *fi));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
87 void G726_lima ARGS((short *ap, short *al));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
88 void G726_subtc ARGS((short *dmsp, short *dmlp, short *tdp, short *y,
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
89 short *ax));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
90 void G726_triga ARGS((short *tr, short *app, short *apr));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
91 void G726_accum ARGS((short *wa1, short *wa2, short *wb1, short *wb2,
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
92 short *wb3, short *wb4, short *wb5, short *wb6, short *se,
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
93 short *sez));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
94 void G726_addb ARGS((short *dq, short *se, short *sr));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
95 void G726_addc ARGS((short *dq, short *sez, short *pk0, short *sigpk));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
96 void G726_floata ARGS((short *dq, short *dq0));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
97 void G726_floatb ARGS((short *sr, short *sr0));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
98 void G726_fmult ARGS((short *An, short *SRn, short *WAn));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
99 void G726_limc ARGS((short *a2t, short *a2p));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
100 void G726_limd ARGS((short *a1t, short *a2p, short *a1p));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
101 void G726_trigb ARGS((short *tr, short *ap, short *ar));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
102 void G726_upa1 ARGS((short *pk0, short *pk1, short *a1, short *sigpk,
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
103 short *a1t));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
104 void G726_upa2 ARGS((short *pk0, short *pk1, short *pk2, short *a2,
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
105 short *a1, short *sigpk, short *a2t));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
106 void G726_upb ARGS((SHORT rate, short *u, short *b, short *dq,
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
107 short *bp));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
108 void G726_xor ARGS((short *dqn, short *dq, short *u));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
109 void G726_tone ARGS((short *a2p, short *tdp));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
110 void G726_trans ARGS((short *td, long *yl, short *dq, short *tr));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
111 void G726_compress ARGS((short *sr, char *law, short *sp));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
112 void G726_sync ARGS((SHORT rate, short *i, short *sp, short *dlnx,
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
113 short *dsx, char *law, short *sd));
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
114
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
115 /* Definitions for better user interface (?!) */
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
116 #ifndef IS_LOG
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
117 # define IS_LOG 0
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
118 #endif
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
119
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
120 #ifndef IS_LIN
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
121 # define IS_LIN 1
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
122 #endif
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
123
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
124 #ifndef IS_ADPCM
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
125 # define IS_ADPCM 2
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
126 #endif
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
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127
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
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128 #endif
13be24d74cd2 import intercom-0.4.1
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
129 /* .......................... End of G726.H ........................... */

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