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comparison spandsp-0.0.3/spandsp-0.0.3/src/spandsp/mmx.h @ 5:f762bf195c4b
import spandsp-0.0.3
| author | Peter Meerwald <pmeerw@cosy.sbg.ac.at> |
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| date | Fri, 25 Jun 2010 16:00:21 +0200 |
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| 4:26cd8f1ef0b1 | 5:f762bf195c4b |
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| 1 /* | |
| 2 * mmx.h | |
| 3 * Copyright (C) 1997-2001 H. Dietz and R. Fisher | |
| 4 * | |
| 5 * This file is part of FFmpeg. | |
| 6 * | |
| 7 * FFmpeg is free software; you can redistribute it and/or | |
| 8 * modify it under the terms of the GNU Lesser General Public | |
| 9 * License as published by the Free Software Foundation; either | |
| 10 * version 2.1 of the License, or (at your option) any later version. | |
| 11 * | |
| 12 * FFmpeg is distributed in the hope that it will be useful, | |
| 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 15 * Lesser General Public License for more details. | |
| 16 * | |
| 17 * You should have received a copy of the GNU Lesser General Public | |
| 18 * License along with FFmpeg; if not, write to the Free Software | |
| 19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA | |
| 20 */ | |
| 21 #ifndef AVCODEC_I386MMX_H | |
| 22 #define AVCODEC_I386MMX_H | |
| 23 | |
| 24 /* | |
| 25 * The type of an value that fits in an MMX register (note that long | |
| 26 * long constant values MUST be suffixed by LL and unsigned long long | |
| 27 * values by ULL, lest they be truncated by the compiler) | |
| 28 */ | |
| 29 | |
| 30 typedef union { | |
| 31 long long q; /* Quadword (64-bit) value */ | |
| 32 unsigned long long uq; /* Unsigned Quadword */ | |
| 33 int d[2]; /* 2 Doubleword (32-bit) values */ | |
| 34 unsigned int ud[2]; /* 2 Unsigned Doubleword */ | |
| 35 short w[4]; /* 4 Word (16-bit) values */ | |
| 36 unsigned short uw[4]; /* 4 Unsigned Word */ | |
| 37 char b[8]; /* 8 Byte (8-bit) values */ | |
| 38 unsigned char ub[8]; /* 8 Unsigned Byte */ | |
| 39 float s[2]; /* Single-precision (32-bit) value */ | |
| 40 } mmx_t; /* On an 8-byte (64-bit) boundary */ | |
| 41 | |
| 42 /* SSE registers */ | |
| 43 typedef union { | |
| 44 char b[16]; | |
| 45 } xmm_t; | |
| 46 | |
| 47 | |
| 48 #define mmx_i2r(op,imm,reg) \ | |
| 49 __asm__ __volatile__ (#op " %0, %%" #reg \ | |
| 50 : /* nothing */ \ | |
| 51 : "i" (imm) ) | |
| 52 | |
| 53 #define mmx_m2r(op,mem,reg) \ | |
| 54 __asm__ __volatile__ (#op " %0, %%" #reg \ | |
| 55 : /* nothing */ \ | |
| 56 : "m" (mem)) | |
| 57 | |
| 58 #define mmx_r2m(op,reg,mem) \ | |
| 59 __asm__ __volatile__ (#op " %%" #reg ", %0" \ | |
| 60 : "=m" (mem) \ | |
| 61 : /* nothing */ ) | |
| 62 | |
| 63 #define mmx_r2r(op,regs,regd) \ | |
| 64 __asm__ __volatile__ (#op " %" #regs ", %" #regd) | |
| 65 | |
| 66 | |
| 67 #define emms() __asm__ __volatile__ ("emms") | |
| 68 | |
| 69 #define movd_m2r(var,reg) mmx_m2r (movd, var, reg) | |
| 70 #define movd_r2m(reg,var) mmx_r2m (movd, reg, var) | |
| 71 #define movd_r2r(regs,regd) mmx_r2r (movd, regs, regd) | |
| 72 | |
| 73 #define movq_m2r(var,reg) mmx_m2r (movq, var, reg) | |
| 74 #define movq_r2m(reg,var) mmx_r2m (movq, reg, var) | |
| 75 #define movq_r2r(regs,regd) mmx_r2r (movq, regs, regd) | |
| 76 | |
| 77 #define packssdw_m2r(var,reg) mmx_m2r (packssdw, var, reg) | |
| 78 #define packssdw_r2r(regs,regd) mmx_r2r (packssdw, regs, regd) | |
| 79 #define packsswb_m2r(var,reg) mmx_m2r (packsswb, var, reg) | |
| 80 #define packsswb_r2r(regs,regd) mmx_r2r (packsswb, regs, regd) | |
| 81 | |
| 82 #define packuswb_m2r(var,reg) mmx_m2r (packuswb, var, reg) | |
| 83 #define packuswb_r2r(regs,regd) mmx_r2r (packuswb, regs, regd) | |
| 84 | |
| 85 #define paddb_m2r(var,reg) mmx_m2r (paddb, var, reg) | |
| 86 #define paddb_r2r(regs,regd) mmx_r2r (paddb, regs, regd) | |
| 87 #define paddd_m2r(var,reg) mmx_m2r (paddd, var, reg) | |
| 88 #define paddd_r2r(regs,regd) mmx_r2r (paddd, regs, regd) | |
| 89 #define paddw_m2r(var,reg) mmx_m2r (paddw, var, reg) | |
| 90 #define paddw_r2r(regs,regd) mmx_r2r (paddw, regs, regd) | |
| 91 | |
| 92 #define paddsb_m2r(var,reg) mmx_m2r (paddsb, var, reg) | |
| 93 #define paddsb_r2r(regs,regd) mmx_r2r (paddsb, regs, regd) | |
| 94 #define paddsw_m2r(var,reg) mmx_m2r (paddsw, var, reg) | |
| 95 #define paddsw_r2r(regs,regd) mmx_r2r (paddsw, regs, regd) | |
| 96 | |
| 97 #define paddusb_m2r(var,reg) mmx_m2r (paddusb, var, reg) | |
| 98 #define paddusb_r2r(regs,regd) mmx_r2r (paddusb, regs, regd) | |
| 99 #define paddusw_m2r(var,reg) mmx_m2r (paddusw, var, reg) | |
| 100 #define paddusw_r2r(regs,regd) mmx_r2r (paddusw, regs, regd) | |
| 101 | |
| 102 #define pand_m2r(var,reg) mmx_m2r (pand, var, reg) | |
| 103 #define pand_r2r(regs,regd) mmx_r2r (pand, regs, regd) | |
| 104 | |
| 105 #define pandn_m2r(var,reg) mmx_m2r (pandn, var, reg) | |
| 106 #define pandn_r2r(regs,regd) mmx_r2r (pandn, regs, regd) | |
| 107 | |
| 108 #define pcmpeqb_m2r(var,reg) mmx_m2r (pcmpeqb, var, reg) | |
| 109 #define pcmpeqb_r2r(regs,regd) mmx_r2r (pcmpeqb, regs, regd) | |
| 110 #define pcmpeqd_m2r(var,reg) mmx_m2r (pcmpeqd, var, reg) | |
| 111 #define pcmpeqd_r2r(regs,regd) mmx_r2r (pcmpeqd, regs, regd) | |
| 112 #define pcmpeqw_m2r(var,reg) mmx_m2r (pcmpeqw, var, reg) | |
| 113 #define pcmpeqw_r2r(regs,regd) mmx_r2r (pcmpeqw, regs, regd) | |
| 114 | |
| 115 #define pcmpgtb_m2r(var,reg) mmx_m2r (pcmpgtb, var, reg) | |
| 116 #define pcmpgtb_r2r(regs,regd) mmx_r2r (pcmpgtb, regs, regd) | |
| 117 #define pcmpgtd_m2r(var,reg) mmx_m2r (pcmpgtd, var, reg) | |
| 118 #define pcmpgtd_r2r(regs,regd) mmx_r2r (pcmpgtd, regs, regd) | |
| 119 #define pcmpgtw_m2r(var,reg) mmx_m2r (pcmpgtw, var, reg) | |
| 120 #define pcmpgtw_r2r(regs,regd) mmx_r2r (pcmpgtw, regs, regd) | |
| 121 | |
| 122 #define pmaddwd_m2r(var,reg) mmx_m2r (pmaddwd, var, reg) | |
| 123 #define pmaddwd_r2r(regs,regd) mmx_r2r (pmaddwd, regs, regd) | |
| 124 | |
| 125 #define pmulhw_m2r(var,reg) mmx_m2r (pmulhw, var, reg) | |
| 126 #define pmulhw_r2r(regs,regd) mmx_r2r (pmulhw, regs, regd) | |
| 127 | |
| 128 #define pmullw_m2r(var,reg) mmx_m2r (pmullw, var, reg) | |
| 129 #define pmullw_r2r(regs,regd) mmx_r2r (pmullw, regs, regd) | |
| 130 | |
| 131 #define por_m2r(var,reg) mmx_m2r (por, var, reg) | |
| 132 #define por_r2r(regs,regd) mmx_r2r (por, regs, regd) | |
| 133 | |
| 134 #define pslld_i2r(imm,reg) mmx_i2r (pslld, imm, reg) | |
| 135 #define pslld_m2r(var,reg) mmx_m2r (pslld, var, reg) | |
| 136 #define pslld_r2r(regs,regd) mmx_r2r (pslld, regs, regd) | |
| 137 #define psllq_i2r(imm,reg) mmx_i2r (psllq, imm, reg) | |
| 138 #define psllq_m2r(var,reg) mmx_m2r (psllq, var, reg) | |
| 139 #define psllq_r2r(regs,regd) mmx_r2r (psllq, regs, regd) | |
| 140 #define psllw_i2r(imm,reg) mmx_i2r (psllw, imm, reg) | |
| 141 #define psllw_m2r(var,reg) mmx_m2r (psllw, var, reg) | |
| 142 #define psllw_r2r(regs,regd) mmx_r2r (psllw, regs, regd) | |
| 143 | |
| 144 #define psrad_i2r(imm,reg) mmx_i2r (psrad, imm, reg) | |
| 145 #define psrad_m2r(var,reg) mmx_m2r (psrad, var, reg) | |
| 146 #define psrad_r2r(regs,regd) mmx_r2r (psrad, regs, regd) | |
| 147 #define psraw_i2r(imm,reg) mmx_i2r (psraw, imm, reg) | |
| 148 #define psraw_m2r(var,reg) mmx_m2r (psraw, var, reg) | |
| 149 #define psraw_r2r(regs,regd) mmx_r2r (psraw, regs, regd) | |
| 150 | |
| 151 #define psrld_i2r(imm,reg) mmx_i2r (psrld, imm, reg) | |
| 152 #define psrld_m2r(var,reg) mmx_m2r (psrld, var, reg) | |
| 153 #define psrld_r2r(regs,regd) mmx_r2r (psrld, regs, regd) | |
| 154 #define psrlq_i2r(imm,reg) mmx_i2r (psrlq, imm, reg) | |
| 155 #define psrlq_m2r(var,reg) mmx_m2r (psrlq, var, reg) | |
| 156 #define psrlq_r2r(regs,regd) mmx_r2r (psrlq, regs, regd) | |
| 157 #define psrlw_i2r(imm,reg) mmx_i2r (psrlw, imm, reg) | |
| 158 #define psrlw_m2r(var,reg) mmx_m2r (psrlw, var, reg) | |
| 159 #define psrlw_r2r(regs,regd) mmx_r2r (psrlw, regs, regd) | |
| 160 | |
| 161 #define psubb_m2r(var,reg) mmx_m2r (psubb, var, reg) | |
| 162 #define psubb_r2r(regs,regd) mmx_r2r (psubb, regs, regd) | |
| 163 #define psubd_m2r(var,reg) mmx_m2r (psubd, var, reg) | |
| 164 #define psubd_r2r(regs,regd) mmx_r2r (psubd, regs, regd) | |
| 165 #define psubw_m2r(var,reg) mmx_m2r (psubw, var, reg) | |
| 166 #define psubw_r2r(regs,regd) mmx_r2r (psubw, regs, regd) | |
| 167 | |
| 168 #define psubsb_m2r(var,reg) mmx_m2r (psubsb, var, reg) | |
| 169 #define psubsb_r2r(regs,regd) mmx_r2r (psubsb, regs, regd) | |
| 170 #define psubsw_m2r(var,reg) mmx_m2r (psubsw, var, reg) | |
| 171 #define psubsw_r2r(regs,regd) mmx_r2r (psubsw, regs, regd) | |
| 172 | |
| 173 #define psubusb_m2r(var,reg) mmx_m2r (psubusb, var, reg) | |
| 174 #define psubusb_r2r(regs,regd) mmx_r2r (psubusb, regs, regd) | |
| 175 #define psubusw_m2r(var,reg) mmx_m2r (psubusw, var, reg) | |
| 176 #define psubusw_r2r(regs,regd) mmx_r2r (psubusw, regs, regd) | |
| 177 | |
| 178 #define punpckhbw_m2r(var,reg) mmx_m2r (punpckhbw, var, reg) | |
| 179 #define punpckhbw_r2r(regs,regd) mmx_r2r (punpckhbw, regs, regd) | |
| 180 #define punpckhdq_m2r(var,reg) mmx_m2r (punpckhdq, var, reg) | |
| 181 #define punpckhdq_r2r(regs,regd) mmx_r2r (punpckhdq, regs, regd) | |
| 182 #define punpckhwd_m2r(var,reg) mmx_m2r (punpckhwd, var, reg) | |
| 183 #define punpckhwd_r2r(regs,regd) mmx_r2r (punpckhwd, regs, regd) | |
| 184 | |
| 185 #define punpcklbw_m2r(var,reg) mmx_m2r (punpcklbw, var, reg) | |
| 186 #define punpcklbw_r2r(regs,regd) mmx_r2r (punpcklbw, regs, regd) | |
| 187 #define punpckldq_m2r(var,reg) mmx_m2r (punpckldq, var, reg) | |
| 188 #define punpckldq_r2r(regs,regd) mmx_r2r (punpckldq, regs, regd) | |
| 189 #define punpcklwd_m2r(var,reg) mmx_m2r (punpcklwd, var, reg) | |
| 190 #define punpcklwd_r2r(regs,regd) mmx_r2r (punpcklwd, regs, regd) | |
| 191 | |
| 192 #define pxor_m2r(var,reg) mmx_m2r (pxor, var, reg) | |
| 193 #define pxor_r2r(regs,regd) mmx_r2r (pxor, regs, regd) | |
| 194 | |
| 195 | |
| 196 /* 3DNOW extensions */ | |
| 197 | |
| 198 #define pavgusb_m2r(var,reg) mmx_m2r (pavgusb, var, reg) | |
| 199 #define pavgusb_r2r(regs,regd) mmx_r2r (pavgusb, regs, regd) | |
| 200 | |
| 201 | |
| 202 /* AMD MMX extensions - also available in intel SSE */ | |
| 203 | |
| 204 | |
| 205 #define mmx_m2ri(op,mem,reg,imm) \ | |
| 206 __asm__ __volatile__ (#op " %1, %0, %%" #reg \ | |
| 207 : /* nothing */ \ | |
| 208 : "m" (mem), "i" (imm)) | |
| 209 #define mmx_r2ri(op,regs,regd,imm) \ | |
| 210 __asm__ __volatile__ (#op " %0, %%" #regs ", %%" #regd \ | |
| 211 : /* nothing */ \ | |
| 212 : "i" (imm) ) | |
| 213 | |
| 214 #define mmx_fetch(mem,hint) \ | |
| 215 __asm__ __volatile__ ("prefetch" #hint " %0" \ | |
| 216 : /* nothing */ \ | |
| 217 : "m" (mem)) | |
| 218 | |
| 219 | |
| 220 #define maskmovq(regs,maskreg) mmx_r2ri (maskmovq, regs, maskreg) | |
| 221 | |
| 222 #define movntq_r2m(mmreg,var) mmx_r2m (movntq, mmreg, var) | |
| 223 | |
| 224 #define pavgb_m2r(var,reg) mmx_m2r (pavgb, var, reg) | |
| 225 #define pavgb_r2r(regs,regd) mmx_r2r (pavgb, regs, regd) | |
| 226 #define pavgw_m2r(var,reg) mmx_m2r (pavgw, var, reg) | |
| 227 #define pavgw_r2r(regs,regd) mmx_r2r (pavgw, regs, regd) | |
| 228 | |
| 229 #define pextrw_r2r(mmreg,reg,imm) mmx_r2ri (pextrw, mmreg, reg, imm) | |
| 230 | |
| 231 #define pinsrw_r2r(reg,mmreg,imm) mmx_r2ri (pinsrw, reg, mmreg, imm) | |
| 232 | |
| 233 #define pmaxsw_m2r(var,reg) mmx_m2r (pmaxsw, var, reg) | |
| 234 #define pmaxsw_r2r(regs,regd) mmx_r2r (pmaxsw, regs, regd) | |
| 235 | |
| 236 #define pmaxub_m2r(var,reg) mmx_m2r (pmaxub, var, reg) | |
| 237 #define pmaxub_r2r(regs,regd) mmx_r2r (pmaxub, regs, regd) | |
| 238 | |
| 239 #define pminsw_m2r(var,reg) mmx_m2r (pminsw, var, reg) | |
| 240 #define pminsw_r2r(regs,regd) mmx_r2r (pminsw, regs, regd) | |
| 241 | |
| 242 #define pminub_m2r(var,reg) mmx_m2r (pminub, var, reg) | |
| 243 #define pminub_r2r(regs,regd) mmx_r2r (pminub, regs, regd) | |
| 244 | |
| 245 #define pmovmskb(mmreg,reg) \ | |
| 246 __asm__ __volatile__ ("movmskps %" #mmreg ", %" #reg) | |
| 247 | |
| 248 #define pmulhuw_m2r(var,reg) mmx_m2r (pmulhuw, var, reg) | |
| 249 #define pmulhuw_r2r(regs,regd) mmx_r2r (pmulhuw, regs, regd) | |
| 250 | |
| 251 #define prefetcht0(mem) mmx_fetch (mem, t0) | |
| 252 #define prefetcht1(mem) mmx_fetch (mem, t1) | |
| 253 #define prefetcht2(mem) mmx_fetch (mem, t2) | |
| 254 #define prefetchnta(mem) mmx_fetch (mem, nta) | |
| 255 | |
| 256 #define psadbw_m2r(var,reg) mmx_m2r (psadbw, var, reg) | |
| 257 #define psadbw_r2r(regs,regd) mmx_r2r (psadbw, regs, regd) | |
| 258 | |
| 259 #define pshufw_m2r(var,reg,imm) mmx_m2ri(pshufw, var, reg, imm) | |
| 260 #define pshufw_r2r(regs,regd,imm) mmx_r2ri(pshufw, regs, regd, imm) | |
| 261 | |
| 262 #define sfence() __asm__ __volatile__ ("sfence\n\t") | |
| 263 | |
| 264 /* SSE2 */ | |
| 265 #define pshufhw_m2r(var,reg,imm) mmx_m2ri(pshufhw, var, reg, imm) | |
| 266 #define pshufhw_r2r(regs,regd,imm) mmx_r2ri(pshufhw, regs, regd, imm) | |
| 267 #define pshuflw_m2r(var,reg,imm) mmx_m2ri(pshuflw, var, reg, imm) | |
| 268 #define pshuflw_r2r(regs,regd,imm) mmx_r2ri(pshuflw, regs, regd, imm) | |
| 269 | |
| 270 #define pshufd_r2r(regs,regd,imm) mmx_r2ri(pshufd, regs, regd, imm) | |
| 271 | |
| 272 #define movdqa_m2r(var,reg) mmx_m2r (movdqa, var, reg) | |
| 273 #define movdqa_r2m(reg,var) mmx_r2m (movdqa, reg, var) | |
| 274 #define movdqa_r2r(regs,regd) mmx_r2r (movdqa, regs, regd) | |
| 275 #define movdqu_m2r(var,reg) mmx_m2r (movdqu, var, reg) | |
| 276 #define movdqu_r2m(reg,var) mmx_r2m (movdqu, reg, var) | |
| 277 #define movdqu_r2r(regs,regd) mmx_r2r (movdqu, regs, regd) | |
| 278 | |
| 279 #define pmullw_r2m(reg,var) mmx_r2m (pmullw, reg, var) | |
| 280 | |
| 281 #define pslldq_i2r(imm,reg) mmx_i2r (pslldq, imm, reg) | |
| 282 #define psrldq_i2r(imm,reg) mmx_i2r (psrldq, imm, reg) | |
| 283 | |
| 284 #define punpcklqdq_r2r(regs,regd) mmx_r2r (punpcklqdq, regs, regd) | |
| 285 #define punpckhqdq_r2r(regs,regd) mmx_r2r (punpckhqdq, regs, regd) | |
| 286 | |
| 287 | |
| 288 #endif /* AVCODEC_I386MMX_H */ |