annotate spandsp-0.0.6pre17/src/spandsp/private/t30_dis_dtc_dcs_bits.h @ 4:26cd8f1ef0b1

import spandsp-0.0.6pre17
author Peter Meerwald <pmeerw@cosy.sbg.ac.at>
date Fri, 25 Jun 2010 15:50:58 +0200
parents
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
4
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1 /*
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2 * SpanDSP - a series of DSP components for telephony
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3 *
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4 * t30_dis_dtc_dcs_bits.h - ITU T.30 fax control bits definitions
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
5 *
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
6 * Written by Steve Underwood <steveu@coppice.org>
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
7 *
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
8 * Copyright (C) 2009 Steve Underwood
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
9 *
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
10 * All rights reserved.
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
11 *
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
12 * This program is free software; you can redistribute it and/or modify
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
13 * it under the terms of the GNU Lesser General Public License version 2.1,
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
14 * as published by the Free Software Foundation.
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
15 *
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
16 * This program is distributed in the hope that it will be useful,
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
19 * GNU Lesser General Public License for more details.
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
20 *
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
21 * You should have received a copy of the GNU Lesser General Public
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
22 * License along with this program; if not, write to the Free Software
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
24 *
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
25 * $Id: t30_dis_dtc_dcs_bits.h,v 1.1.4.1 2009/12/19 09:47:57 steveu Exp $
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
26 */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
27
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
28 /*! \file */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
29
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
30 #if !defined(_SPANDSP_PRIVATE_T30_DIS_DTC_DCS_BITS_H_)
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
31 #define _SPANDSP_PRIVATE_T30_DIS_DTC_DCS_BITS_H_
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
32
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
33 /* Indicates that the terminal has the Simple mode capability defined in ITU-T Rec. T.37.
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
34 Internet address signals CIA, TSA or CSA can be sent and received. The recipient terminal
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
35 may process or ignore this signal. */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
36 #define T30_DIS_BIT_T37 1
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
37 #define T30_DCS_BIT_T37 1
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
38
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
39 /* Indicates that the terminal has the capability to communicate using ITU-T Rec. T.38.
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
40 Internet address signals CIA, TSA or CSA can be sent and received. The recipient terminal
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
41 may process or ignore this signal. */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
42 #define T30_DIS_BIT_T38 3
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
43 #define T30_DCS_BIT_T38 3
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
44
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
45 /* Bit 4 set to "1" indicates 3rd Generation Mobile Network Access to the GSTN Connection.
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
46 Bit 4 set to "0" conveys no information about the type of connection. */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
47 #define T30_DIS_BIT_3G_MOBILE 4
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
48 #define T30_DCS_BIT_3G_MOBILE 4
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
49
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
50 /* When ISDN mode is used, in DIS/DTC bit 6 shall be set to "0". */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
51 #define T30_DIS_BIT_V8_CAPABILITY 6
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
52
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
53 /* When ISDN mode is used, in DIS/DTC bit 7 shall be set to "0". */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
54 #define T30_DIS_BIT_64_OCTET_ECM_FRAMES_PREFERRED 7
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
55
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
56 /* Bit 9 indicates that there is a facsimile document ready to be polled from the answering
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
57 terrminal. It is not an indication of a capability. */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
58 #define T30_DIS_BIT_READY_TO_TRANSMIT_FAX_DOCUMENT 9
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
59
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
60 /* In DIS/DTC bit 10 indicates that the answering terminal has receiving capabilities.
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
61 In DCS it is a command to the receiving terminal to set itself in the receive mode. */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
62 #define T30_DIS_BIT_READY_TO_RECEIVE_FAX_DOCUMENT 10
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
63 #define T30_DCS_BIT_RECEIVE_FAX_DOCUMENT 10
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
64
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
65 /* Bits 11, 12, 13, 14 - modem type */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
66
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
67 #define T30_DIS_BIT_200_200_CAPABLE 15
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
68 #define T30_DCS_BIT_200_200 15
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
69
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
70 #define T30_DIS_BIT_2D_CAPABLE 16
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
71 #define T30_DCS_BIT_2D_CODING 16
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
72
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
73 /* Standard facsimile terminals conforming to ITU-T Rec. T.4 must have the following capability:
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
74 Paper length = 297 mm. */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
75
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
76 /* Bits 17, 18 - recording width */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
77
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
78 /* Bits 19, 20 - paper length */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
79
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
80 /* Bits 21, 22, 23 - min scan line time */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
81
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
82 /* When ISDN mode is used, in DIS/DTC bits 21 to 23 shall be set to "1". */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
83
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
84 #define T30_DIS_BIT_UNCOMPRESSED_CAPABLE 26
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
85 #define T30_DCS_BIT_UNCOMPRESSED_MODE 26
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
86
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
87 /* When ISDN mode is used, in DIS/DTC bit 27 shall be set to "1". */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
88 #define T30_DIS_BIT_ECM_CAPABLE 27
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
89 #define T30_DCS_BIT_ECM 27
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
90
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
91 /* The value of bit 28 in the DCS command is only valid when ECM is selected. */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
92 #define T30_DCS_BIT_64_OCTET_ECM_FRAMES 28
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
93
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
94 /* The value of bit 31 in the DCS command is only valid when ECM is selected. */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
95 #define T30_DIS_BIT_T6_CAPABLE 31
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
96 #define T30_DCS_BIT_T6_MODE 31
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
97
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
98 #define T30_DIS_BIT_FNV_CAPABLE 33
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
99 #define T30_DCS_BIT_FNV_CAPABLE 33
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
100
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
101 #define T30_DIS_BIT_MULTIPLE_SELECTIVE_POLLING_CAPABLE 34
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
102
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
103 #define T30_DIS_BIT_POLLED_SUBADDRESSING_CAPABLE 35
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
104
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
105 #define T30_DIS_BIT_T43_CAPABLE 36
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
106 #define T30_DCS_BIT_T43_CODING 36
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
107
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
108 #define T30_DIS_BIT_PLANE_INTERLEAVE_CAPABLE 37
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
109 #define T30_DCS_BIT_PLANE_INTERLEAVE 37
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
110
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
111 #define T30_DIS_BIT_G726_CAPABLE 38
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
112 #define T30_DCS_BIT_G726 38
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
113
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
114 #define T30_DIS_BIT_200_400_CAPABLE 41
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
115 #define T30_DCS_BIT_200_400 41
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
116
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
117 #define T30_DIS_BIT_300_300_CAPABLE 42
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
118 #define T30_DCS_BIT_300_300 42
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
119
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
120 #define T30_DIS_BIT_400_400_CAPABLE 43
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
121 #define T30_DCS_BIT_400_400 43
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
122
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
123 /* Bits 44 and 45 are used only in conjunction with bits 15 and 43. Bit 44 in DCS, when used,
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
124 shall correctly indicate the resolution of the transmitted document, which means that bit 44 in DCS may
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
125 not always match the indication of bits 44 and 45 in DIS/DTC. Cross selection will cause the distortion
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
126 and reduction of reproducible area.
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
127 If a receiver indicates in DIS that it prefers to receive metric-based information, but the transmitter has
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
128 only the equivalent inch-based information (or vice versa), then communication shall still take place.
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
129 Bits 44 and 45 do not require the provision of any additional features on the terminal to
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
130 indicate to the sending or receiving user whether the information was transmitted or received on a metric-metric,
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
131 inch-inch, metric-inch, inch-metric basis. */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
132
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
133 #define T30_DIS_BIT_INCH_RESOLUTION_PREFERRED 44
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
134 #define T30_DCS_BIT_INCH_RESOLUTION 44
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
135
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
136 #define T30_DIS_BIT_METRIC_RESOLUTION_PREFERRED 45
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
137
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
138 #define T30_DIS_BIT_MIN_SCAN_TIME_HALVES 46
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
139
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
140 #define T30_DIS_BIT_SELECTIVE_POLLING_CAPABLE 47
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
141
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
142 #define T30_DIS_BIT_SUBADDRESSING_CAPABLE 49
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
143 #define T30_DCS_BIT_SUBADDRESS_TRANSMISSION 49
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
144
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
145 #define T30_DIS_BIT_PASSWORD 50
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
146 #define T30_DCS_BIT_SENDER_ID_TRANSMISSION 50
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
147
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
148 /* Bit 51 indicates that there is a data file ready to be polled from the answering terminal. It is
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
149 not an indication of a capability. This bit is used in conjunction with bits 53, 54, 55 and 57. */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
150 #define T30_DIS_BIT_READY_TO_TRANSMIT_DATA_FILE 51
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
151
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
152 /* The binary file transfer protocol is described in ITU-T Rec. T.434. */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
153 #define T30_DIS_BIT_BFT_CAPABLE 53
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
154 #define T30_DCS_BIT_BFT 53
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
155
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
156 #define T30_DIS_BIT_DTM_CAPABLE 54
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
157 #define T30_DCS_BIT_DTM 54
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
158
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
159 #define T30_DIS_BIT_EDI_CAPABLE 55
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
160 #define T30_DCS_BIT_EDI 55
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
161
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
162 #define T30_DIS_BIT_BTM_CAPABLE 57
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
163 #define T30_DCS_BIT_BTM 57
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
164
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
165 /* Bit 59 indicates that there is a character-coded or mixed-mode document ready to be polled
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
166 from the answering terminal. It is not an indication of a capability. This bit is used in
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
167 conjunction with bits 60, 62 and 65. */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
168 #define T30_DIS_BIT_READY_TO_TRANSMIT_MIXED_MODE_DOCUMENT 59
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
169
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
170 #define T30_DIS_BIT_CHARACTER_MODE 60
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
171 #define T30_DCS_BIT_CHARACTER_MODE 60
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
172
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
173 #define T30_DIS_BIT_MIXED_MODE 62
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
174 #define T30_DCS_BIT_MIXED_MODE 62
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
175
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
176 #define T30_DIS_BIT_PROCESSABLE_MODE_26 65
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
177
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
178 #define T30_DIS_BIT_DIGITAL_NETWORK_CAPABLE 66
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
179 #define T30_DCS_BIT_DIGITAL_NETWORK_CAPABLE 66
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
180
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
181 #define T30_DIS_BIT_DUPLEX_CAPABLE 67
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
182 #define T30_DCS_BIT_DUPLEX_CAPABLE 67
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
183
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
184 #define T30_DIS_BIT_T81_CAPABLE 68
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
185 #define T30_DCS_BIT_FULL_COLOUR_MODEX 68
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
186
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
187 #define T30_DIS_BIT_FULL_COLOUR_CAPABLE 69
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
188 #define T30_DCS_BIT_FULL_COLOUR_MODE 69
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
189
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
190 /* In a DIS/DTC frame, setting bit 71 to "0" indicates that the called terminal can only accept
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
191 image data which has been digitized to 8 bits/pel/component for JPEG mode. This is also true for T.43
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
192 mode if bit 36 is also set to "1". Setting bit 71 to "1" indicates that the called terminal can also accept
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
193 image data that are digitized to 12 bits/pel/component for JPEG mode. This is also true for T.43 mode if
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
194 bit 36 is also set to "1". In a DCS frame, setting bit 71 to "0" indicates that the calling terminal's image
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
195 data are digitized to 8 bits/pel/component for JPEG mode. This is also true for T.43 mode if bit 36 is also
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
196 set to "1". Setting bit 71 to "1" indicates that the calling terminal transmits image data which has been
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
197 digitized to 12 bits/pel/component for JPEG mode. This is also true for T.43 mode if bit 36 is also set
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
198 to "1". */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
199 #define T30_DIS_BIT_12BIT_CAPABLE 71
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
200 #define T30_DCS_BIT_12BIT_COMPONENT 71
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
201
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
202 #define T30_DIS_BIT_NO_SUBSAMPLING 73
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
203 #define T30_DCS_BIT_NO_SUBSAMPLING 73
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
204
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
205 #define T30_DIS_BIT_CUSTOM_ILLUMINANT 74
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
206 #define T30_DCS_BIT_CUSTOM_ILLUMINANT 74
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
207
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
208 #define T30_DIS_BIT_CUSTOM_GAMUT_RANGE 75
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
209 #define T30_DCS_BIT_CUSTOM_GAMUT_RANGE 75
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
210
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
211 #define T30_DIS_BIT_NORTH_AMERICAN_LETTER_CAPABLE 76
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
212 #define T30_DCS_BIT_NORTH_AMERICAN_LETTER 76
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
213
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
214 #define T30_DIS_BIT_NORTH_AMERICAN_LEGAL_CAPABLE 77
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
215 #define T30_DCS_BIT_NORTH_AMERICAN_LEGAL 77
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
216
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
217 #define T30_DIS_BIT_T85_CAPABLE 78
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
218 #define T30_DCS_BIT_T85_MODE 78
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
219
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
220 #define T30_DIS_BIT_T85_L0_CAPABLE 79
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
221 #define T30_DCS_BIT_T85_L0_MODE 79
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
222
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
223 /* In a DIS/DTC frame, setting bit 97 to "0" indicates that the called terminal does not have the
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
224 capability to accept 300 pels/25.4 mm x 300 lines/25.4 mm or 400 pels/25.4 mm x 400 lines/25.4 mm
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
225 resolutions for colour/gray-scale images or T.44 Mixed Raster Content (MRC) mask layer.
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
226
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
227 Setting bit 97 to "1" indicates that the called terminal does have the capability to accept
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
228 300 pels/25.4 mm x 300 lines/25.4 mm or 400 pels/25.4 mm x 400 lines/25.4 mm resolutions for
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
229 colour/gray-scale images and MRC mask layer. Bit 97 is valid only when bits 68 and 42 or 43
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
230 (300 pels/25.4 mm x 300 lines/25.4 mm or 400 pels/25.4 mm x 400 lines/25.4 mm) are set to "1".
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
231
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
232 In a DCS frame, setting bit 97 to "0" indicates that the calling terminal does not use
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
233 300 pels/25.4 mm x 300 lines/25.4 mm or 400 pels/25.4 mm x 400 lines/25.4 mm resolutions
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
234 for colour/gray-scale images and mask layer.
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
235
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
236 Setting bit 97 to "1" indicates that the calling terminal uses 300 pels/25.4 mm x 300 lines/25.4 mm
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
237 or 400 pels/25.4 mm x 400 lines/25.4 mm resolutions for colour/gray-scale images and MRC mask layer.
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
238 Bit 97 is valid only when bits 68 and 42 or 43 (300 pels/25.4 mm x 300 lines/25.4 mm and
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
239 400 pels/25.4 mm x 400 lines/25.4 mm) are set to "1".
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
240
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
241 In a DIS/DTC frame, combinations of bit 42, bit 43 and bit 97 indicate that the called terminal
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
242 has higher resolution capabilities as follows:
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
243
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
244 Resolution capabilities (pels/25.4 mm)
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
245 DIS/DTC Monochrome Colour/gray-scale
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
246 42 43 97 300 x 300 400 x 400 300 x 300 400 x 400
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
247 0 0 0 no no no no
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
248 1 0 0 yes no no no
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
249 0 1 0 no yes no no
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
250 1 1 0 yes yes no no
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
251 0 0 1 (invalid)
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
252 1 0 1 yes no yes no
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
253 0 1 1 no yes no yes
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
254 1 1 1 yes yes yes yes
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
255 "yes" means that the called terminal has the corresponding capability.
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
256 "no" means that the called terminal does not have the corresponding capability. */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
257 #define T30_DIS_BIT_COLOUR_GREY_300_300_400_400_CAPABLE 97
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
258 #define T30_DCS_BIT_COLOUR_GREY_300_300_400_400 97
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
259
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
260 /* In a DIS/DTC frame, setting bit 98 to "0" indicates that the called terminal does not have the
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
261 capability to accept 100 pels/25.4 mm x 100 lines/25.4 mm spatial resolution for colour or gray-scale
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
262 images. Setting bit 98 to "1" indicates that the called terminal does have the capability to accept
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
263 100 pels/25.4 mm x 100 lines/25.4 mm spatial resolution for colour or gray-scale images. Bit 98 is valid
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
264 only when bit 68 is set to "1". In a DCS frame, setting bit 98 to "0" indicates that the calling terminal does
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
265 not use 100 pels/25.4 mm x 100 lines/25.4 mm spatial resolution for colour or gray-scale images. Setting
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
266 bit 98 to "1" indicates that the calling terminal uses 100 pels/25.4 mm x 100 lines/25.4 mm spatial
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
267 resolution for colour or gray-scale images. */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
268 #define T30_DIS_BIT_COLOUR_GREY_100_100_CAPABLE 98
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
269 #define T30_DCS_BIT_COLOUR_GREY_100_100 98
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
270
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
271 /* To provide an error recovery mechanism, when PWD/SEP/SUB/SID/PSA/IRA/ISP frames are sent with DCS or DTC,
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
272 bits 49, 102 and 50 in DCS or bits 47, 101, 50 and 35 in DTC shall be set to "1" with the following
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
273 meaning:
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
274 Bit DIS DTC DCS
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
275 35 Polled SubAddress capability Polled SubAddress transmission Not allowed – set to "0"
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
276 47 Selective polling capability Selective polling transmission Not allowed – set to "0"
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
277 49 Subaddressing capability Not allowed (Set to "0") Subaddressing transmission
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
278 50 Password Password transmission Sender Identification transmission
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
279 101 Internet Selective Polling Address capability Internet Selective Polling Address transmission Not allowed – set to "0"
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
280 102 Internet Routing Address capability Not allowed (Set to "0") Internet Routing Address transmission
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
281
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
282 Terminals conforming to the 1993 version of T.30 may set the above bits to "0" even though PWD/SEP/SUB
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
283 frames are transmitted. */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
284 #define T30_DIS_BIT_INTERNET_SELECTIVE_POLLING_ADDRESS 101
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
285
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
286 #define T30_DIS_BIT_INTERNET_ROUTING_ADDRESS 102
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
287 #define T30_DCS_BIT_INTERNET_ROUTING_ADDRESS_TRANSMISSION 102
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
288
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
289 #define T30_DIS_BIT_600_600_CAPABLE 105
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
290 #define T30_DCS_BIT_600_600 105
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
291
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
292 #define T30_DIS_BIT_1200_1200_CAPABLE 106
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
293 #define T30_DCS_BIT_1200_1200 106
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
294
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
295 #define T30_DIS_BIT_300_600_CAPABLE 107
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
296 #define T30_DCS_BIT_300_600 107
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
297
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
298 #define T30_DIS_BIT_400_800_CAPABLE 108
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
299 #define T30_DCS_BIT_400_800 108
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
300
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
301 #define T30_DIS_BIT_600_1200_CAPABLE 109
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
302 #define T30_DCS_BIT_600_1200 109
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
303
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
304 #define T30_DIS_BIT_COLOUR_GREY_600_600_CAPABLE 110
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
305 #define T30_DCS_BIT_COLOUR_GREY_600_600 110
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
306
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
307 #define T30_DIS_BIT_COLOUR_GREY_1200_1200_CAPABLE 111
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
308 #define T30_DCS_BIT_COLOUR_GREY_1200_1200 111
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
309
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
310 #define T30_DIS_BIT_ALTERNATE_DOUBLE_SIDED_CAPABLE 113
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
311 #define T30_DCS_BIT_ALTERNATE_DOUBLE_SIDED_CAPABLE 113
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
312
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
313 #define T30_DIS_BIT_CONTINUOUS_DOUBLE_SIDED_CAPABLE 114
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
314 #define T30_DCS_BIT_CONTINUOUS_DOUBLE_SIDED_CAPABLE 114
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
315
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
316 #define T30_DIS_BIT_BLACK_AND_WHITE_MRC 115
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
317
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
318 #define T30_DIS_BIT_T45_CAPABLE 116
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
319 #define T30_DCS_BIT_T45_MODE 116
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
320
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
321 /* This bit defines the available colour space, when bit 92, 93 or 94 is set to "1".
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
322 Available colour space for all combinations of bits 92, 93, 94 and 119 are shown in the following table.
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
323 It should be noted that terminals which conform to the 2003 and earlier versions of this Recommendation
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
324 will send LAB with "1" in bit 92, 93 or 94 even if bit 119 is set to "1".
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
325
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
326 Available colour space for DIS/DTC bits 92, 93, 94 and 119
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
327
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
328 92 93 94 119 Mode of T.44 Available colour space
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
329 0 0 0 x Not available -
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
330 1 0 0 0 Mode 1 LAB only
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
331 1 0 0 1 Mode 1 YCC only
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
332 x 1 x 0 Mode 2 or higher LAB only
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
333 x x 1 0 Mode 2 or higher LAB only
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
334 x 1 x 1 Mode 2 or higher LAB and YCC
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
335 x x 1 1 Mode 2 or higher LAB and YCC
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
336
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
337 Colour space for DCS bits 92, 93, 94 and 119
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
338
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
339 92 93 94 119 Mode of T.44 Colour space
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
340 0 0 0 x* Not available -
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
341 1 0 0 0 Mode 1 LAB
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
342 1 0 0 1 Mode 1 YCC
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
343 x 1 x 0 Mode 2 or higher LAB
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
344 x x 1 0 Mode 2 or higher LAB
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
345 x 1 x 1 Mode 2 or higher YCC or mixing of YCC and LAB
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
346 x x 1 1 Mode 2 or higher YCC or mixing of YCC and LAB */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
347 #define T30_DIS_BIT_T44_COLOUR_SPACE 119
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
348 #define T30_DCS_BIT_T44_COLOUR_SPACE 119
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
349
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
350 /* Can only be set in the communication through the T.38 gateway, to cope with delay of network.
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
351 T.x timer (12+-1s) should be used after emitting RNR or TNR. However, after receiving
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
352 PPS signal in ECM mode, T.5 timer should be used. */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
353 #define T30_DIS_BIT_T38_FLOW_CONTROL_CAPABLE 121
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
354 #define T30_DCS_BIT_T38_FLOW_CONTROL_CAPABLE 121
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
355
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
356 /* For resolutions greater than 200 lines/25.4 mm, 4.2.1.1/T.4 specifies the use of specific K
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
357 factors for each standardized vertical resolution. To ensure backward compatibility with earlier
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
358 versions of ITU-T Rec. T.4, bit 122 indicates when such K factors are being used. */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
359 #define T30_DIS_BIT_K_GREATER_THAN_4 122
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
360
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
361 /* This bit should be set to "1" if the fax device is an Internet-Aware Fax Device as defined in
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
362 ITU-T Rec. T.38 and if it is not affected by the data signal rate indicated by the DIS and DTC
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
363 signals when communicating with another Internet-Aware Fax Device operating in T.38 mode. This
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
364 bit shall not be used in GSTN mode. */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
365 #define T30_DIS_BIT_T38_FAX_CAPABLE 123
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
366 /* This bit should be set to "1" if the fax device elects to operate in an Internet-Aware Fax mode
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
367 as defined in ITU-T Rec. T.38 in response to a device which has set the related DIS bit to "1".
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
368 When this bit is set to "1", the data signal rate of the modem (bits 11-14) should be set to "0". */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
369 #define T30_DCS_BIT_T38_FAX_MODE 123
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
370
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
371 /* When either bit of 31, 36, 38, 51, 53, 54, 55, 57, 59, 60, 62, 65, 68, 78, 79, 115, 116 and 127 is
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
372 set to "1", ECM must be used. If the value of bit field 92 to 94 is non-zero, then ECM must be used.
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
373
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
374 Annex K describes the optional continuous-tone colour and gray scale images mode
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
375 (sYCC-JPEG mode) protocol. When bit 127 in DIS/DTC frame is set to "1", the called terminal has the
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
376 capability to accept sYCC-JPEG mode. This is defined with complete independent in the colour space
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
377 CIELAB. In addition, when bit 127 in DCS frame is set to "1", ECM must be used and bits 15, 17, 18,
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
378 19, 20, 41, 42, 43, 45, 46, 68, 69, 71, 73, 74, 75, 76, 77, 97, 98, 105, 106, 107, 108,
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
379 109, 110 and 111 in DCS frame are "Don't care", and should be set to "0". In the case of
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
380 transmission of multiple images, a post message signal PPS-MPS between pages, PPS-NULL between
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
381 partial pages and PPS-EOP following the last page should be sent from the calling terminal to the
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
382 called terminal. */
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
383 #define T30_DIS_BIT_SYCC_T81_CAPABLE 127
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
384 #define T30_DCS_BIT_SYCC_T81_MODE 127
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
385
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
386 #endif
26cd8f1ef0b1 import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
387 /*- End of file ------------------------------------------------------------*/

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