audiostuff: spandsp-0.0.6pre17/src/t31.c annotate

author	Peter Meerwald <pmeerw@cosy.sbg.ac.at>
date	Fri, 25 Jun 2010 15:50:58 +0200
parents
children

rev	line source
4 26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1 /*
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2 * SpanDSP - a series of DSP components for telephony
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	3 *
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	4 * t31.c - A T.31 compatible class 1 FAX modem interface.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	5 *
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	6 * Written by Steve Underwood <steveu@coppice.org>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	7 *
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	8 * Special thanks to Lee Howard <faxguy@howardsilvan.com>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	9 * for his great work debugging and polishing this code.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	10 *
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	11 * Copyright (C) 2004, 2005, 2006, 2008 Steve Underwood
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	12 *
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	13 * All rights reserved.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	14 *
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	15 * This program is free software; you can redistribute it and/or modify
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	16 * it under the terms of the GNU Lesser General Public License version 2.1,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	17 * as published by the Free Software Foundation.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	18 *
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	19 * This program is distributed in the hope that it will be useful,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	22 * GNU Lesser General Public License for more details.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	23 *
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	24 * You should have received a copy of the GNU Lesser General Public
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	25 * License along with this program; if not, write to the Free Software
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	26 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	27 *
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	28 * $Id: t31.c,v 1.155.4.1 2009/12/19 10:44:10 steveu Exp $
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	29 */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	30
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	31 /! \file /
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	32
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	33 #if defined(HAVE_CONFIG_H)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	34 #include "config.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	35 #endif
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	36
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	37 #include <inttypes.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	38 #include <stdlib.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	39 #include <stdio.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	40 #include <fcntl.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	41 #include <time.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	42 #include <memory.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	43 #include <string.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	44 #include <ctype.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	45 #if defined(HAVE_TGMATH_H)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	46 #include <tgmath.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	47 #endif
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	48 #if defined(HAVE_MATH_H)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	49 #include <math.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	50 #endif
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	51 #include "floating_fudge.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	52 #include <assert.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	53 #include <tiffio.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	54
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	55 #include "spandsp/telephony.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	56 #include "spandsp/logging.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	57 #include "spandsp/bit_operations.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	58 #include "spandsp/dc_restore.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	59 #include "spandsp/queue.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	60 #include "spandsp/power_meter.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	61 #include "spandsp/complex.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	62 #include "spandsp/tone_detect.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	63 #include "spandsp/tone_generate.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	64 #include "spandsp/async.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	65 #include "spandsp/crc.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	66 #include "spandsp/hdlc.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	67 #include "spandsp/silence_gen.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	68 #include "spandsp/fsk.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	69 #include "spandsp/v29tx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	70 #include "spandsp/v29rx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	71 #include "spandsp/v27ter_tx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	72 #include "spandsp/v27ter_rx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	73 #include "spandsp/v17tx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	74 #include "spandsp/v17rx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	75 #include "spandsp/super_tone_rx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	76 #include "spandsp/modem_connect_tones.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	77 #include "spandsp/t4_rx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	78 #include "spandsp/t4_tx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	79 #include "spandsp/t30.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	80 #include "spandsp/t30_logging.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	81 #include "spandsp/t38_core.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	82
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	83 #include "spandsp/at_interpreter.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	84 #include "spandsp/fax_modems.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	85 #include "spandsp/t31.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	86 #include "spandsp/t30_fcf.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	87
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	88 #include "spandsp/private/logging.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	89 #include "spandsp/private/t38_core.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	90 #include "spandsp/private/silence_gen.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	91 #include "spandsp/private/fsk.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	92 #include "spandsp/private/v17tx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	93 #include "spandsp/private/v17rx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	94 #include "spandsp/private/v27ter_tx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	95 #include "spandsp/private/v27ter_rx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	96 #include "spandsp/private/v29tx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	97 #include "spandsp/private/v29rx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	98 #include "spandsp/private/modem_connect_tones.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	99 #include "spandsp/private/hdlc.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	100 #include "spandsp/private/fax_modems.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	101 #include "spandsp/private/at_interpreter.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	102 #include "spandsp/private/t31.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	103
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	104 /* Settings suitable for paced transmission over a UDP transport */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	105 /! The default number of milliseconds per transmitted IFP when sending bulk T.38 data /
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	106 #define MS_PER_TX_CHUNK 30
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	107 /! The number of transmissions of indicator IFP packets /
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	108 #define INDICATOR_TX_COUNT 3
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	109 /! The number of transmissions of data IFP packets /
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	110 #define DATA_TX_COUNT 1
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	111 /! The number of transmissions of terminating data IFP packets /
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	112 #define DATA_END_TX_COUNT 3
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	113 /! The default DTE timeout, in seconds /
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	114 #define DEFAULT_DTE_TIMEOUT 5
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	115
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	116 /* Settings suitable for unpaced transmission over a TCP transport */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	117 #define MAX_OCTETS_PER_UNPACED_CHUNK 300
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	118
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	119 /* Backstop timeout if reception of packets stops in the middle of a burst */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	120 #define MID_RX_TIMEOUT 15000
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	121
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	122 #define HDLC_FRAMING_OK_THRESHOLD 5
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	123
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	124 typedef const char (at_cmd_service_t)(t31_state_t s, const char cmd);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	125
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	126 enum
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	127 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	128 ETX = 0x03,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	129 DLE = 0x10,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	130 SUB = 0x1A
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	131 };
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	132
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	133 enum
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	134 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	135 DISBIT1 = 0x01,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	136 DISBIT2 = 0x02,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	137 DISBIT3 = 0x04,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	138 DISBIT4 = 0x08,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	139 DISBIT5 = 0x10,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	140 DISBIT6 = 0x20,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	141 DISBIT7 = 0x40,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	142 DISBIT8 = 0x80
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	143 };
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	144
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	145 enum
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	146 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	147 T38_CHUNKING_MERGE_FCS_WITH_DATA = 0x0001,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	148 T38_CHUNKING_WHOLE_FRAMES = 0x0002,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	149 T38_CHUNKING_ALLOW_TEP_TIME = 0x0004
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	150 };
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	151
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	152 enum
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	153 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	154 T38_TIMED_STEP_NONE = 0,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	155 T38_TIMED_STEP_NON_ECM_MODEM = 0x10,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	156 T38_TIMED_STEP_NON_ECM_MODEM_2 = 0x11,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	157 T38_TIMED_STEP_NON_ECM_MODEM_3 = 0x12,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	158 T38_TIMED_STEP_NON_ECM_MODEM_4 = 0x13,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	159 T38_TIMED_STEP_NON_ECM_MODEM_5 = 0x14,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	160 T38_TIMED_STEP_HDLC_MODEM = 0x20,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	161 T38_TIMED_STEP_HDLC_MODEM_2 = 0x21,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	162 T38_TIMED_STEP_HDLC_MODEM_3 = 0x22,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	163 T38_TIMED_STEP_HDLC_MODEM_4 = 0x23,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	164 T38_TIMED_STEP_HDLC_MODEM_5 = 0x24,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	165 T38_TIMED_STEP_FAKE_HDLC_MODEM = 0x30,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	166 T38_TIMED_STEP_FAKE_HDLC_MODEM_2 = 0x31,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	167 T38_TIMED_STEP_FAKE_HDLC_MODEM_3 = 0x32,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	168 T38_TIMED_STEP_FAKE_HDLC_MODEM_4 = 0x33,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	169 T38_TIMED_STEP_FAKE_HDLC_MODEM_5 = 0x34,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	170 T38_TIMED_STEP_CED = 0x40,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	171 T38_TIMED_STEP_CED_2 = 0x41,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	172 T38_TIMED_STEP_CED_3 = 0x42,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	173 T38_TIMED_STEP_CNG = 0x50,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	174 T38_TIMED_STEP_CNG_2 = 0x51,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	175 T38_TIMED_STEP_PAUSE = 0x60
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	176 };
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	177
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	178 static int restart_modem(t31_state_t *s, int new_modem);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	179 static void hdlc_accept_frame(void user_data, const uint8_t msg, int len, int ok);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	180 static void set_rx_handler(t31_state_t s, span_rx_handler_t rx_handler, span_rx_fillin_handler_t fillin_handler, void user_data);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	181 static void set_tx_handler(t31_state_t s, span_tx_handler_t handler, void *user_data);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	182 static void set_next_tx_handler(t31_state_t s, span_tx_handler_t handler, void *user_data);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	183 static int v17_v21_rx(void *user_data, const int16_t amp[], int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	184 static int v17_v21_rx_fillin(void *user_data, int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	185 static int v27ter_v21_rx(void *user_data, const int16_t amp[], int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	186 static int v27ter_v21_rx_fillin(void *user_data, int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	187 static int v29_v21_rx(void *user_data, const int16_t amp[], int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	188 static int v29_v21_rx_fillin(void *user_data, int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	189 static int silence_rx(void *user_data, const int16_t amp[], int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	190 static int cng_rx(void *user_data, const int16_t amp[], int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	191 static void non_ecm_put_bit(void *user_data, int bit);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	192 static void non_ecm_put_chunk(void *user_data, const uint8_t buf[], int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	193 static int non_ecm_get_chunk(void *user_data, uint8_t buf[], int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	194 static void non_ecm_rx_status(void *user_data, int status);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	195 static void hdlc_rx_status(void *user_data, int status);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	196
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	197 static __inline__ void t31_set_at_rx_mode(t31_state_t *s, int new_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	198 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	199 s->at_state.at_rx_mode = new_mode;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	200 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	201 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	202
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	203 #if 0
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	204 static void monitor_control_messages(t31_state_t s, const uint8_t buf, int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	205 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	206 /* Monitor the control messages, at the point where we have the whole message, so we can
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	207 see what is happening to things like training success/failure. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	208 span_log(&s->logging, SPAN_LOG_FLOW, "Monitoring %s\n", t30_frametype(buf[2]));
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	209 if (len < 3)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	210 return;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	211 /endif/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	212 switch (buf[2])
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	213 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	214 case T30_DCS:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	215 case T30_DCS \| 1:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	216 /* We need to know if ECM is about to be used, so we can fake HDLC stuff. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	217 s->t38_fe.ecm_mode = (len >= 7) && (buf[6] & DISBIT3);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	218 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	219 default:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	220 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	221 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	222 /endswitch/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	223 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	224 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	225 #endif
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	226
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	227 static void front_end_status(t31_state_t *s, int status)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	228 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	229 span_log(&s->logging, SPAN_LOG_FLOW, "Front end status %d\n", status);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	230 switch (status)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	231 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	232 case T30_FRONT_END_SEND_STEP_COMPLETE:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	233 switch (s->modem)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	234 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	235 case FAX_MODEM_SILENCE_TX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	236 s->modem = FAX_MODEM_NONE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	237 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_OK);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	238 if (s->at_state.do_hangup)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	239 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	240 at_modem_control(&s->at_state, AT_MODEM_CONTROL_HANGUP, NULL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	241 t31_set_at_rx_mode(s, AT_MODE_ONHOOK_COMMAND);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	242 s->at_state.do_hangup = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	243 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	244 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	245 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	246 t31_set_at_rx_mode(s, AT_MODE_OFFHOOK_COMMAND);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	247 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	248 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	249 case FAX_MODEM_CED_TONE:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	250 /* Go directly to V.21/HDLC transmit. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	251 s->modem = FAX_MODEM_NONE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	252 restart_modem(s, FAX_MODEM_V21_TX);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	253 t31_set_at_rx_mode(s, AT_MODE_HDLC);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	254 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	255 case FAX_MODEM_V21_TX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	256 case FAX_MODEM_V17_TX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	257 case FAX_MODEM_V27TER_TX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	258 case FAX_MODEM_V29_TX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	259 s->modem = FAX_MODEM_NONE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	260 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_OK);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	261 t31_set_at_rx_mode(s, AT_MODE_OFFHOOK_COMMAND);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	262 restart_modem(s, FAX_MODEM_SILENCE_TX);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	263 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	264 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	265 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	266 case T30_FRONT_END_RECEIVE_COMPLETE:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	267 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	268 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	269 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	270 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	271
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	272 static int extra_bits_in_stuffed_frame(const uint8_t buf[], int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	273 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	274 int bitstream;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	275 int ones;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	276 int stuffed;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	277 int i;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	278 int j;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	279
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	280 bitstream = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	281 ones = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	282 stuffed = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	283 /* We should really append the CRC, and include the stuffed bits for that, to get
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	284 the exact number of bits in the frame. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	285 //len = crc_itu16_append(buf, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	286 for (i = 0; i < len; i++)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	287 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	288 bitstream = buf[i];
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	289 for (j = 0; j < 8; j++)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	290 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	291 if ((bitstream & 1))
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	292 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	293 if (++ones >= 5)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	294 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	295 ones = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	296 stuffed++;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	297 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	298 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	299 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	300 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	301 ones = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	302 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	303 bitstream >>= 1;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	304 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	305 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	306 /* The total length of the frame is:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	307 the number of bits in the body
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	308 + the number of additional bits in the body due to stuffing
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	309 + the number of bits in the CRC
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	310 + the number of additional bits in the CRC due to stuffing
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	311 + 16 bits for the two terminating flag octets.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	312 Lets just allow 3 bits for the CRC, which is the worst case. It
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	313 avoids calculating the real CRC, and the worst it can do is cause
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	314 a flag octet's worth of additional output.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	315 */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	316 return stuffed + 16 + 3 + 16;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	317 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	318 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	319
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	320 static int process_rx_missing(t38_core_state_t t, void user_data, int rx_seq_no, int expected_seq_no)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	321 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	322 t31_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	323
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	324 s = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	325 s->t38_fe.rx_data_missing = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	326 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	327 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	328 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	329
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	330 static int process_rx_indicator(t38_core_state_t t, void user_data, int indicator)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	331 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	332 t31_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	333 t31_t38_front_end_state_t *fe;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	334
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	335 s = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	336 fe = &s->t38_fe;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	337
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	338 if (t->current_rx_indicator == indicator)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	339 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	340 /* This is probably due to the far end repeating itself, or slipping
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	341 preamble messages in between HDLC frames. T.38/V.1.3 tells us to
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	342 ignore it. Its harmless. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	343 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	344 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	345 /* In termination mode we don't care very much about indicators telling us training
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	346 is starting. We only care about V.21 preamble starting, for timeout control, and
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	347 the actual data. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	348 switch (indicator)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	349 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	350 case T38_IND_NO_SIGNAL:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	351 if (t->current_rx_indicator == T38_IND_V21_PREAMBLE
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	352 &&
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	353 (fe->current_rx_type == T30_MODEM_V21 \|\| fe->current_rx_type == T30_MODEM_CNG))
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	354 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	355 hdlc_rx_status(s, SIG_STATUS_CARRIER_DOWN);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	356 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	357 fe->timeout_rx_samples = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	358 front_end_status(s, T30_FRONT_END_SIGNAL_ABSENT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	359 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	360 case T38_IND_CNG:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	361 front_end_status(s, T30_FRONT_END_CNG_PRESENT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	362 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	363 case T38_IND_CED:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	364 front_end_status(s, T30_FRONT_END_CED_PRESENT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	365 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	366 case T38_IND_V21_PREAMBLE:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	367 /* Some T.38 implementations insert these preamble indicators between HDLC frames, so
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	368 we need to be tolerant of that. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	369 fe->timeout_rx_samples = fe->samples + ms_to_samples(MID_RX_TIMEOUT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	370 front_end_status(s, T30_FRONT_END_SIGNAL_PRESENT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	371 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	372 case T38_IND_V27TER_2400_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	373 case T38_IND_V27TER_4800_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	374 case T38_IND_V29_7200_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	375 case T38_IND_V29_9600_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	376 case T38_IND_V17_7200_SHORT_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	377 case T38_IND_V17_7200_LONG_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	378 case T38_IND_V17_9600_SHORT_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	379 case T38_IND_V17_9600_LONG_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	380 case T38_IND_V17_12000_SHORT_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	381 case T38_IND_V17_12000_LONG_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	382 case T38_IND_V17_14400_SHORT_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	383 case T38_IND_V17_14400_LONG_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	384 case T38_IND_V33_12000_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	385 case T38_IND_V33_14400_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	386 /* We really don't care what kind of modem is delivering the following image data.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	387 We only care that some kind of fast modem signal is coming next. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	388 fe->timeout_rx_samples = fe->samples + ms_to_samples(MID_RX_TIMEOUT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	389 front_end_status(s, T30_FRONT_END_SIGNAL_PRESENT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	390 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	391 case T38_IND_V8_ANSAM:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	392 case T38_IND_V8_SIGNAL:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	393 case T38_IND_V34_CNTL_CHANNEL_1200:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	394 case T38_IND_V34_PRI_CHANNEL:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	395 case T38_IND_V34_CC_RETRAIN:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	396 /* V.34 support is a work in progress. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	397 front_end_status(s, T30_FRONT_END_SIGNAL_PRESENT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	398 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	399 default:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	400 front_end_status(s, T30_FRONT_END_SIGNAL_ABSENT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	401 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	402 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	403 fe->hdlc_rx.len = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	404 fe->rx_data_missing = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	405 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	406 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	407 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	408
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	409 static int process_rx_data(t38_core_state_t t, void user_data, int data_type, int field_type, const uint8_t *buf, int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	410 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	411 t31_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	412 t31_t38_front_end_state_t *fe;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	413 #if defined(_MSC_VER)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	414 uint8_t buf2 = (uint8_t ) _alloca(len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	415 #else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	416 uint8_t buf2[len];
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	417 #endif
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	418
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	419 s = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	420 fe = &s->t38_fe;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	421 #if 0
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	422 /* In termination mode we don't care very much what the data type is. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	423 switch (data_type)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	424 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	425 case T38_DATA_V21:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	426 case T38_DATA_V27TER_2400:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	427 case T38_DATA_V27TER_4800:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	428 case T38_DATA_V29_7200:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	429 case T38_DATA_V29_9600:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	430 case T38_DATA_V17_7200:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	431 case T38_DATA_V17_9600:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	432 case T38_DATA_V17_12000:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	433 case T38_DATA_V17_14400:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	434 case T38_DATA_V8:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	435 case T38_DATA_V34_PRI_RATE:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	436 case T38_DATA_V34_CC_1200:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	437 case T38_DATA_V34_PRI_CH:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	438 case T38_DATA_V33_12000:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	439 case T38_DATA_V33_14400:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	440 default:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	441 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	442 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	443 #endif
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	444 switch (field_type)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	445 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	446 case T38_FIELD_HDLC_DATA:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	447 if (fe->timeout_rx_samples == 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	448 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	449 /* HDLC can just start without any signal indicator on some platforms, even when
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	450 there is zero packet lost. Nasty, but true. Its a good idea to be tolerant of
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	451 loss, though, so accepting a sudden start of HDLC data is the right thing to do. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	452 fe->timeout_rx_samples = fe->samples + ms_to_samples(MID_RX_TIMEOUT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	453 front_end_status(s, T30_FRONT_END_SIGNAL_PRESENT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	454 /* All real HDLC messages in the FAX world start with 0xFF. If this one is not starting
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	455 with 0xFF it would appear some octets must have been missed before this one. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	456 if (len <= 0 \|\| buf[0] != 0xFF)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	457 fe->rx_data_missing = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	458 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	459 if (len > 0 && fe->hdlc_rx.len + len <= T31_T38_MAX_HDLC_LEN)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	460 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	461 bit_reverse(fe->hdlc_rx.buf + fe->hdlc_rx.len, buf, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	462 fe->hdlc_rx.len += len;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	463 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	464 fe->timeout_rx_samples = fe->samples + ms_to_samples(MID_RX_TIMEOUT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	465 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	466 case T38_FIELD_HDLC_FCS_OK:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	467 if (len > 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	468 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	469 span_log(&s->logging, SPAN_LOG_WARNING, "There is data in a T38_FIELD_HDLC_FCS_OK!\n");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	470 /* The sender has incorrectly included data in this message. It is unclear what we should do
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	471 with it, to maximise tolerance of buggy implementations. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	472 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	473 /* Some T.38 implementations send multiple T38_FIELD_HDLC_FCS_OK messages, in IFP packets with
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	474 incrementing sequence numbers, which are actually repeats. They get through to this point because
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	475 of the incrementing sequence numbers. We need to filter them here in a context sensitive manner. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	476 if (t->current_rx_data_type != data_type \|\| t->current_rx_field_type != field_type)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	477 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	478 span_log(&s->logging, SPAN_LOG_FLOW, "Type %s - CRC OK (%s)\n", (fe->hdlc_rx.len >= 3) ? t30_frametype(fe->hdlc_rx.buf[2]) : "???", (fe->rx_data_missing) ? "missing octets" : "clean");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	479 crc_itu16_append(fe->hdlc_rx.buf, fe->hdlc_rx.len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	480 hdlc_accept_frame(s, fe->hdlc_rx.buf, fe->hdlc_rx.len, !fe->rx_data_missing);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	481 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	482 fe->hdlc_rx.len = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	483 fe->rx_data_missing = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	484 fe->timeout_rx_samples = fe->samples + ms_to_samples(MID_RX_TIMEOUT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	485 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	486 case T38_FIELD_HDLC_FCS_BAD:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	487 if (len > 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	488 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	489 span_log(&s->logging, SPAN_LOG_WARNING, "There is data in a T38_FIELD_HDLC_FCS_BAD!\n");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	490 /* The sender has incorrectly included data in this message. We can safely ignore it, as the
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	491 bad FCS means we will throw away the whole message, anyway. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	492 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	493 /* Some T.38 implementations send multiple T38_FIELD_HDLC_FCS_BAD messages, in IFP packets with
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	494 incrementing sequence numbers, which are actually repeats. They get through to this point because
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	495 of the incrementing sequence numbers. We need to filter them here in a context sensitive manner. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	496 if (t->current_rx_data_type != data_type \|\| t->current_rx_field_type != field_type)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	497 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	498 span_log(&s->logging, SPAN_LOG_FLOW, "Type %s - CRC bad (%s)\n", (fe->hdlc_rx.len >= 3) ? t30_frametype(fe->hdlc_rx.buf[2]) : "???", (fe->rx_data_missing) ? "missing octets" : "clean");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	499 hdlc_accept_frame(s, fe->hdlc_rx.buf, fe->hdlc_rx.len, FALSE);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	500 }

4

26cd8f1ef0b1 import spandsp-0.0.6pre17