Mercurial > hg > audiostuff
annotate spandsp-0.0.6pre17/src/t38_gateway.c @ 4:26cd8f1ef0b1
import spandsp-0.0.6pre17
author | Peter Meerwald <pmeerw@cosy.sbg.ac.at> |
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date | Fri, 25 Jun 2010 15:50:58 +0200 |
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rev | line source |
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4
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
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1 //#define LOG_FAX_AUDIO |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2 /* |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
3 * SpanDSP - a series of DSP components for telephony |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
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4 * |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
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5 * t38_gateway.c - A T.38 gateway, less the packet exchange part |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
6 * |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
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|
7 * Written by Steve Underwood <steveu@coppice.org> |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
8 * |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
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9 * Copyright (C) 2005, 2006, 2007, 2008 Steve Underwood |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
10 * |
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import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
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11 * All rights reserved. |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
12 * |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
13 * This program is free software; you can redistribute it and/or modify |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
14 * it under the terms of the GNU Lesser General Public License version 2.1, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
15 * as published by the Free Software Foundation. |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
16 * |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
17 * This program is distributed in the hope that it will be useful, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
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18 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
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|
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
20 * GNU Lesser General Public License for more details. |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
21 * |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
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22 * You should have received a copy of the GNU Lesser General Public |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
23 * License along with this program; if not, write to the Free Software |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
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24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
25 * |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
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26 * $Id: t38_gateway.c,v 1.171.4.2 2009/12/19 10:44:10 steveu Exp $ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
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|
27 */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
28 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
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29 /*! \file */ |
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import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
30 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
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31 #if defined(HAVE_CONFIG_H) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
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32 #include "config.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
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33 #endif |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
34 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
35 #include <inttypes.h> |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
36 #include <stdlib.h> |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
37 #include <stdio.h> |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
38 #include <fcntl.h> |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
39 #include <time.h> |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
40 #include <string.h> |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
41 #if defined(HAVE_TGMATH_H) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
42 #include <tgmath.h> |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
43 #endif |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
44 #if defined(HAVE_MATH_H) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
45 #include <math.h> |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
46 #endif |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
47 #include "floating_fudge.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
48 #include <assert.h> |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
49 #if defined(LOG_FAX_AUDIO) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
50 #include <unistd.h> |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
51 #endif |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
52 #include <tiffio.h> |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
53 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
54 #include "spandsp/telephony.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
55 #include "spandsp/logging.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
56 #include "spandsp/queue.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
57 #include "spandsp/dc_restore.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
58 #include "spandsp/bit_operations.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
59 #include "spandsp/power_meter.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
60 #include "spandsp/complex.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
61 #include "spandsp/tone_detect.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
62 #include "spandsp/tone_generate.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
63 #include "spandsp/async.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
64 #include "spandsp/crc.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
65 #include "spandsp/hdlc.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
66 #include "spandsp/silence_gen.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
67 #include "spandsp/fsk.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
68 #include "spandsp/v29tx.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
69 #include "spandsp/v29rx.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
70 #include "spandsp/v27ter_tx.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
71 #include "spandsp/v27ter_rx.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
72 #include "spandsp/v17tx.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
73 #include "spandsp/v17rx.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
74 #include "spandsp/super_tone_rx.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
75 #include "spandsp/modem_connect_tones.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
76 #include "spandsp/t4_rx.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
77 #include "spandsp/t4_tx.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
78 #include "spandsp/t30_fcf.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
79 #include "spandsp/t35.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
80 #include "spandsp/t30.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
81 #include "spandsp/t30_logging.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
82 #include "spandsp/fax_modems.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
83 #include "spandsp/t38_core.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
84 #include "spandsp/t38_non_ecm_buffer.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
85 #include "spandsp/t38_gateway.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
86 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
87 #include "spandsp/private/logging.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
88 #include "spandsp/private/silence_gen.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
89 #include "spandsp/private/fsk.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
90 #include "spandsp/private/v17tx.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
91 #include "spandsp/private/v17rx.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
92 #include "spandsp/private/v27ter_tx.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
93 #include "spandsp/private/v27ter_rx.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
94 #include "spandsp/private/v29tx.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
95 #include "spandsp/private/v29rx.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
96 #include "spandsp/private/modem_connect_tones.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
97 #include "spandsp/private/hdlc.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
98 #include "spandsp/private/fax_modems.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
99 #include "spandsp/private/t4_rx.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
100 #include "spandsp/private/t4_tx.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
101 #include "spandsp/private/t30.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
102 #include "spandsp/private/t38_core.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
103 #include "spandsp/private/t38_non_ecm_buffer.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
104 #include "spandsp/private/t38_gateway.h" |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
105 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
106 /* This is the target time per transmission chunk. The actual |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
107 packet timing will sync to the data octets. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
108 /*! The default number of milliseconds per transmitted IFP when sending bulk T.38 data */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
109 #define MS_PER_TX_CHUNK 30 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
110 /*! The number of bytes which must be in the audio to T.38 HDLC buffer before we start |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
111 outputting them as IFP messages. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
112 #define HDLC_START_BUFFER_LEVEL 8 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
113 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
114 /*! The number of transmissions of indicator IFP packets */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
115 #define INDICATOR_TX_COUNT 3 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
116 /*! The number of transmissions of data IFP packets */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
117 #define DATA_TX_COUNT 1 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
118 /*! The number of transmissions of terminating data IFP packets */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
119 #define DATA_END_TX_COUNT 3 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
120 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
121 enum |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
122 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
123 DISBIT1 = 0x01, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
124 DISBIT2 = 0x02, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
125 DISBIT3 = 0x04, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
126 DISBIT4 = 0x08, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
127 DISBIT5 = 0x10, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
128 DISBIT6 = 0x20, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
129 DISBIT7 = 0x40, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
130 DISBIT8 = 0x80 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
131 }; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
132 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
133 enum |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
134 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
135 T38_NONE, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
136 T38_V27TER_RX, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
137 T38_V29_RX, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
138 T38_V17_RX |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
139 }; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
140 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
141 enum |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
142 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
143 HDLC_FLAG_FINISHED = 0x01, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
144 HDLC_FLAG_CORRUPT_CRC = 0x02, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
145 HDLC_FLAG_PROCEED_WITH_OUTPUT = 0x04, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
146 HDLC_FLAG_MISSING_DATA = 0x08 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
147 }; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
148 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
149 enum |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
150 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
151 FLAG_INDICATOR = 0x100, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
152 FLAG_DATA = 0x200 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
153 }; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
154 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
155 enum |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
156 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
157 TIMED_MODE_STARTUP = 0, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
158 TIMED_MODE_IDLE, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
159 TIMED_MODE_TCF_PREDICTABLE_MODEM_START_FAST_MODEM_ANNOUNCED, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
160 TIMED_MODE_TCF_PREDICTABLE_MODEM_START_FAST_MODEM_SEEN, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
161 TIMED_MODE_TCF_PREDICTABLE_MODEM_START_PAST_V21_MODEM, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
162 TIMED_MODE_TCF_PREDICTABLE_MODEM_START_BEGIN, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
163 }; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
164 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
165 /*! The maximum number of bytes to be zapped, in order to corrupt NSF, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
166 NSS and NSC messages, so the receiver does not recognise them. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
167 #define MAX_NSX_SUPPRESSION 10 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
168 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
169 /*! The number of consecutive flags to declare HDLC framing is OK. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
170 #define HDLC_FRAMING_OK_THRESHOLD 5 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
171 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
172 static uint8_t nsx_overwrite[2][MAX_NSX_SUPPRESSION] = |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
173 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
174 {0xFF, 0, 0, 0, 0, 0, 0, 0, 0, 0}, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
175 {0xFF, 0, 0, 0, 0, 0, 0, 0, 0, 0}, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
176 }; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
177 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
178 static int restart_rx_modem(t38_gateway_state_t *s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
179 static int process_rx_indicator(t38_core_state_t *t, void *user_data, int indicator); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
180 static void hdlc_underflow_handler(void *user_data); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
181 static void to_t38_buffer_init(t38_gateway_to_t38_state_t *s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
182 static void t38_hdlc_rx_put_bit(hdlc_rx_state_t *t, int new_bit); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
183 static void non_ecm_put_bit(void *user_data, int bit); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
184 static void non_ecm_remove_fill_and_put_bit(void *user_data, int bit); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
185 static void non_ecm_push_residue(t38_gateway_state_t *s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
186 static void tone_detected(void *user_data, int tone, int level, int delay); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
187 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
188 static void set_rx_handler(t38_gateway_state_t *s, span_rx_handler_t *handler, void *user_data) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
189 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
190 if (s->audio.modems.rx_handler != span_dummy_rx) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
191 s->audio.modems.rx_handler = handler; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
192 s->audio.base_rx_handler = handler; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
193 s->audio.modems.rx_user_data = user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
194 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
195 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
196 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
197 static void set_tx_handler(t38_gateway_state_t *s, span_tx_handler_t *handler, void *user_data) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
198 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
199 s->audio.modems.tx_handler = handler; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
200 s->audio.modems.tx_user_data = user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
201 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
202 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
203 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
204 static void set_next_tx_handler(t38_gateway_state_t *s, span_tx_handler_t *handler, void *user_data) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
205 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
206 s->audio.modems.next_tx_handler = handler; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
207 s->audio.modems.next_tx_user_data = user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
208 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
209 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
210 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
211 static void set_rx_active(t38_gateway_state_t *s, int active) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
212 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
213 s->audio.modems.rx_handler = (active) ? s->audio.base_rx_handler : span_dummy_rx; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
214 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
215 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
216 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
217 static int v17_v21_rx(void *user_data, const int16_t amp[], int len) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
218 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
219 t38_gateway_state_t *t; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
220 fax_modems_state_t *s; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
221 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
222 t = (t38_gateway_state_t *) user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
223 s = &t->audio.modems; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
224 v17_rx(&s->v17_rx, amp, len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
225 if (s->rx_trained) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
226 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
227 /* The fast modem has trained, so we no longer need to run the slow |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
228 one in parallel. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
229 span_log(&t->logging, SPAN_LOG_FLOW, "Switching from V.17 + V.21 to V.17 (%.2fdBm0)\n", v17_rx_signal_power(&s->v17_rx)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
230 set_rx_handler(t, (span_rx_handler_t *) &v17_rx, &s->v17_rx); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
231 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
232 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
233 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
234 fsk_rx(&s->v21_rx, amp, len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
235 if (s->rx_signal_present) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
236 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
237 span_log(&t->logging, SPAN_LOG_FLOW, "Switching from V.17 + V.21 to V.21 (%.2fdBm0)\n", fsk_rx_signal_power(&s->v21_rx)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
238 set_rx_handler(t, (span_rx_handler_t *) &fsk_rx, &s->v21_rx); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
239 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
240 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
241 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
242 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
243 return 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
244 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
245 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
246 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
247 static int v27ter_v21_rx(void *user_data, const int16_t amp[], int len) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
248 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
249 t38_gateway_state_t *t; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
250 fax_modems_state_t *s; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
251 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
252 t = (t38_gateway_state_t *) user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
253 s = &t->audio.modems; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
254 v27ter_rx(&s->v27ter_rx, amp, len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
255 if (s->rx_trained) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
256 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
257 /* The fast modem has trained, so we no longer need to run the slow |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
258 one in parallel. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
259 span_log(&t->logging, SPAN_LOG_FLOW, "Switching from V.27ter + V.21 to V.27ter (%.2fdBm0)\n", v27ter_rx_signal_power(&s->v27ter_rx)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
260 set_rx_handler(t, (span_rx_handler_t *) &v27ter_rx, &s->v27ter_rx); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
261 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
262 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
263 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
264 fsk_rx(&s->v21_rx, amp, len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
265 if (s->rx_signal_present) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
266 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
267 span_log(&t->logging, SPAN_LOG_FLOW, "Switching from V.27ter + V.21 to V.21 (%.2fdBm0)\n", fsk_rx_signal_power(&s->v21_rx)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
268 set_rx_handler(t, (span_rx_handler_t *) &fsk_rx, &s->v21_rx); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
269 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
270 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
271 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
272 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
273 return 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
274 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
275 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
276 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
277 static int v29_v21_rx(void *user_data, const int16_t amp[], int len) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
278 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
279 t38_gateway_state_t *t; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
280 fax_modems_state_t *s; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
281 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
282 t = (t38_gateway_state_t *) user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
283 s = &t->audio.modems; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
284 v29_rx(&s->v29_rx, amp, len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
285 if (s->rx_trained) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
286 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
287 /* The fast modem has trained, so we no longer need to run the slow |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
288 one in parallel. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
289 span_log(&t->logging, SPAN_LOG_FLOW, "Switching from V.29 + V.21 to V.29 (%.2fdBm0)\n", v29_rx_signal_power(&s->v29_rx)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
290 set_rx_handler(t, (span_rx_handler_t *) &v29_rx, &s->v29_rx); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
291 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
292 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
293 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
294 fsk_rx(&s->v21_rx, amp, len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
295 if (s->rx_signal_present) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
296 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
297 span_log(&t->logging, SPAN_LOG_FLOW, "Switching from V.29 + V.21 to V.21 (%.2fdBm0)\n", fsk_rx_signal_power(&s->v21_rx)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
298 set_rx_handler(t, (span_rx_handler_t *) &fsk_rx, &s->v21_rx); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
299 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
300 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
301 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
302 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
303 return 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
304 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
305 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
306 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
307 static void tone_detected(void *user_data, int tone, int level, int delay) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
308 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
309 t38_gateway_state_t *s; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
310 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
311 s = (t38_gateway_state_t *) user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
312 span_log(&s->logging, SPAN_LOG_FLOW, "%s detected (%ddBm0)\n", modem_connect_tone_to_str(tone), level); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
313 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
314 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
315 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
316 static void hdlc_underflow_handler(void *user_data) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
317 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
318 t38_gateway_state_t *s; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
319 t38_gateway_hdlc_state_t *t; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
320 int old_data_type; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
321 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
322 s = (t38_gateway_state_t *) user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
323 t = &s->core.hdlc_to_modem; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
324 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC underflow at %d\n", t->out); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
325 /* If the current HDLC buffer is not at the HDLC_FLAG_PROCEED_WITH_OUTPUT stage, this |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
326 underflow must be an end of preamble condition. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
327 if ((t->buf[t->out].flags & HDLC_FLAG_PROCEED_WITH_OUTPUT)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
328 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
329 old_data_type = t->buf[t->out].contents; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
330 t->buf[t->out].len = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
331 t->buf[t->out].flags = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
332 t->buf[t->out].contents = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
333 if (++t->out >= T38_TX_HDLC_BUFS) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
334 t->out = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
335 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC next is 0x%X\n", t->buf[t->out].contents); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
336 if ((t->buf[t->out].contents & FLAG_INDICATOR)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
337 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
338 /* The next thing in the queue is an indicator, so we need to stop this modem. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
339 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC shutdown\n"); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
340 hdlc_tx_frame(&s->audio.modems.hdlc_tx, NULL, 0); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
341 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
342 else if ((t->buf[t->out].contents & FLAG_DATA)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
343 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
344 /* Check if we should start sending the next frame */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
345 if ((t->buf[t->out].flags & HDLC_FLAG_PROCEED_WITH_OUTPUT)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
346 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
347 /* This frame is ready to go, and uses the same modem we are running now. So, send |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
348 whatever we have. This might or might not be an entire frame. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
349 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC start next frame\n"); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
350 hdlc_tx_frame(&s->audio.modems.hdlc_tx, t->buf[t->out].buf, t->buf[t->out].len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
351 if ((t->buf[t->out].flags & HDLC_FLAG_CORRUPT_CRC)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
352 hdlc_tx_corrupt_frame(&s->audio.modems.hdlc_tx); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
353 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
354 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
355 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
356 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
357 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
358 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
359 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
360 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
361 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
362 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
363 static int set_next_tx_type(t38_gateway_state_t *s) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
364 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
365 get_bit_func_t get_bit_func; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
366 void *get_bit_user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
367 int indicator; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
368 int short_train; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
369 fax_modems_state_t *t; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
370 t38_gateway_hdlc_state_t *u; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
371 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
372 t = &s->audio.modems; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
373 u = &s->core.hdlc_to_modem; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
374 t38_non_ecm_buffer_report_output_status(&s->core.non_ecm_to_modem, &s->logging); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
375 if (t->next_tx_handler) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
376 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
377 /* There is a handler queued, so that is the next one. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
378 set_tx_handler(s, t->next_tx_handler, t->next_tx_user_data); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
379 set_next_tx_handler(s, NULL, NULL); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
380 if (t->tx_handler == (span_tx_handler_t *) &(silence_gen) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
381 || |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
382 t->tx_handler == (span_tx_handler_t *) &(tone_gen)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
383 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
384 set_rx_active(s, TRUE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
385 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
386 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
387 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
388 set_rx_active(s, FALSE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
389 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
390 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
391 return TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
392 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
393 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
394 if (u->in == u->out) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
395 return FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
396 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
397 if ((u->buf[u->out].contents & FLAG_INDICATOR) == 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
398 return FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
399 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
400 indicator = (u->buf[u->out].contents & 0xFF); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
401 u->buf[u->out].len = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
402 u->buf[u->out].flags = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
403 u->buf[u->out].contents = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
404 if (++u->out >= T38_TX_HDLC_BUFS) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
405 u->out = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
406 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
407 span_log(&s->logging, SPAN_LOG_FLOW, "Changing to %s\n", t38_indicator_to_str(indicator)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
408 if (s->core.image_data_mode && s->core.ecm_mode) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
409 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
410 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC mode\n"); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
411 hdlc_tx_init(&t->hdlc_tx, FALSE, 2, TRUE, hdlc_underflow_handler, s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
412 get_bit_func = (get_bit_func_t) hdlc_tx_get_bit; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
413 get_bit_user_data = (void *) &t->hdlc_tx; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
414 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
415 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
416 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
417 span_log(&s->logging, SPAN_LOG_FLOW, "Non-ECM mode\n"); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
418 get_bit_func = t38_non_ecm_buffer_get_bit; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
419 get_bit_user_data = (void *) &s->core.non_ecm_to_modem; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
420 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
421 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
422 switch (indicator) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
423 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
424 case T38_IND_NO_SIGNAL: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
425 t->tx_bit_rate = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
426 /* Impose 75ms minimum on transmitted silence */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
427 //silence_gen_set(&t->silence_gen, ms_to_samples(75)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
428 set_tx_handler(s, (span_tx_handler_t *) &silence_gen, &t->silence_gen); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
429 set_next_tx_handler(s, (span_tx_handler_t *) NULL, NULL); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
430 set_rx_active(s, TRUE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
431 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
432 case T38_IND_CNG: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
433 t->tx_bit_rate = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
434 modem_connect_tones_tx_init(&t->connect_tx, MODEM_CONNECT_TONES_FAX_CNG); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
435 set_tx_handler(s, (span_tx_handler_t *) &modem_connect_tones_tx, &t->connect_tx); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
436 silence_gen_set(&t->silence_gen, 0); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
437 set_next_tx_handler(s, (span_tx_handler_t *) &silence_gen, &t->silence_gen); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
438 set_rx_active(s, TRUE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
439 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
440 case T38_IND_CED: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
441 t->tx_bit_rate = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
442 modem_connect_tones_tx_init(&t->connect_tx, MODEM_CONNECT_TONES_FAX_CED); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
443 set_tx_handler(s, (span_tx_handler_t *) &modem_connect_tones_tx, &t->connect_tx); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
444 set_next_tx_handler(s, (span_tx_handler_t *) NULL, NULL); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
445 set_rx_active(s, TRUE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
446 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
447 case T38_IND_V21_PREAMBLE: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
448 t->tx_bit_rate = 300; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
449 hdlc_tx_init(&t->hdlc_tx, FALSE, 2, TRUE, hdlc_underflow_handler, s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
450 hdlc_tx_flags(&t->hdlc_tx, 32); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
451 silence_gen_alter(&t->silence_gen, ms_to_samples(75)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
452 u->buf[u->in].len = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
453 fsk_tx_init(&t->v21_tx, &preset_fsk_specs[FSK_V21CH2], (get_bit_func_t) hdlc_tx_get_bit, &t->hdlc_tx); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
454 set_tx_handler(s, (span_tx_handler_t *) &silence_gen, &t->silence_gen); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
455 set_next_tx_handler(s, (span_tx_handler_t *) &fsk_tx, &t->v21_tx); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
456 set_rx_active(s, TRUE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
457 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
458 case T38_IND_V27TER_2400_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
459 case T38_IND_V27TER_4800_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
460 switch (indicator) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
461 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
462 case T38_IND_V27TER_2400_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
463 t->tx_bit_rate = 2400; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
464 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
465 case T38_IND_V27TER_4800_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
466 t->tx_bit_rate = 2400; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
467 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
468 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
469 /*endswitch*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
470 silence_gen_alter(&t->silence_gen, ms_to_samples(75)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
471 v27ter_tx_restart(&t->v27ter_tx, t->tx_bit_rate, t->use_tep); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
472 v27ter_tx_set_get_bit(&t->v27ter_tx, get_bit_func, get_bit_user_data); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
473 set_tx_handler(s, (span_tx_handler_t *) &silence_gen, &t->silence_gen); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
474 set_next_tx_handler(s, (span_tx_handler_t *) &v27ter_tx, &t->v27ter_tx); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
475 set_rx_active(s, TRUE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
476 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
477 case T38_IND_V29_7200_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
478 case T38_IND_V29_9600_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
479 switch (indicator) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
480 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
481 case T38_IND_V29_7200_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
482 t->tx_bit_rate = 7200; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
483 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
484 case T38_IND_V29_9600_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
485 t->tx_bit_rate = 9600; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
486 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
487 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
488 /*endswitch*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
489 silence_gen_alter(&t->silence_gen, ms_to_samples(75)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
490 v29_tx_restart(&t->v29_tx, t->tx_bit_rate, t->use_tep); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
491 v29_tx_set_get_bit(&t->v29_tx, get_bit_func, get_bit_user_data); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
492 set_tx_handler(s, (span_tx_handler_t *) &silence_gen, &t->silence_gen); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
493 set_next_tx_handler(s, (span_tx_handler_t *) &v29_tx, &t->v29_tx); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
494 set_rx_active(s, TRUE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
495 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
496 case T38_IND_V17_7200_SHORT_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
497 case T38_IND_V17_7200_LONG_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
498 case T38_IND_V17_9600_SHORT_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
499 case T38_IND_V17_9600_LONG_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
500 case T38_IND_V17_12000_SHORT_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
501 case T38_IND_V17_12000_LONG_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
502 case T38_IND_V17_14400_SHORT_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
503 case T38_IND_V17_14400_LONG_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
504 short_train = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
505 switch (indicator) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
506 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
507 case T38_IND_V17_7200_SHORT_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
508 short_train = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
509 t->tx_bit_rate = 7200; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
510 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
511 case T38_IND_V17_7200_LONG_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
512 t->tx_bit_rate = 7200; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
513 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
514 case T38_IND_V17_9600_SHORT_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
515 short_train = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
516 t->tx_bit_rate = 9600; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
517 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
518 case T38_IND_V17_9600_LONG_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
519 t->tx_bit_rate = 9600; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
520 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
521 case T38_IND_V17_12000_SHORT_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
522 short_train = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
523 t->tx_bit_rate = 12000; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
524 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
525 case T38_IND_V17_12000_LONG_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
526 t->tx_bit_rate = 12000; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
527 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
528 case T38_IND_V17_14400_SHORT_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
529 short_train = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
530 t->tx_bit_rate = 14400; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
531 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
532 case T38_IND_V17_14400_LONG_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
533 t->tx_bit_rate = 14400; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
534 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
535 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
536 /*endswitch*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
537 silence_gen_alter(&t->silence_gen, ms_to_samples(75)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
538 v17_tx_restart(&t->v17_tx, t->tx_bit_rate, t->use_tep, short_train); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
539 v17_tx_set_get_bit(&t->v17_tx, get_bit_func, get_bit_user_data); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
540 set_tx_handler(s, (span_tx_handler_t *) &silence_gen, &t->silence_gen); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
541 set_next_tx_handler(s, (span_tx_handler_t *) &v17_tx, &t->v17_tx); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
542 set_rx_active(s, TRUE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
543 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
544 case T38_IND_V8_ANSAM: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
545 t->tx_bit_rate = 300; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
546 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
547 case T38_IND_V8_SIGNAL: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
548 t->tx_bit_rate = 300; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
549 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
550 case T38_IND_V34_CNTL_CHANNEL_1200: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
551 t->tx_bit_rate = 1200; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
552 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
553 case T38_IND_V34_PRI_CHANNEL: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
554 t->tx_bit_rate = 33600; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
555 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
556 case T38_IND_V34_CC_RETRAIN: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
557 t->tx_bit_rate = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
558 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
559 case T38_IND_V33_12000_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
560 t->tx_bit_rate = 12000; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
561 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
562 case T38_IND_V33_14400_TRAINING: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
563 t->tx_bit_rate = 14400; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
564 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
565 default: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
566 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
567 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
568 /*endswitch*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
569 /* For any fast modem, set 200ms of preamble flags */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
570 if (t->tx_bit_rate > 300) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
571 hdlc_tx_flags(&t->hdlc_tx, t->tx_bit_rate/(8*5)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
572 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
573 s->t38x.in_progress_rx_indicator = indicator; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
574 return TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
575 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
576 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
577 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
578 static void finalise_hdlc_frame(t38_gateway_state_t *s, int good_fcs) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
579 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
580 t38_gateway_hdlc_buf_t *hdlc_buf; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
581 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
582 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
583 if (!good_fcs || (hdlc_buf->flags & HDLC_FLAG_MISSING_DATA)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
584 hdlc_buf->flags |= HDLC_FLAG_CORRUPT_CRC; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
585 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
586 if (s->core.hdlc_to_modem.in == s->core.hdlc_to_modem.out) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
587 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
588 /* This is the frame in progress at the output. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
589 if ((hdlc_buf->flags & HDLC_FLAG_PROCEED_WITH_OUTPUT) == 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
590 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
591 /* Output of this frame has not yet begun. Throw it all out now. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
592 hdlc_tx_frame(&s->audio.modems.hdlc_tx, hdlc_buf->buf, hdlc_buf->len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
593 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
594 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
595 if ((hdlc_buf->flags & HDLC_FLAG_CORRUPT_CRC)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
596 hdlc_tx_corrupt_frame(&s->audio.modems.hdlc_tx); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
597 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
598 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
599 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
600 hdlc_buf->flags |= (HDLC_FLAG_PROCEED_WITH_OUTPUT | HDLC_FLAG_FINISHED); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
601 if (++s->core.hdlc_to_modem.in >= T38_TX_HDLC_BUFS) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
602 s->core.hdlc_to_modem.in = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
603 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
604 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
605 hdlc_buf->len = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
606 hdlc_buf->flags = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
607 hdlc_buf->contents = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
608 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
609 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
610 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
611 static void edit_control_messages(t38_gateway_state_t *s, int from_modem, uint8_t *buf, int len) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
612 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
613 /* Frames need to be fed to this routine byte by byte as they arrive. It basically just |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
614 edits the last byte received, based on the frame up to that point. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
615 if (s->t38x.corrupt_current_frame[from_modem]) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
616 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
617 /* We simply need to overwrite a section of the message, so it is not recognisable at |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
618 the receiver. This is used for the NSF, NSC, and NSS messages. Several strategies are |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
619 possible for the replacement data. If you have a manufacturer code of your own, the |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
620 sane thing is to overwrite the original data with that. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
621 if (len <= s->t38x.suppress_nsx_len[from_modem]) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
622 buf[len - 1] = nsx_overwrite[from_modem][len - 4]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
623 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
624 return; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
625 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
626 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
627 /* Edit the message, if we need to control the communication between the end points. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
628 switch (len) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
629 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
630 case 3: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
631 switch (buf[2]) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
632 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
633 case T30_NSF: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
634 case T30_NSC: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
635 case T30_NSS: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
636 if (s->t38x.suppress_nsx_len[from_modem]) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
637 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
638 /* Corrupt the message, so it will be ignored by the far end. If it were |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
639 processed, 2 machines which recognise each other might do special things |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
640 we cannot handle as a middle man. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
641 span_log(&s->logging, SPAN_LOG_FLOW, "Corrupting %s message to prevent recognition\n", t30_frametype(buf[2])); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
642 s->t38x.corrupt_current_frame[from_modem] = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
643 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
644 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
645 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
646 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
647 /*endswitch*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
648 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
649 case 4: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
650 switch (buf[2]) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
651 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
652 case T30_DIS: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
653 /* Make sure the V.8 capability doesn't pass through. If it |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
654 did then two V.34 capable FAX machines might start some |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
655 V.8 re-negotiation. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
656 buf[3] &= ~DISBIT6; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
657 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
658 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
659 /*endswitch*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
660 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
661 case 5: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
662 switch (buf[2]) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
663 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
664 case T30_DIS: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
665 /* We may need to adjust the capabilities, so they do not exceed our own */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
666 span_log(&s->logging, SPAN_LOG_FLOW, "Applying fast modem type constraints.\n"); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
667 switch (buf[4] & (DISBIT6 | DISBIT5 | DISBIT4 | DISBIT3)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
668 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
669 case 0: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
670 case DISBIT4: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
671 /* V.27ter only */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
672 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
673 case DISBIT3: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
674 case (DISBIT4 | DISBIT3): |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
675 /* V.27ter and V.29 */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
676 if (!(s->core.supported_modems & T30_SUPPORT_V29)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
677 buf[4] &= ~DISBIT3; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
678 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
679 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
680 case (DISBIT6 | DISBIT4 | DISBIT3): |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
681 /* V.27ter, V.29 and V.17 */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
682 if (!(s->core.supported_modems & T30_SUPPORT_V17)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
683 buf[4] &= ~DISBIT6; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
684 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
685 if (!(s->core.supported_modems & T30_SUPPORT_V29)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
686 buf[4] &= ~DISBIT3; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
687 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
688 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
689 case (DISBIT5 | DISBIT4): |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
690 case (DISBIT6 | DISBIT4): |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
691 case (DISBIT6 | DISBIT5 | DISBIT4): |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
692 case (DISBIT6 | DISBIT5 | DISBIT4 | DISBIT3): |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
693 /* Reserved */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
694 buf[4] &= ~(DISBIT6 | DISBIT5); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
695 buf[4] |= (DISBIT4 | DISBIT3); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
696 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
697 default: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
698 /* Not used */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
699 buf[4] &= ~(DISBIT6 | DISBIT5); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
700 buf[4] |= (DISBIT4 | DISBIT3); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
701 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
702 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
703 /*endswitch*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
704 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
705 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
706 /*endswitch*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
707 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
708 case 7: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
709 switch (buf[2]) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
710 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
711 case T30_DIS: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
712 if (!s->core.ecm_allowed) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
713 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
714 /* Do not allow ECM or T.6 coding */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
715 span_log(&s->logging, SPAN_LOG_FLOW, "Inhibiting ECM\n"); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
716 buf[6] &= ~(DISBIT3 | DISBIT7); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
717 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
718 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
719 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
720 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
721 /*endswitch*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
722 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
723 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
724 /*endswitch*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
725 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
726 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
727 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
728 static void monitor_control_messages(t38_gateway_state_t *s, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
729 int from_modem, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
730 const uint8_t *buf, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
731 int len) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
732 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
733 static const struct |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
734 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
735 int bit_rate; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
736 int modem_type; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
737 uint8_t dcs_code; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
738 } modem_codes[] = |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
739 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
740 {14400, T38_V17_RX, DISBIT6}, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
741 {12000, T38_V17_RX, (DISBIT6 | DISBIT4)}, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
742 { 9600, T38_V17_RX, (DISBIT6 | DISBIT3)}, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
743 { 9600, T38_V29_RX, DISBIT3}, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
744 { 7200, T38_V17_RX, (DISBIT6 | DISBIT4 | DISBIT3)}, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
745 { 7200, T38_V29_RX, (DISBIT4 | DISBIT3)}, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
746 { 4800, T38_V27TER_RX, DISBIT4}, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
747 { 2400, T38_V27TER_RX, 0}, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
748 { 0, T38_NONE, 0} |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
749 }; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
750 static const int minimum_scan_line_times[8] = |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
751 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
752 20, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
753 5, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
754 10, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
755 0, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
756 40, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
757 0, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
758 0, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
759 0 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
760 }; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
761 int dcs_code; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
762 int i; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
763 int j; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
764 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
765 /* Monitor the control messages, at the point where we have the whole message, so we can |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
766 see what is happening to things like training success/failure. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
767 span_log(&s->logging, SPAN_LOG_FLOW, "Monitoring %s\n", t30_frametype(buf[2])); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
768 if (len < 3) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
769 return; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
770 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
771 s->core.timed_mode = TIMED_MODE_IDLE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
772 switch (buf[2]) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
773 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
774 case T30_CFR: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
775 /* We are changing from TCF exchange to image exchange */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
776 /* Successful training means we should change to short training */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
777 s->core.image_data_mode = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
778 s->core.short_train = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
779 span_log(&s->logging, SPAN_LOG_FLOW, "CFR - short train = %d, ECM = %d\n", s->core.short_train, s->core.ecm_mode); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
780 if (!from_modem) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
781 restart_rx_modem(s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
782 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
783 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
784 case T30_RTN: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
785 case T30_RTP: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
786 /* We are going back to the exchange of fresh TCF */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
787 s->core.image_data_mode = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
788 s->core.short_train = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
789 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
790 case T30_CTR: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
791 /* T.30 says the first image data after this does full training, yet does not |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
792 return to TCF. This seems to be the sole case of long training for image |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
793 data. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
794 s->core.short_train = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
795 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
796 case T30_DTC: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
797 case T30_DCS: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
798 case T30_DCS | 1: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
799 /* We need to check which modem type is about to be used, so we can start the |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
800 correct modem. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
801 s->core.fast_bit_rate = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
802 s->core.fast_rx_modem = T38_NONE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
803 s->core.image_data_mode = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
804 s->core.short_train = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
805 if (from_modem) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
806 s->core.timed_mode = TIMED_MODE_TCF_PREDICTABLE_MODEM_START_BEGIN; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
807 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
808 if (len >= 5) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
809 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
810 /* The table is short, and not searched often, so a brain-dead linear scan seems OK */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
811 dcs_code = buf[4] & (DISBIT6 | DISBIT5 | DISBIT4 | DISBIT3); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
812 for (i = 0; modem_codes[i].bit_rate; i++) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
813 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
814 if (modem_codes[i].dcs_code == dcs_code) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
815 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
816 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
817 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
818 /*endfor*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
819 /* If we are processing a message from the modem side, the contents determine the fast receive modem. |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
820 we are to use. If it comes from the T.38 side the contents do not. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
821 s->core.fast_bit_rate = modem_codes[i].bit_rate; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
822 if (from_modem) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
823 s->core.fast_rx_modem = modem_codes[i].modem_type; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
824 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
825 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
826 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
827 if (len >= 6) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
828 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
829 j = (buf[5] & (DISBIT7 | DISBIT6 | DISBIT5)) >> 4; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
830 span_log(&s->logging, SPAN_LOG_FLOW, "Min bits test = 0x%X\n", buf[5]); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
831 s->core.min_row_bits = (s->core.fast_bit_rate*minimum_scan_line_times[j])/1000; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
832 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
833 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
834 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
835 s->core.min_row_bits = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
836 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
837 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
838 s->core.ecm_mode = (len >= 7) && (buf[6] & DISBIT3); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
839 span_log(&s->logging, SPAN_LOG_FLOW, "Fast rx modem = %d/%d, ECM = %d, Min bits per row = %d\n", s->core.fast_rx_modem, s->core.fast_bit_rate, s->core.ecm_mode, s->core.min_row_bits); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
840 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
841 case T30_PPS: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
842 case T30_PPS | 1: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
843 switch (buf[3] & 0xFE) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
844 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
845 case T30_EOP: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
846 case T30_PRI_EOP: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
847 case T30_EOM: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
848 case T30_PRI_EOM: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
849 case T30_EOS: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
850 #if 0 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
851 /* If we are hitting one of these conditions, it will take another DCS/DTC to select |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
852 the fast modem again, so abandon our idea of it. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
853 s->core.fast_bit_rate = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
854 s->core.fast_rx_modem = T38_NONE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
855 s->core.image_data_mode = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
856 s->core.short_train = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
857 #endif |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
858 /* Fall through */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
859 case T30_MPS: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
860 case T30_PRI_MPS: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
861 s->core.count_page_on_mcf = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
862 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
863 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
864 /*endswitch*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
865 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
866 case T30_EOP: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
867 case T30_EOP | 1: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
868 case T30_PRI_EOP: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
869 case T30_PRI_EOP | 1: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
870 case T30_EOM: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
871 case T30_EOM | 1: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
872 case T30_PRI_EOM: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
873 case T30_PRI_EOM | 1: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
874 case T30_EOS: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
875 case T30_EOS | 1: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
876 #if 0 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
877 /* If we are hitting one of these conditions, it will take another DCS/DTC to select |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
878 the fast modem again, so abandon our idea of t. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
879 s->core.fast_bit_rate = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
880 s->core.fast_rx_modem = T38_NONE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
881 s->core.image_data_mode = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
882 s->core.short_train = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
883 #endif |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
884 /* Fall through */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
885 case T30_MPS: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
886 case T30_MPS | 1: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
887 case T30_PRI_MPS: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
888 case T30_PRI_MPS | 1: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
889 s->core.count_page_on_mcf = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
890 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
891 case T30_MCF: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
892 case T30_MCF | 1: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
893 if (s->core.count_page_on_mcf) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
894 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
895 s->core.pages_confirmed++; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
896 span_log(&s->logging, SPAN_LOG_FLOW, "Pages confirmed = %d\n", s->core.pages_confirmed); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
897 s->core.count_page_on_mcf = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
898 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
899 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
900 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
901 default: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
902 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
903 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
904 /*endswitch*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
905 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
906 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
907 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
908 static void queue_missing_indicator(t38_gateway_state_t *s, int data_type) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
909 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
910 t38_core_state_t *t; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
911 int expected; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
912 int expected_alt; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
913 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
914 t = &s->t38x.t38; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
915 expected = -1; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
916 expected_alt = -1; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
917 /* Missing packets might have lost us the indicator that should have put us in |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
918 the required mode of operation. It might be a bit late to fill in such a gap |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
919 now, but we should try. We may also want to force indicators into the queue, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
920 such as when the data says 'end of signal'. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
921 /* We have an expectation of whether long or short training should occur, but be |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
922 tolerant of either kind of indicator being present. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
923 switch (data_type) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
924 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
925 case T38_DATA_NONE: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
926 expected = T38_IND_NO_SIGNAL; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
927 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
928 case T38_DATA_V21: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
929 expected = T38_IND_V21_PREAMBLE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
930 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
931 case T38_DATA_V27TER_2400: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
932 expected = T38_IND_V27TER_2400_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
933 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
934 case T38_DATA_V27TER_4800: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
935 expected = T38_IND_V27TER_4800_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
936 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
937 case T38_DATA_V29_7200: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
938 expected = T38_IND_V29_7200_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
939 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
940 case T38_DATA_V29_9600: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
941 expected = T38_IND_V29_9600_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
942 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
943 case T38_DATA_V17_7200: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
944 expected = (s->core.short_train) ? T38_IND_V17_7200_SHORT_TRAINING : T38_IND_V17_7200_LONG_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
945 expected_alt = (s->core.short_train) ? T38_IND_V17_7200_LONG_TRAINING : T38_IND_V17_7200_SHORT_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
946 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
947 case T38_DATA_V17_9600: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
948 expected = (s->core.short_train) ? T38_IND_V17_9600_SHORT_TRAINING : T38_IND_V17_9600_LONG_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
949 expected_alt = (s->core.short_train) ? T38_IND_V17_9600_LONG_TRAINING : T38_IND_V17_9600_SHORT_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
950 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
951 case T38_DATA_V17_12000: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
952 expected = (s->core.short_train) ? T38_IND_V17_12000_SHORT_TRAINING : T38_IND_V17_12000_LONG_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
953 expected_alt = (s->core.short_train) ? T38_IND_V17_12000_LONG_TRAINING : T38_IND_V17_12000_SHORT_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
954 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
955 case T38_DATA_V17_14400: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
956 expected = (s->core.short_train) ? T38_IND_V17_14400_SHORT_TRAINING : T38_IND_V17_14400_LONG_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
957 expected_alt = (s->core.short_train) ? T38_IND_V17_14400_LONG_TRAINING : T38_IND_V17_14400_SHORT_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
958 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
959 case T38_DATA_V8: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
960 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
961 case T38_DATA_V34_PRI_RATE: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
962 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
963 case T38_DATA_V34_CC_1200: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
964 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
965 case T38_DATA_V34_PRI_CH: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
966 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
967 case T38_DATA_V33_12000: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
968 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
969 case T38_DATA_V33_14400: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
970 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
971 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
972 /*endswitch*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
973 if (expected < 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
974 return; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
975 if (t->current_rx_indicator == expected) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
976 return; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
977 if (expected_alt >= 0 && t->current_rx_indicator == expected_alt) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
978 return; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
979 span_log(&s->logging, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
980 SPAN_LOG_FLOW, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
981 "Queuing missing indicator - %s\n", |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
982 t38_indicator_to_str(expected)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
983 process_rx_indicator(t, (void *) s, expected); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
984 /* Force the indicator setting here, as the core won't set in when its missing. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
985 t->current_rx_indicator = expected; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
986 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
987 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
988 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
989 static int process_rx_missing(t38_core_state_t *t, void *user_data, int rx_seq_no, int expected_seq_no) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
990 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
991 t38_gateway_state_t *s; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
992 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
993 s = (t38_gateway_state_t *) user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
994 s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in].flags |= HDLC_FLAG_MISSING_DATA; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
995 return 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
996 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
997 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
998 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
999 static int process_rx_indicator(t38_core_state_t *t, void *user_data, int indicator) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1000 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1001 t38_gateway_state_t *s; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1002 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1003 s = (t38_gateway_state_t *) user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1004 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1005 t38_non_ecm_buffer_report_input_status(&s->core.non_ecm_to_modem, &s->logging); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1006 if (t->current_rx_indicator == indicator) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1007 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1008 /* This is probably due to the far end repeating itself. Ignore it. Its harmless */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1009 return 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1010 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1011 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1012 if (s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in].contents) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1013 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1014 if (++s->core.hdlc_to_modem.in >= T38_TX_HDLC_BUFS) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1015 s->core.hdlc_to_modem.in = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1016 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1017 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1018 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1019 s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in].contents = (indicator | FLAG_INDICATOR); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1020 if (++s->core.hdlc_to_modem.in >= T38_TX_HDLC_BUFS) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1021 s->core.hdlc_to_modem.in = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1022 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1023 t38_non_ecm_buffer_set_mode(&s->core.non_ecm_to_modem, s->core.image_data_mode, s->core.min_row_bits); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1024 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1025 span_log(&s->logging, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1026 SPAN_LOG_FLOW, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1027 "Queued change - (%d) %s -> %s\n", |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1028 silence_gen_remainder(&(s->audio.modems.silence_gen)), |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1029 t38_indicator_to_str(t->current_rx_indicator), |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1030 t38_indicator_to_str(indicator)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1031 s->t38x.current_rx_field_class = T38_FIELD_CLASS_NONE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1032 /* We need to set this here, since we might have been called as a fake |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1033 indication when the real one was missing */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1034 t->current_rx_indicator = indicator; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1035 return 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1036 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1037 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1038 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1039 static int process_rx_data(t38_core_state_t *t, void *user_data, int data_type, int field_type, const uint8_t *buf, int len) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1040 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1041 int i; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1042 t38_gateway_state_t *s; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1043 t38_gateway_t38_state_t *xx; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1044 t38_gateway_hdlc_buf_t *hdlc_buf; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1045 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1046 s = (t38_gateway_state_t *) user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1047 xx = &s->t38x; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1048 /* There are a couple of special cases of data type that need their own treatment. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1049 switch (data_type) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1050 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1051 case T38_DATA_V8: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1052 switch (field_type) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1053 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1054 case T38_FIELD_CM_MESSAGE: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1055 if (len >= 1) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1056 span_log(&s->logging, SPAN_LOG_FLOW, "CM profile %d - %s\n", buf[0] - '0', t38_cm_profile_to_str(buf[0])); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1057 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1058 span_log(&s->logging, SPAN_LOG_FLOW, "Bad length for CM message - %d\n", len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1059 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1060 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1061 case T38_FIELD_JM_MESSAGE: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1062 if (len >= 2) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1063 span_log(&s->logging, SPAN_LOG_FLOW, "JM - %s\n", t38_jm_to_str(buf, len)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1064 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1065 span_log(&s->logging, SPAN_LOG_FLOW, "Bad length for JM message - %d\n", len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1066 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1067 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1068 case T38_FIELD_CI_MESSAGE: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1069 if (len >= 1) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1070 span_log(&s->logging, SPAN_LOG_FLOW, "CI 0x%X\n", buf[0]); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1071 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1072 span_log(&s->logging, SPAN_LOG_FLOW, "Bad length for CI message - %d\n", len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1073 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1074 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1075 default: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1076 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1077 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1078 /*endswitch*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1079 return 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1080 case T38_DATA_V34_PRI_RATE: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1081 switch (field_type) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1082 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1083 case T38_FIELD_V34RATE: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1084 if (len >= 3) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1085 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1086 xx->t38.v34_rate = t38_v34rate_to_bps(buf, len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1087 span_log(&s->logging, SPAN_LOG_FLOW, "V.34 rate %d bps\n", xx->t38.v34_rate); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1088 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1089 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1090 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1091 span_log(&s->logging, SPAN_LOG_FLOW, "Bad length for V34rate message - %d\n", len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1092 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1093 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1094 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1095 default: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1096 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1097 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1098 /*endswitch*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1099 return 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1100 default: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1101 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1102 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1103 /*endswitch*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1104 switch (field_type) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1105 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1106 case T38_FIELD_HDLC_DATA: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1107 xx->current_rx_field_class = T38_FIELD_CLASS_HDLC; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1108 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1109 if (hdlc_buf->contents != (data_type | FLAG_DATA)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1110 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1111 queue_missing_indicator(s, data_type); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1112 /* All real HDLC messages in the FAX world start with 0xFF. If this one is not starting |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1113 with 0xFF it would appear some octets must have been missed before this one. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1114 if (len <= 0 || buf[0] != 0xFF) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1115 s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in].flags |= HDLC_FLAG_MISSING_DATA; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1116 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1117 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1118 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1119 /* Check if this data would overflow the buffer. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1120 if (len <= 0 || hdlc_buf->len + len > T38_MAX_HDLC_LEN) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1121 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1122 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1123 hdlc_buf->contents = (data_type | FLAG_DATA); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1124 bit_reverse(&hdlc_buf->buf[hdlc_buf->len], buf, len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1125 /* We need to send out the control messages as they are arriving. They are |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1126 too slow to capture a whole frame before starting to pass it on. |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1127 For the faster frames, take in the whole frame before sending it out. Also, there |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1128 is no need to monitor, or modify, the contents of the faster frames. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1129 if (data_type == T38_DATA_V21) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1130 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1131 for (i = 1; i <= len; i++) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1132 edit_control_messages(s, 0, hdlc_buf->buf, hdlc_buf->len + i); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1133 /*endfor*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1134 /* Don't start pumping data into the actual output stream until there is |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1135 enough backlog to create some elasticity for jitter tolerance. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1136 if (hdlc_buf->len + len >= HDLC_START_BUFFER_LEVEL) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1137 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1138 if (s->core.hdlc_to_modem.in == s->core.hdlc_to_modem.out) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1139 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1140 /* Output is not running, so kick it into life. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1141 if ((hdlc_buf->flags & HDLC_FLAG_PROCEED_WITH_OUTPUT) == 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1142 hdlc_tx_frame(&s->audio.modems.hdlc_tx, hdlc_buf->buf, hdlc_buf->len + len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1143 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1144 hdlc_tx_frame(&s->audio.modems.hdlc_tx, hdlc_buf->buf + hdlc_buf->len, len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1145 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1146 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1147 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1148 hdlc_buf->flags |= HDLC_FLAG_PROCEED_WITH_OUTPUT; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1149 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1150 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1151 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1152 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1153 s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in].len += len; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1154 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1155 case T38_FIELD_HDLC_FCS_OK: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1156 xx->current_rx_field_class = T38_FIELD_CLASS_HDLC; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1157 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1158 if (len > 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1159 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1160 span_log(&s->logging, SPAN_LOG_WARNING, "There is data in a T38_FIELD_HDLC_FCS_OK!\n"); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1161 /* The sender has incorrectly included data in this message. It is unclear what we should do |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1162 with it, to maximise tolerance of buggy implementations. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1163 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1164 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1165 /* Some T.38 implementations send multiple T38_FIELD_HDLC_FCS_OK messages, in IFP packets with |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1166 incrementing sequence numbers, which are actually repeats. They get through to this point because |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1167 of the incrementing sequence numbers. We need to filter them here in a context sensitive manner. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1168 if (t->current_rx_data_type != data_type || t->current_rx_field_type != field_type) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1169 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1170 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC frame type %s - CRC good\n", t30_frametype(hdlc_buf->buf[2])); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1171 if (hdlc_buf->contents != (data_type | FLAG_DATA)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1172 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1173 queue_missing_indicator(s, data_type); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1174 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1175 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1176 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1177 if (data_type == T38_DATA_V21) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1178 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1179 if ((hdlc_buf->flags & HDLC_FLAG_MISSING_DATA) == 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1180 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1181 monitor_control_messages(s, FALSE, hdlc_buf->buf, hdlc_buf->len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1182 if (s->core.real_time_frame_handler) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1183 s->core.real_time_frame_handler(s, s->core.real_time_frame_user_data, FALSE, hdlc_buf->buf, hdlc_buf->len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1184 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1185 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1186 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1187 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1188 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1189 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1190 /* Make sure we go back to short training if CTC/CTR has kicked us into |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1191 long training. There has to be more than one value HDLC frame in a |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1192 chunk of image data, so just setting short training mode here should |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1193 be enough. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1194 s->core.short_train = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1195 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1196 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1197 hdlc_buf->contents = (data_type | FLAG_DATA); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1198 finalise_hdlc_frame(s, TRUE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1199 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1200 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1201 xx->corrupt_current_frame[0] = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1202 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1203 case T38_FIELD_HDLC_FCS_BAD: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1204 xx->current_rx_field_class = T38_FIELD_CLASS_HDLC; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1205 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1206 if (len > 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1207 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1208 span_log(&s->logging, SPAN_LOG_WARNING, "There is data in a T38_FIELD_HDLC_FCS_BAD!\n"); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1209 /* The sender has incorrectly included data in this message. We can safely ignore it, as the |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1210 bad FCS means we will throw away the whole message, anyway. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1211 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1212 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1213 /* Some T.38 implementations send multiple T38_FIELD_HDLC_FCS_BAD messages, in IFP packets with |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1214 incrementing sequence numbers, which are actually repeats. They get through to this point because |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1215 of the incrementing sequence numbers. We need to filter them here in a context sensitive manner. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1216 if (t->current_rx_data_type != data_type || t->current_rx_field_type != field_type) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1217 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1218 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC frame type %s - CRC bad\n", t30_frametype(hdlc_buf->buf[2])); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1219 /* Only bother with frames that have a bad CRC, if they also have some content. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1220 if (hdlc_buf->len > 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1221 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1222 if (hdlc_buf->contents != (data_type | FLAG_DATA)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1223 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1224 queue_missing_indicator(s, data_type); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1225 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1226 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1227 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1228 hdlc_buf->contents = (data_type | FLAG_DATA); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1229 finalise_hdlc_frame(s, FALSE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1230 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1231 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1232 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1233 /* Just restart using the current frame buffer */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1234 hdlc_buf->contents = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1235 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1236 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1237 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1238 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1239 xx->corrupt_current_frame[0] = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1240 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1241 case T38_FIELD_HDLC_FCS_OK_SIG_END: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1242 xx->current_rx_field_class = T38_FIELD_CLASS_HDLC; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1243 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1244 if (len > 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1245 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1246 span_log(&s->logging, SPAN_LOG_WARNING, "There is data in a T38_FIELD_HDLC_FCS_OK_SIG_END!\n"); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1247 /* The sender has incorrectly included data in this message. It is unclear what we should do |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1248 with it, to maximise tolerance of buggy implementations. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1249 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1250 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1251 /* Some T.38 implementations send multiple T38_FIELD_HDLC_FCS_OK_SIG_END messages, in IFP packets with |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1252 incrementing sequence numbers, which are actually repeats. They get through to this point because |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1253 of the incrementing sequence numbers. We need to filter them here in a context sensitive manner. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1254 if (t->current_rx_data_type != data_type || t->current_rx_field_type != field_type) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1255 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1256 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC frame type %s - CRC OK, sig end\n", t30_frametype(hdlc_buf->buf[2])); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1257 if (hdlc_buf->contents != (data_type | FLAG_DATA)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1258 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1259 queue_missing_indicator(s, data_type); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1260 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1261 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1262 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1263 if (data_type == T38_DATA_V21) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1264 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1265 if ((hdlc_buf->flags & HDLC_FLAG_MISSING_DATA) == 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1266 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1267 monitor_control_messages(s, FALSE, hdlc_buf->buf, hdlc_buf->len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1268 if (s->core.real_time_frame_handler) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1269 s->core.real_time_frame_handler(s, s->core.real_time_frame_user_data, FALSE, hdlc_buf->buf, hdlc_buf->len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1270 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1271 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1272 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1273 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1274 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1275 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1276 /* Make sure we go back to short training if CTC/CTR has kicked us into |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1277 long training. There has to be more than one value HDLC frame in a |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1278 chunk of image data, so just setting short training mode here should |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1279 be enough. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1280 s->core.short_train = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1281 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1282 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1283 hdlc_buf->contents = (data_type | FLAG_DATA); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1284 finalise_hdlc_frame(s, TRUE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1285 queue_missing_indicator(s, T38_DATA_NONE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1286 xx->current_rx_field_class = T38_FIELD_CLASS_NONE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1287 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1288 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1289 xx->corrupt_current_frame[0] = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1290 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1291 case T38_FIELD_HDLC_FCS_BAD_SIG_END: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1292 xx->current_rx_field_class = T38_FIELD_CLASS_HDLC; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1293 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1294 if (len > 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1295 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1296 span_log(&s->logging, SPAN_LOG_WARNING, "There is data in a T38_FIELD_HDLC_FCS_BAD_SIG_END!\n"); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1297 /* The sender has incorrectly included data in this message. We can safely ignore it, as the |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1298 bad FCS means we will throw away the whole message, anyway. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1299 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1300 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1301 /* Some T.38 implementations send multiple T38_FIELD_HDLC_FCS_BAD_SIG_END messages, in IFP packets with |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1302 incrementing sequence numbers, which are actually repeats. They get through to this point because |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1303 of the incrementing sequence numbers. We need to filter them here in a context sensitive manner. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1304 if (t->current_rx_data_type != data_type || t->current_rx_field_type != field_type) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1305 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1306 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC frame type %s - CRC bad, sig end\n", t30_frametype(hdlc_buf->buf[2])); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1307 if (hdlc_buf->contents != (data_type | FLAG_DATA)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1308 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1309 queue_missing_indicator(s, data_type); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1310 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1311 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1312 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1313 /* Only bother with frames that have a bad CRC, if they also have some content. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1314 if (hdlc_buf->len > 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1315 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1316 hdlc_buf->contents = (data_type | FLAG_DATA); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1317 finalise_hdlc_frame(s, FALSE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1318 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1319 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1320 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1321 /* Just restart using the current frame buffer */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1322 hdlc_buf->contents = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1323 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1324 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1325 queue_missing_indicator(s, T38_DATA_NONE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1326 xx->current_rx_field_class = T38_FIELD_CLASS_NONE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1327 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1328 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1329 xx->corrupt_current_frame[0] = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1330 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1331 case T38_FIELD_HDLC_SIG_END: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1332 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1333 if (len > 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1334 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1335 span_log(&s->logging, SPAN_LOG_WARNING, "There is data in a T38_FIELD_HDLC_SIG_END!\n"); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1336 /* The sender has incorrectly included data in this message, but there seems nothing meaningful |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1337 it could be. There could not be an FCS good/bad report beyond this. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1338 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1339 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1340 /* Some T.38 implementations send multiple T38_FIELD_HDLC_SIG_END messages, in IFP packets with |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1341 incrementing sequence numbers, which are actually repeats. They get through to this point because |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1342 of the incrementing sequence numbers. We need to filter them here in a context sensitive manner. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1343 if (t->current_rx_data_type != data_type || t->current_rx_field_type != field_type) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1344 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1345 if (hdlc_buf->contents != (data_type | FLAG_DATA)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1346 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1347 queue_missing_indicator(s, data_type); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1348 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1349 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1350 /* WORKAROUND: At least some Mediatrix boxes have a bug, where they can send this message at the |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1351 end of non-ECM data. We need to tolerate this. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1352 if (xx->current_rx_field_class == T38_FIELD_CLASS_NON_ECM) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1353 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1354 span_log(&s->logging, SPAN_LOG_WARNING, "T38_FIELD_HDLC_SIG_END received at the end of non-ECM data!\n"); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1355 /* Don't flow control the data any more. Just pump out the remainder as fast as we can. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1356 t38_non_ecm_buffer_push(&s->core.non_ecm_to_modem); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1357 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1358 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1359 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1360 /* This message is expected under 2 circumstances. One is as an alternative to T38_FIELD_HDLC_FCS_OK_SIG_END - |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1361 i.e. they send T38_FIELD_HDLC_FCS_OK, and then T38_FIELD_HDLC_SIG_END when the carrier actually drops. |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1362 The other is because the HDLC signal drops unexpectedly - i.e. not just after a final frame. In |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1363 this case we just clear out any partial frame data that might be in the buffer. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1364 /* TODO: what if any junk in the buffer has reached the HDLC_FLAG_PROCEED_WITH_OUTPUT stage? */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1365 hdlc_buf->len = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1366 hdlc_buf->flags = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1367 hdlc_buf->contents = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1368 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1369 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1370 queue_missing_indicator(s, T38_DATA_NONE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1371 xx->current_rx_field_class = T38_FIELD_CLASS_NONE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1372 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1373 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1374 xx->corrupt_current_frame[0] = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1375 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1376 case T38_FIELD_T4_NON_ECM_DATA: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1377 xx->current_rx_field_class = T38_FIELD_CLASS_NON_ECM; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1378 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1379 if (hdlc_buf->contents != (data_type | FLAG_DATA)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1380 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1381 queue_missing_indicator(s, data_type); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1382 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1383 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1384 if (len > 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1385 t38_non_ecm_buffer_inject(&s->core.non_ecm_to_modem, buf, len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1386 xx->corrupt_current_frame[0] = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1387 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1388 case T38_FIELD_T4_NON_ECM_SIG_END: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1389 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1390 /* Some T.38 implementations send multiple T38_FIELD_T4_NON_ECM_SIG_END messages, in IFP packets with |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1391 incrementing sequence numbers, which are actually repeats. They get through to this point because |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1392 of the incrementing sequence numbers. We need to filter them here in a context sensitive manner. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1393 if (t->current_rx_data_type != data_type || t->current_rx_field_type != field_type) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1394 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1395 /* WORKAROUND: At least some Mediatrix boxes have a bug, where they can send HDLC signal end where |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1396 they should send non-ECM signal end. It is possible they also do the opposite. |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1397 We need to tolerate this. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1398 if (xx->current_rx_field_class == T38_FIELD_CLASS_NON_ECM) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1399 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1400 if (len > 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1401 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1402 if (hdlc_buf->contents != (data_type | FLAG_DATA)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1403 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1404 queue_missing_indicator(s, data_type); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1405 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1406 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1407 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1408 t38_non_ecm_buffer_inject(&s->core.non_ecm_to_modem, buf, len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1409 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1410 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1411 if (hdlc_buf->contents != (data_type | FLAG_DATA)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1412 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1413 queue_missing_indicator(s, data_type); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1414 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1415 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1416 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1417 /* Don't flow control the data any more. Just pump out the remainder as fast as we can. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1418 t38_non_ecm_buffer_push(&s->core.non_ecm_to_modem); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1419 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1420 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1421 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1422 span_log(&s->logging, SPAN_LOG_WARNING, "T38_FIELD_NON_ECM_SIG_END received at the end of HDLC data!\n"); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1423 if (s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in].contents != (data_type | FLAG_DATA)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1424 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1425 queue_missing_indicator(s, data_type); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1426 hdlc_buf = &s->core.hdlc_to_modem.buf[s->core.hdlc_to_modem.in]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1427 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1428 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1429 /* TODO: what if any junk in the buffer has reached the HDLC_FLAG_PROCEED_WITH_OUTPUT stage? */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1430 hdlc_buf->len = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1431 hdlc_buf->flags = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1432 hdlc_buf->contents = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1433 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1434 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1435 queue_missing_indicator(s, T38_DATA_NONE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1436 xx->current_rx_field_class = T38_FIELD_CLASS_NONE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1437 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1438 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1439 xx->corrupt_current_frame[0] = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1440 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1441 default: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1442 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1443 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1444 /*endswitch*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1445 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1446 #if 0 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1447 if (span_log_test(&s->logging, SPAN_LOG_FLOW)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1448 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1449 int i; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1450 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1451 if (len > 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1452 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1453 span_log(&s->logging, SPAN_LOG_FLOW, "Data: "); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1454 for (i = 0; i < len; i++) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1455 span_log(&s->logging, SPAN_LOG_FLOW | SPAN_LOG_SUPPRESS_LABELLING, " %02X", buf[i]); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1456 /*endfor*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1457 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1458 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1459 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1460 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1461 span_log(&s->logging, SPAN_LOG_FLOW | SPAN_LOG_SUPPRESS_LABELLING, "\n"); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1462 #endif |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1463 return 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1464 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1465 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1466 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1467 static void set_octets_per_data_packet(t38_gateway_state_t *s, int bit_rate) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1468 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1469 int octets; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1470 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1471 octets = MS_PER_TX_CHUNK*bit_rate/(8*1000); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1472 if (octets < 1) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1473 octets = 1; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1474 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1475 s->core.to_t38.octets_per_data_packet = octets; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1476 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1477 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1478 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1479 static int set_slow_packetisation(t38_gateway_state_t *s) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1480 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1481 set_octets_per_data_packet(s, 300); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1482 s->t38x.current_tx_data_type = T38_DATA_V21; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1483 return T38_IND_V21_PREAMBLE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1484 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1485 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1486 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1487 static int set_fast_packetisation(t38_gateway_state_t *s) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1488 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1489 int ind; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1490 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1491 ind = T38_IND_NO_SIGNAL; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1492 switch (s->core.fast_rx_active) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1493 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1494 case T38_V17_RX: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1495 set_octets_per_data_packet(s, s->core.fast_bit_rate); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1496 switch (s->core.fast_bit_rate) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1497 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1498 case 7200: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1499 ind = (s->core.short_train) ? T38_IND_V17_7200_SHORT_TRAINING : T38_IND_V17_7200_LONG_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1500 s->t38x.current_tx_data_type = T38_DATA_V17_7200; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1501 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1502 case 9600: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1503 ind = (s->core.short_train) ? T38_IND_V17_9600_SHORT_TRAINING : T38_IND_V17_9600_LONG_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1504 s->t38x.current_tx_data_type = T38_DATA_V17_9600; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1505 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1506 case 12000: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1507 ind = (s->core.short_train) ? T38_IND_V17_12000_SHORT_TRAINING : T38_IND_V17_12000_LONG_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1508 s->t38x.current_tx_data_type = T38_DATA_V17_12000; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1509 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1510 default: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1511 case 14400: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1512 ind = (s->core.short_train) ? T38_IND_V17_14400_SHORT_TRAINING : T38_IND_V17_14400_LONG_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1513 s->t38x.current_tx_data_type = T38_DATA_V17_14400; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1514 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1515 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1516 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1517 case T38_V27TER_RX: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1518 set_octets_per_data_packet(s, s->core.fast_bit_rate); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1519 switch (s->core.fast_bit_rate) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1520 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1521 case 2400: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1522 ind = T38_IND_V27TER_2400_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1523 s->t38x.current_tx_data_type = T38_DATA_V27TER_2400; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1524 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1525 default: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1526 case 4800: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1527 ind = T38_IND_V27TER_4800_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1528 s->t38x.current_tx_data_type = T38_DATA_V27TER_4800; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1529 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1530 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1531 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1532 case T38_V29_RX: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1533 set_octets_per_data_packet(s, s->core.fast_bit_rate); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1534 switch (s->core.fast_bit_rate) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1535 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1536 case 7200: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1537 ind = T38_IND_V29_7200_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1538 s->t38x.current_tx_data_type = T38_DATA_V29_7200; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1539 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1540 default: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1541 case 9600: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1542 ind = T38_IND_V29_9600_TRAINING; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1543 s->t38x.current_tx_data_type = T38_DATA_V29_9600; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1544 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1545 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1546 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1547 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1548 return ind; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1549 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1550 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1551 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1552 static void announce_training(t38_gateway_state_t *s) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1553 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1554 t38_core_send_indicator(&s->t38x.t38, set_fast_packetisation(s)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1555 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1556 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1557 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1558 static void non_ecm_rx_status(void *user_data, int status) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1559 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1560 t38_gateway_state_t *s; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1561 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1562 s = (t38_gateway_state_t *) user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1563 span_log(&s->logging, SPAN_LOG_FLOW, "Non-ECM signal status is %s (%d)\n", signal_status_to_str(status), status); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1564 switch (status) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1565 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1566 case SIG_STATUS_TRAINING_IN_PROGRESS: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1567 if (s->core.timed_mode == TIMED_MODE_IDLE) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1568 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1569 announce_training(s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1570 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1571 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1572 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1573 if (s->core.timed_mode == TIMED_MODE_TCF_PREDICTABLE_MODEM_START_PAST_V21_MODEM) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1574 s->core.timed_mode = TIMED_MODE_TCF_PREDICTABLE_MODEM_START_FAST_MODEM_SEEN; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1575 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1576 s->core.samples_to_timeout = ms_to_samples(500); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1577 set_fast_packetisation(s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1578 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1579 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1580 case SIG_STATUS_TRAINING_FAILED: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1581 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1582 case SIG_STATUS_TRAINING_SUCCEEDED: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1583 /* The modem is now trained */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1584 s->audio.modems.rx_signal_present = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1585 s->audio.modems.rx_trained = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1586 s->core.timed_mode = TIMED_MODE_IDLE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1587 s->core.samples_to_timeout = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1588 to_t38_buffer_init(&s->core.to_t38); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1589 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1590 case SIG_STATUS_CARRIER_UP: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1591 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1592 case SIG_STATUS_CARRIER_DOWN: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1593 switch (s->t38x.current_tx_data_type) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1594 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1595 case T38_DATA_V17_7200: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1596 case T38_DATA_V17_9600: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1597 case T38_DATA_V17_12000: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1598 case T38_DATA_V17_14400: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1599 case T38_DATA_V27TER_2400: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1600 case T38_DATA_V27TER_4800: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1601 case T38_DATA_V29_7200: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1602 case T38_DATA_V29_9600: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1603 if (s->core.timed_mode != TIMED_MODE_TCF_PREDICTABLE_MODEM_START_FAST_MODEM_ANNOUNCED) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1604 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1605 /* TODO: If the carrier really did fall for good during the 500ms TEP blocking timeout, we |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1606 won't declare the no-signal condition. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1607 non_ecm_push_residue(s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1608 t38_core_send_indicator(&s->t38x.t38, T38_IND_NO_SIGNAL); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1609 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1610 restart_rx_modem(s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1611 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1612 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1613 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1614 default: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1615 span_log(&s->logging, SPAN_LOG_WARNING, "Unexpected non-ECM special bit - %d!\n", status); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1616 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1617 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1618 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1619 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1620 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1621 static void to_t38_buffer_init(t38_gateway_to_t38_state_t *s) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1622 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1623 s->data_ptr = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1624 s->bit_stream = 0xFFFF; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1625 s->bit_no = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1626 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1627 s->in_bits = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1628 s->out_octets = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1629 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1630 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1631 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1632 static void non_ecm_push_residue(t38_gateway_state_t *t) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1633 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1634 t38_gateway_to_t38_state_t *s; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1635 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1636 s = &t->core.to_t38; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1637 if (s->bit_no) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1638 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1639 /* There is a fractional octet in progress. We might as well send every last bit we can. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1640 s->data[s->data_ptr++] = (uint8_t) (s->bit_stream << (8 - s->bit_no)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1641 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1642 t38_core_send_data(&t->t38x.t38, t->t38x.current_tx_data_type, T38_FIELD_T4_NON_ECM_SIG_END, s->data, s->data_ptr, T38_PACKET_CATEGORY_IMAGE_DATA_END); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1643 s->in_bits += s->bits_absorbed; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1644 s->out_octets += s->data_ptr; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1645 s->data_ptr = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1646 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1647 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1648 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1649 static void non_ecm_push(t38_gateway_state_t *t) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1650 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1651 t38_gateway_to_t38_state_t *s; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1652 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1653 s = &t->core.to_t38; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1654 if (s->data_ptr) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1655 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1656 t38_core_send_data(&t->t38x.t38, t->t38x.current_tx_data_type, T38_FIELD_T4_NON_ECM_DATA, s->data, s->data_ptr, T38_PACKET_CATEGORY_IMAGE_DATA); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1657 s->in_bits += s->bits_absorbed; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1658 s->out_octets += s->data_ptr; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1659 s->bits_absorbed = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1660 s->data_ptr = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1661 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1662 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1663 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1664 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1665 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1666 static void non_ecm_put_bit(void *user_data, int bit) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1667 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1668 t38_gateway_state_t *t; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1669 t38_gateway_to_t38_state_t *s; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1670 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1671 if (bit < 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1672 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1673 non_ecm_rx_status(user_data, bit); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1674 return; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1675 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1676 t = (t38_gateway_state_t *) user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1677 s = &t->core.to_t38; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1678 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1679 s->in_bits++; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1680 bit &= 1; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1681 s->bit_stream = (s->bit_stream << 1) | bit; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1682 if (++s->bit_no >= 8) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1683 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1684 s->data[s->data_ptr++] = (uint8_t) s->bit_stream & 0xFF; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1685 if (s->data_ptr >= s->octets_per_data_packet) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1686 non_ecm_push(t); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1687 s->bit_no = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1688 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1689 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1690 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1691 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1692 static void non_ecm_remove_fill_and_put_bit(void *user_data, int bit) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1693 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1694 t38_gateway_state_t *t; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1695 t38_gateway_to_t38_state_t *s; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1696 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1697 if (bit < 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1698 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1699 non_ecm_rx_status(user_data, bit); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1700 return; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1701 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1702 t = (t38_gateway_state_t *) user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1703 s = &t->core.to_t38; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1704 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1705 s->bits_absorbed++; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1706 bit &= 1; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1707 /* Drop any extra zero bits when we already have enough for an EOL symbol. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1708 /* The snag here is that if we just look for 11 bits, a line ending with |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1709 a code that has trailing zero bits will cause problems. The longest run of |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1710 trailing zeros for any code is 3, so we need to look for at least 14 zeros |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1711 if we don't want to actually analyse the compressed data in depth. This means |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1712 we do not strip every fill bit, but we strip most of them. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1713 if ((s->bit_stream & 0x3FFF) == 0 && bit == 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1714 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1715 if (s->bits_absorbed > 2*8*s->octets_per_data_packet) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1716 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1717 /* We need to pump out what we have, even though we have not accumulated a full |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1718 buffer of data. If we don't, we stand to delay rows excessively, so the far |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1719 end gateway (assuming the far end is a gateway) cannot play them out. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1720 non_ecm_push(t); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1721 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1722 return; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1723 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1724 s->bit_stream = (s->bit_stream << 1) | bit; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1725 if (++s->bit_no >= 8) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1726 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1727 s->data[s->data_ptr++] = (uint8_t) s->bit_stream & 0xFF; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1728 if (s->data_ptr >= s->octets_per_data_packet) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1729 non_ecm_push(t); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1730 s->bit_no = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1731 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1732 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1733 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1734 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1735 static void hdlc_rx_status(hdlc_rx_state_t *t, int status) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1736 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1737 t38_gateway_state_t *s; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1738 int category; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1739 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1740 s = (t38_gateway_state_t *) t->frame_user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1741 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC signal status is %s (%d)\n", signal_status_to_str(status), status); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1742 switch (status) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1743 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1744 case SIG_STATUS_TRAINING_IN_PROGRESS: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1745 announce_training(s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1746 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1747 case SIG_STATUS_TRAINING_FAILED: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1748 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1749 case SIG_STATUS_TRAINING_SUCCEEDED: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1750 /* The modem is now trained. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1751 s->audio.modems.rx_signal_present = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1752 s->audio.modems.rx_trained = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1753 /* Behave like HDLC preamble has been announced. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1754 t->framing_ok_announced = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1755 to_t38_buffer_init(&s->core.to_t38); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1756 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1757 case SIG_STATUS_CARRIER_UP: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1758 /* Reset the HDLC receiver. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1759 t->raw_bit_stream = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1760 t->len = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1761 t->num_bits = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1762 t->flags_seen = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1763 t->framing_ok_announced = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1764 to_t38_buffer_init(&s->core.to_t38); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1765 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1766 case SIG_STATUS_CARRIER_DOWN: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1767 if (t->framing_ok_announced) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1768 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1769 category = (s->t38x.current_tx_data_type == T38_DATA_V21) ? T38_PACKET_CATEGORY_CONTROL_DATA_END : T38_PACKET_CATEGORY_IMAGE_DATA_END; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1770 t38_core_send_data(&s->t38x.t38, s->t38x.current_tx_data_type, T38_FIELD_HDLC_SIG_END, NULL, 0, category); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1771 t38_core_send_indicator(&s->t38x.t38, T38_IND_NO_SIGNAL); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1772 t->framing_ok_announced = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1773 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1774 restart_rx_modem(s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1775 if (s->core.timed_mode == TIMED_MODE_TCF_PREDICTABLE_MODEM_START_BEGIN) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1776 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1777 /* If we are doing TCF, we need to announce the fast carrier training very |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1778 quickly, to ensure it starts 75+-20ms after the HDLC carrier ends. Waiting until |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1779 it trains will be too late. We need to announce the fast modem a fixed time after |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1780 the end of the V.21 carrier, in anticipation of its arrival. If we announce it, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1781 and it doesn't arrive, we will worry about that later. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1782 s->core.samples_to_timeout = ms_to_samples(75); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1783 s->core.timed_mode = TIMED_MODE_TCF_PREDICTABLE_MODEM_START_PAST_V21_MODEM; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1784 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1785 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1786 default: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1787 span_log(&s->logging, SPAN_LOG_WARNING, "Unexpected HDLC special bit - %d!\n", status); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1788 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1789 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1790 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1791 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1792 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1793 static void rx_flag_or_abort(hdlc_rx_state_t *t) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1794 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1795 t38_gateway_state_t *s; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1796 t38_gateway_to_t38_state_t *u; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1797 int category; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1798 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1799 s = (t38_gateway_state_t *) t->frame_user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1800 u = &s->core.to_t38; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1801 if ((t->raw_bit_stream & 0x80)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1802 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1803 /* Hit HDLC abort */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1804 t->rx_aborts++; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1805 if (t->flags_seen < t->framing_ok_threshold) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1806 t->flags_seen = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1807 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1808 t->flags_seen = t->framing_ok_threshold - 1; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1809 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1810 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1811 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1812 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1813 /* Hit HDLC flag */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1814 if (t->flags_seen >= t->framing_ok_threshold) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1815 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1816 category = (s->t38x.current_tx_data_type == T38_DATA_V21) ? T38_PACKET_CATEGORY_CONTROL_DATA : T38_PACKET_CATEGORY_IMAGE_DATA; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1817 if (t->len) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1818 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1819 /* This is not back-to-back flags */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1820 if (t->len >= 2) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1821 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1822 if (u->data_ptr) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1823 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1824 bit_reverse(u->data, t->buffer + t->len - 2 - u->data_ptr, u->data_ptr); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1825 t38_core_send_data(&s->t38x.t38, s->t38x.current_tx_data_type, T38_FIELD_HDLC_DATA, u->data, u->data_ptr, category); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1826 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1827 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1828 if (t->num_bits != 7) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1829 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1830 t->rx_crc_errors++; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1831 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC frame type %s, misaligned terminating flag at %d\n", t30_frametype(t->buffer[2]), t->len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1832 /* It seems some boxes may not like us sending a _SIG_END here, and then another |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1833 when the carrier actually drops. Lets just send T38_FIELD_HDLC_FCS_OK here. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1834 if (t->len > 2) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1835 t38_core_send_data(&s->t38x.t38, s->t38x.current_tx_data_type, T38_FIELD_HDLC_FCS_BAD, NULL, 0, category); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1836 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1837 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1838 else if ((u->crc & 0xFFFF) != 0xF0B8) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1839 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1840 t->rx_crc_errors++; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1841 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC frame type %s, bad CRC at %d\n", t30_frametype(t->buffer[2]), t->len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1842 /* It seems some boxes may not like us sending a _SIG_END here, and then another |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1843 when the carrier actually drops. Lets just send T38_FIELD_HDLC_FCS_OK here. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1844 if (t->len > 2) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1845 t38_core_send_data(&s->t38x.t38, s->t38x.current_tx_data_type, T38_FIELD_HDLC_FCS_BAD, NULL, 0, category); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1846 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1847 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1848 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1849 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1850 t->rx_frames++; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1851 t->rx_bytes += t->len - 2; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1852 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC frame type %s, CRC OK\n", t30_frametype(t->buffer[2])); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1853 if (s->t38x.current_tx_data_type == T38_DATA_V21) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1854 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1855 monitor_control_messages(s, TRUE, t->buffer, t->len - 2); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1856 if (s->core.real_time_frame_handler) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1857 s->core.real_time_frame_handler(s, s->core.real_time_frame_user_data, TRUE, t->buffer, t->len - 2); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1858 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1859 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1860 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1861 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1862 /* Make sure we go back to short training if CTC/CTR has kicked us into |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1863 long training. Any successful HDLC frame received at a rate other than |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1864 V.21 is an adequate indication we should change. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1865 s->core.short_train = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1866 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1867 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1868 /* It seems some boxes may not like us sending a _SIG_END here, and then another |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1869 when the carrier actually drops. Lets just send T38_FIELD_HDLC_FCS_OK here. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1870 t38_core_send_data(&s->t38x.t38, s->t38x.current_tx_data_type, T38_FIELD_HDLC_FCS_OK, NULL, 0, category); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1871 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1872 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1873 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1874 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1875 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1876 /* Frame too short */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1877 t->rx_length_errors++; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1878 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1879 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1880 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1881 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1882 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1883 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1884 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1885 /* Check the flags are back-to-back when testing for valid preamble. This |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1886 greatly reduces the chances of false preamble detection, and anything |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1887 which doesn't send them back-to-back is badly broken. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1888 if (t->num_bits != 7) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1889 t->flags_seen = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1890 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1891 if (++t->flags_seen >= t->framing_ok_threshold && !t->framing_ok_announced) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1892 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1893 if (s->t38x.current_tx_data_type == T38_DATA_V21) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1894 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1895 t38_core_send_indicator(&s->t38x.t38, set_slow_packetisation(s)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1896 s->audio.modems.rx_signal_present = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1897 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1898 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1899 if (s->t38x.in_progress_rx_indicator == T38_IND_CNG) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1900 set_next_tx_type(s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1901 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1902 t->framing_ok_announced = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1903 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1904 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1905 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1906 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1907 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1908 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1909 t->len = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1910 t->num_bits = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1911 u->crc = 0xFFFF; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1912 u->data_ptr = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1913 s->t38x.corrupt_current_frame[1] = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1914 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1915 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1916 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1917 static void t38_hdlc_rx_put_bit(hdlc_rx_state_t *t, int new_bit) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1918 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1919 t38_gateway_state_t *s; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1920 t38_gateway_to_t38_state_t *u; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1921 int category; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1922 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1923 if (new_bit < 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1924 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1925 hdlc_rx_status(t, new_bit); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1926 return; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1927 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1928 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1929 t->raw_bit_stream = (t->raw_bit_stream << 1) | (new_bit & 1); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1930 if ((t->raw_bit_stream & 0x3F) == 0x3E) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1931 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1932 /* Its time to either skip a bit, for stuffing, or process a flag or abort */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1933 if ((t->raw_bit_stream & 0x40)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1934 rx_flag_or_abort(t); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1935 return; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1936 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1937 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1938 t->num_bits++; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1939 if (!t->framing_ok_announced) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1940 return; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1941 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1942 t->byte_in_progress = (t->byte_in_progress >> 1) | ((t->raw_bit_stream & 0x01) << 7); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1943 if (t->num_bits != 8) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1944 return; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1945 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1946 t->num_bits = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1947 if (t->len >= (int) sizeof(t->buffer)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1948 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1949 /* This is too long. Abandon the frame, and wait for the next flag octet. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1950 t->rx_length_errors++; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1951 t->flags_seen = t->framing_ok_threshold - 1; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1952 t->len = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1953 return; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1954 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1955 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1956 s = (t38_gateway_state_t *) t->frame_user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1957 u = &s->core.to_t38; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1958 t->buffer[t->len] = (uint8_t) t->byte_in_progress; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1959 /* Calculate the CRC progressively, before we start altering the frame */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1960 u->crc = crc_itu16_calc(&t->buffer[t->len], 1, u->crc); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1961 /* Make the transmission lag by two octets, so we do not send the CRC, and |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1962 do not report the CRC result too late. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1963 if (++t->len <= 2) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1964 return; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1965 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1966 if (s->t38x.current_tx_data_type == T38_DATA_V21) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1967 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1968 /* The V.21 control messages need to be monitored, and possibly corrupted, to manage the |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1969 man-in-the-middle role of T.38 */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1970 edit_control_messages(s, 1, t->buffer, t->len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1971 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1972 if (++u->data_ptr >= u->octets_per_data_packet) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1973 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1974 bit_reverse(u->data, t->buffer + t->len - 2 - u->data_ptr, u->data_ptr); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1975 category = (s->t38x.current_tx_data_type == T38_DATA_V21) ? T38_PACKET_CATEGORY_CONTROL_DATA : T38_PACKET_CATEGORY_IMAGE_DATA; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1976 t38_core_send_data(&s->t38x.t38, s->t38x.current_tx_data_type, T38_FIELD_HDLC_DATA, u->data, u->data_ptr, category); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1977 /* Since we delay transmission by 2 octets, we should now have sent the last of the data octets when |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1978 we have just received the last of the CRC octets. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1979 u->data_ptr = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1980 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1981 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1982 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1983 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1984 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1985 static int restart_rx_modem(t38_gateway_state_t *s) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1986 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1987 put_bit_func_t put_bit_func; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1988 void *put_bit_user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1989 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1990 if (s->core.to_t38.in_bits || s->core.to_t38.out_octets) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1991 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1992 span_log(&s->logging, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1993 SPAN_LOG_FLOW, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1994 "%d incoming audio bits. %d outgoing T.38 octets\n", |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1995 s->core.to_t38.in_bits, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1996 s->core.to_t38.out_octets); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1997 s->core.to_t38.in_bits = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1998 s->core.to_t38.out_octets = 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
1999 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2000 span_log(&s->logging, SPAN_LOG_FLOW, "Restart rx modem - modem = %d, short train = %d, ECM = %d\n", s->core.fast_rx_modem, s->core.short_train, s->core.ecm_mode); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2001 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2002 hdlc_rx_init(&(s->audio.modems.hdlc_rx), FALSE, TRUE, HDLC_FRAMING_OK_THRESHOLD, NULL, s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2003 s->audio.modems.rx_signal_present = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2004 s->audio.modems.rx_trained = FALSE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2005 /* Default to the transmit data being V.21, unless a faster modem pops up trained. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2006 s->t38x.current_tx_data_type = T38_DATA_V21; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2007 fsk_rx_init(&(s->audio.modems.v21_rx), &preset_fsk_specs[FSK_V21CH2], FSK_FRAME_MODE_SYNC, (put_bit_func_t) t38_hdlc_rx_put_bit, &(s->audio.modems.hdlc_rx)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2008 #if 0 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2009 fsk_rx_signal_cutoff(&(s->audio.modems.v21_rx), -45.5f); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2010 #endif |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2011 if (s->core.image_data_mode && s->core.ecm_mode) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2012 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2013 put_bit_func = (put_bit_func_t) t38_hdlc_rx_put_bit; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2014 put_bit_user_data = (void *) &(s->audio.modems.hdlc_rx); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2015 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2016 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2017 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2018 if (s->core.image_data_mode && s->core.to_t38.fill_bit_removal) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2019 put_bit_func = non_ecm_remove_fill_and_put_bit; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2020 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2021 put_bit_func = non_ecm_put_bit; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2022 put_bit_user_data = (void *) s; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2023 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2024 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2025 to_t38_buffer_init(&s->core.to_t38); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2026 s->core.to_t38.octets_per_data_packet = 1; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2027 switch (s->core.fast_rx_modem) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2028 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2029 case T38_V17_RX: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2030 v17_rx_restart(&s->audio.modems.v17_rx, s->core.fast_bit_rate, s->core.short_train); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2031 v17_rx_set_put_bit(&s->audio.modems.v17_rx, put_bit_func, put_bit_user_data); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2032 set_rx_handler(s, (span_rx_handler_t *) &v17_v21_rx, s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2033 s->core.fast_rx_active = T38_V17_RX; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2034 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2035 case T38_V27TER_RX: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2036 v27ter_rx_restart(&s->audio.modems.v27ter_rx, s->core.fast_bit_rate, FALSE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2037 v27ter_rx_set_put_bit(&s->audio.modems.v27ter_rx, put_bit_func, put_bit_user_data); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2038 set_rx_handler(s, (span_rx_handler_t *) &v27ter_v21_rx, s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2039 s->core.fast_rx_active = T38_V27TER_RX; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2040 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2041 case T38_V29_RX: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2042 v29_rx_restart(&s->audio.modems.v29_rx, s->core.fast_bit_rate, FALSE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2043 v29_rx_set_put_bit(&s->audio.modems.v29_rx, put_bit_func, put_bit_user_data); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2044 set_rx_handler(s, (span_rx_handler_t *) &v29_v21_rx, s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2045 s->core.fast_rx_active = T38_V29_RX; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2046 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2047 default: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2048 set_rx_handler(s, (span_rx_handler_t *) &fsk_rx, &(s->audio.modems.v21_rx)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2049 s->core.fast_rx_active = T38_NONE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2050 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2051 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2052 /*endswitch*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2053 return 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2054 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2055 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2056 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2057 SPAN_DECLARE(int) t38_gateway_rx(t38_gateway_state_t *s, int16_t amp[], int len) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2058 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2059 int i; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2060 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2061 #if defined(LOG_FAX_AUDIO) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2062 if (s->audio.modems.audio_rx_log >= 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2063 write(s->audio.modems.audio_rx_log, amp, len*sizeof(int16_t)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2064 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2065 #endif |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2066 if (s->core.samples_to_timeout > 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2067 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2068 if ((s->core.samples_to_timeout -= len) <= 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2069 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2070 switch (s->core.timed_mode) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2071 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2072 case TIMED_MODE_TCF_PREDICTABLE_MODEM_START_PAST_V21_MODEM: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2073 /* Timed announcement of training, 75ms after the DCS carrier fell. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2074 s->core.timed_mode = TIMED_MODE_TCF_PREDICTABLE_MODEM_START_FAST_MODEM_ANNOUNCED; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2075 announce_training(s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2076 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2077 case TIMED_MODE_TCF_PREDICTABLE_MODEM_START_FAST_MODEM_SEEN: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2078 /* Timed announcement of training, 75ms after the DCS carrier fell. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2079 /* Use a timeout to ride over TEP, if it is present */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2080 s->core.samples_to_timeout = ms_to_samples(500); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2081 s->core.timed_mode = TIMED_MODE_TCF_PREDICTABLE_MODEM_START_FAST_MODEM_ANNOUNCED; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2082 announce_training(s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2083 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2084 case TIMED_MODE_TCF_PREDICTABLE_MODEM_START_FAST_MODEM_ANNOUNCED: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2085 s->core.timed_mode = TIMED_MODE_IDLE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2086 span_log(&s->logging, SPAN_LOG_FLOW, "TEP jamming expired\n"); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2087 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2088 case TIMED_MODE_STARTUP: |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2089 /* Ensure a no-signal condition goes out the moment the received audio starts */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2090 t38_core_send_indicator(&s->t38x.t38, T38_IND_NO_SIGNAL); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2091 s->core.timed_mode = TIMED_MODE_IDLE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2092 break; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2093 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2094 /*endswitch*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2095 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2096 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2097 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2098 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2099 for (i = 0; i < len; i++) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2100 amp[i] = dc_restore(&(s->audio.modems.dc_restore), amp[i]); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2101 /*endfor*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2102 s->audio.modems.rx_handler(s->audio.modems.rx_user_data, amp, len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2103 return 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2104 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2105 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2106 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2107 SPAN_DECLARE(int) t38_gateway_tx(t38_gateway_state_t *s, int16_t amp[], int max_len) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2108 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2109 int len; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2110 #if defined(LOG_FAX_AUDIO) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2111 int required_len; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2112 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2113 required_len = max_len; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2114 #endif |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2115 if ((len = s->audio.modems.tx_handler(s->audio.modems.tx_user_data, amp, max_len)) < max_len) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2116 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2117 if (set_next_tx_type(s)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2118 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2119 /* Give the new handler a chance to file the remaining buffer space */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2120 len += s->audio.modems.tx_handler(s->audio.modems.tx_user_data, amp + len, max_len - len); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2121 if (len < max_len) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2122 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2123 silence_gen_set(&(s->audio.modems.silence_gen), 0); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2124 set_next_tx_type(s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2125 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2126 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2127 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2128 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2129 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2130 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2131 if (s->audio.modems.transmit_on_idle) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2132 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2133 /* Pad to the requested length with silence */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2134 memset(amp + len, 0, (max_len - len)*sizeof(int16_t)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2135 len = max_len; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2136 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2137 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2138 #if defined(LOG_FAX_AUDIO) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2139 if (s->audio.modems.audio_tx_log >= 0) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2140 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2141 if (len < required_len) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2142 memset(amp + len, 0, (required_len - len)*sizeof(int16_t)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2143 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2144 write(s->audio.modems.audio_tx_log, amp, required_len*sizeof(int16_t)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2145 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2146 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2147 #endif |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2148 return len; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2149 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2150 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2151 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2152 SPAN_DECLARE(void) t38_gateway_get_transfer_statistics(t38_gateway_state_t *s, t38_stats_t *t) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2153 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2154 memset(t, 0, sizeof(*t)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2155 t->bit_rate = s->core.fast_bit_rate; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2156 t->error_correcting_mode = s->core.ecm_mode; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2157 t->pages_transferred = s->core.pages_confirmed; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2158 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2159 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2160 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2161 SPAN_DECLARE(t38_core_state_t *) t38_gateway_get_t38_core_state(t38_gateway_state_t *s) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2162 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2163 return &s->t38x.t38; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2164 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2165 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2166 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2167 SPAN_DECLARE(logging_state_t *) t38_gateway_get_logging_state(t38_gateway_state_t *s) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2168 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2169 return &s->logging; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2170 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2171 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2172 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2173 SPAN_DECLARE(void) t38_gateway_set_ecm_capability(t38_gateway_state_t *s, int ecm_allowed) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2174 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2175 s->core.ecm_allowed = ecm_allowed; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2176 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2177 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2178 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2179 SPAN_DECLARE(void) t38_gateway_set_transmit_on_idle(t38_gateway_state_t *s, int transmit_on_idle) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2180 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2181 s->audio.modems.transmit_on_idle = transmit_on_idle; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2182 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2183 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2184 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2185 SPAN_DECLARE(void) t38_gateway_set_supported_modems(t38_gateway_state_t *s, int supported_modems) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2186 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2187 s->core.supported_modems = supported_modems; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2188 if ((s->core.supported_modems & T30_SUPPORT_V17)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2189 t38_set_fastest_image_data_rate(&s->t38x.t38, 14400); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2190 else if ((s->core.supported_modems & T30_SUPPORT_V29)) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2191 t38_set_fastest_image_data_rate(&s->t38x.t38, 9600); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2192 else |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2193 t38_set_fastest_image_data_rate(&s->t38x.t38, 4800); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2194 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2195 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2196 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2197 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2198 SPAN_DECLARE(void) t38_gateway_set_nsx_suppression(t38_gateway_state_t *s, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2199 const uint8_t *from_t38, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2200 int from_t38_len, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2201 const uint8_t *from_modem, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2202 int from_modem_len) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2203 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2204 s->t38x.suppress_nsx_len[0] = (from_t38_len < 0 || from_t38_len < MAX_NSX_SUPPRESSION) ? (from_t38_len + 3) : 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2205 s->t38x.suppress_nsx_len[1] = (from_modem_len < 0 || from_modem_len < MAX_NSX_SUPPRESSION) ? (from_modem_len + 3) : 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2206 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2207 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2208 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2209 SPAN_DECLARE(void) t38_gateway_set_tep_mode(t38_gateway_state_t *s, int use_tep) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2210 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2211 s->audio.modems.use_tep = use_tep; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2212 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2213 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2214 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2215 SPAN_DECLARE(void) t38_gateway_set_fill_bit_removal(t38_gateway_state_t *s, int remove) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2216 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2217 s->core.to_t38.fill_bit_removal = remove; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2218 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2219 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2220 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2221 SPAN_DECLARE(void) t38_gateway_set_real_time_frame_handler(t38_gateway_state_t *s, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2222 t38_gateway_real_time_frame_handler_t *handler, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2223 void *user_data) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2224 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2225 s->core.real_time_frame_handler = handler; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2226 s->core.real_time_frame_user_data = user_data; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2227 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2228 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2229 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2230 static int t38_gateway_audio_init(t38_gateway_state_t *s) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2231 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2232 fax_modems_init(&s->audio.modems, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2233 FALSE, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2234 NULL, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2235 hdlc_underflow_handler, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2236 non_ecm_put_bit, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2237 t38_non_ecm_buffer_get_bit, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2238 tone_detected, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2239 s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2240 /* We need to use progressive HDLC transmit, and a special HDLC receiver, which is different |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2241 from the other uses of FAX modems. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2242 hdlc_tx_init(&s->audio.modems.hdlc_tx, FALSE, 2, TRUE, hdlc_underflow_handler, s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2243 fsk_rx_set_put_bit(&s->audio.modems.v21_rx, (put_bit_func_t) t38_hdlc_rx_put_bit, &s->audio.modems.hdlc_rx); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2244 /* TODO: Don't use the very low cutoff levels we would like to. We get some quirks if we do. |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2245 We need to sort this out. */ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2246 fsk_rx_signal_cutoff(&s->audio.modems.v21_rx, -30.0f); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2247 v29_rx_signal_cutoff(&s->audio.modems.v29_rx, -28.5f); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2248 return 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2249 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2250 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2251 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2252 static int t38_gateway_t38_init(t38_gateway_state_t *t, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2253 t38_tx_packet_handler_t *tx_packet_handler, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2254 void *tx_packet_user_data) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2255 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2256 t38_gateway_t38_state_t *s; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2257 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2258 s = &t->t38x; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2259 t38_core_init(&s->t38, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2260 process_rx_indicator, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2261 process_rx_data, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2262 process_rx_missing, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2263 (void *) t, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2264 tx_packet_handler, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2265 tx_packet_user_data); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2266 t38_set_redundancy_control(&s->t38, T38_PACKET_CATEGORY_INDICATOR, INDICATOR_TX_COUNT); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2267 t38_set_redundancy_control(&s->t38, T38_PACKET_CATEGORY_CONTROL_DATA, DATA_TX_COUNT); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2268 t38_set_redundancy_control(&s->t38, T38_PACKET_CATEGORY_CONTROL_DATA_END, DATA_END_TX_COUNT); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2269 t38_set_redundancy_control(&s->t38, T38_PACKET_CATEGORY_IMAGE_DATA, DATA_TX_COUNT); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2270 t38_set_redundancy_control(&s->t38, T38_PACKET_CATEGORY_IMAGE_DATA_END, DATA_END_TX_COUNT); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2271 return 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2272 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2273 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2274 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2275 SPAN_DECLARE(t38_gateway_state_t *) t38_gateway_init(t38_gateway_state_t *s, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2276 t38_tx_packet_handler_t *tx_packet_handler, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2277 void *tx_packet_user_data) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2278 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2279 if (tx_packet_handler == NULL) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2280 return NULL; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2281 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2282 if (s == NULL) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2283 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2284 if ((s = (t38_gateway_state_t *) malloc(sizeof(*s))) == NULL) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2285 return NULL; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2286 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2287 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2288 /*endif*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2289 memset(s, 0, sizeof(*s)); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2290 span_log_init(&s->logging, SPAN_LOG_NONE, NULL); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2291 span_log_set_protocol(&s->logging, "T.38G"); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2292 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2293 t38_gateway_audio_init(s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2294 t38_gateway_t38_init(s, tx_packet_handler, tx_packet_user_data); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2295 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2296 set_rx_active(s, TRUE); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2297 t38_gateway_set_supported_modems(s, T30_SUPPORT_V27TER | T30_SUPPORT_V29); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2298 t38_gateway_set_nsx_suppression(s, (const uint8_t *) "\x00\x00\x00", 3, (const uint8_t *) "\x00\x00\x00", 3); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2299 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2300 s->core.to_t38.octets_per_data_packet = 1; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2301 s->core.ecm_allowed = TRUE; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2302 t38_non_ecm_buffer_init(&s->core.non_ecm_to_modem, FALSE, 0); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2303 restart_rx_modem(s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2304 s->core.timed_mode = TIMED_MODE_STARTUP; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2305 s->core.samples_to_timeout = 1; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2306 #if defined(LOG_FAX_AUDIO) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2307 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2308 char buf[100 + 1]; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2309 struct tm *tm; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2310 time_t now; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2311 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2312 time(&now); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2313 tm = localtime(&now); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2314 sprintf(buf, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2315 "/tmp/t38-rx-audio-%p-%02d%02d%02d%02d%02d%02d", |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2316 s, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2317 tm->tm_year%100, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2318 tm->tm_mon + 1, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2319 tm->tm_mday, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2320 tm->tm_hour, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2321 tm->tm_min, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2322 tm->tm_sec); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2323 s->audio.modems.audio_rx_log = open(buf, O_CREAT | O_TRUNC | O_WRONLY, 0666); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2324 sprintf(buf, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2325 "/tmp/t38-tx-audio-%p-%02d%02d%02d%02d%02d%02d", |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2326 s, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2327 tm->tm_year%100, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2328 tm->tm_mon + 1, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2329 tm->tm_mday, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2330 tm->tm_hour, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2331 tm->tm_min, |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2332 tm->tm_sec); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2333 s->audio.modems.audio_tx_log = open(buf, O_CREAT | O_TRUNC | O_WRONLY, 0666); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2334 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2335 #endif |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2336 return s; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2337 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2338 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2339 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2340 SPAN_DECLARE(int) t38_gateway_release(t38_gateway_state_t *s) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2341 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2342 return 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2343 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2344 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2345 |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2346 SPAN_DECLARE(int) t38_gateway_free(t38_gateway_state_t *s) |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2347 { |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2348 free(s); |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2349 return 0; |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2350 } |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2351 /*- End of function --------------------------------------------------------*/ |
26cd8f1ef0b1
import spandsp-0.0.6pre17
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff
changeset
|
2352 /*- End of file ------------------------------------------------------------*/ |