annotate spandsp-0.0.3/spandsp-0.0.3/src/async.c @ 5:f762bf195c4b

import spandsp-0.0.3
author Peter Meerwald <pmeerw@cosy.sbg.ac.at>
date Fri, 25 Jun 2010 16:00:21 +0200
parents
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
5
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1 /*
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2 * SpanDSP - a series of DSP components for telephony
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4 * async.c - Asynchronous serial bit stream encoding and decoding
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
5 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
6 * Written by Steve Underwood <steveu@coppice.org>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
7 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
8 * Copyright (C) 2003 Steve Underwood
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
9 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
10 * All rights reserved.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
11 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
12 * This program is free software; you can redistribute it and/or modify
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
13 * it under the terms of the GNU General Public License version 2, as
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
14 * published by the Free Software Foundation.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
15 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
16 * This program is distributed in the hope that it will be useful,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
19 * GNU General Public License for more details.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
20 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
21 * You should have received a copy of the GNU General Public License
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
22 * along with this program; if not, write to the Free Software
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
24 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
25 * $Id: async.c,v 1.6 2006/11/19 14:07:24 steveu Exp $
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
26 */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
27
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
28 /*! \file */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
29
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
30 #ifdef HAVE_CONFIG_H
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
31 #include <config.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
32 #endif
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
33
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
34 #include <inttypes.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
35 #include <stdlib.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
36 #include <string.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
37 #include <assert.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
38
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
39 #include "spandsp/telephony.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
40 #include "spandsp/async.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
41
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
42 void async_rx_init(async_rx_state_t *s,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
43 int data_bits,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
44 int parity,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
45 int stop_bits,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
46 int use_v14,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
47 put_byte_func_t put_byte,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
48 void *user_data)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
49 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
50 s->data_bits = data_bits;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
51 s->parity = parity;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
52 s->stop_bits = stop_bits;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
53 s->use_v14 = use_v14;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
54
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
55 s->put_byte = put_byte;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
56 s->user_data = user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
57
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
58 s->byte_in_progress = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
59 s->bitpos = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
60 s->parity_bit = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
61
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
62 s->parity_errors = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
63 s->framing_errors = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
64 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
65 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
66
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
67 void async_rx_put_bit(void *user_data, int bit)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
68 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
69 async_rx_state_t *s;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
70
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
71 s = (async_rx_state_t *) user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
72 if (bit < 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
73 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
74 /* Special conditions */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
75 switch (bit)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
76 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
77 case PUTBIT_CARRIER_UP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
78 case PUTBIT_CARRIER_DOWN:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
79 case PUTBIT_TRAINING_SUCCEEDED:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
80 case PUTBIT_TRAINING_FAILED:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
81 case PUTBIT_END_OF_DATA:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
82 s->put_byte(s->user_data, bit);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
83 s->bitpos = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
84 s->byte_in_progress = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
85 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
86 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
87 //printf("Eh!\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
88 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
89 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
90 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
91 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
92 if (s->bitpos == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
93 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
94 /* Search for the start bit */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
95 s->bitpos += (bit ^ 1);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
96 s->parity_bit = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
97 s->byte_in_progress = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
98 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
99 else if (s->bitpos <= s->data_bits)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
100 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
101 s->byte_in_progress = (s->byte_in_progress >> 1) | (bit << 7);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
102 s->parity_bit ^= bit;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
103 s->bitpos++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
104 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
105 else if (s->parity && s->bitpos == s->data_bits + 1)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
106 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
107 if (s->parity == ASYNC_PARITY_ODD)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
108 s->parity_bit ^= 1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
109
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
110 if (s->parity_bit != bit)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
111 s->parity_errors++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
112 s->bitpos++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
113 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
114 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
115 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
116 /* Stop bit */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
117 if (bit == 1)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
118 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
119 /* Align the received value */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
120 if (s->data_bits < 8)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
121 s->byte_in_progress >>= (8 - s->data_bits);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
122 s->put_byte(s->user_data, s->byte_in_progress);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
123 s->bitpos = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
124 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
125 else if (s->use_v14)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
126 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
127 /* This is actually the start bit for the next character, and
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
128 the stop bit has been dropped from the stream. This is the
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
129 rate adaption specified in V.14 */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
130 /* Align the received value */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
131 if (s->data_bits < 8)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
132 s->byte_in_progress >>= (8 - s->data_bits);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
133 s->put_byte(s->user_data, s->byte_in_progress);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
134 s->bitpos = 1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
135 s->parity_bit = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
136 s->byte_in_progress = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
137 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
138 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
139 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
140 s->framing_errors++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
141 s->bitpos = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
142 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
143 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
144 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
145 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
146
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
147 void async_tx_init(async_tx_state_t *s,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
148 int data_bits,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
149 int parity,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
150 int stop_bits,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
151 int use_v14,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
152 get_byte_func_t get_byte,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
153 void *user_data)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
154 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
155 /* We have a use_v14 parameter for completeness, but right now V.14 only
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
156 applies to the receive side. We are unlikely to have an application where
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
157 flow control does not exist, so V.14 stuffing is not needed. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
158 s->data_bits = data_bits;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
159 s->parity = parity;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
160 s->stop_bits = stop_bits;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
161 if (parity != ASYNC_PARITY_NONE)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
162 s->stop_bits++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
163
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
164 s->get_byte = get_byte;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
165 s->user_data = user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
166
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
167 s->byte_in_progress = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
168 s->bitpos = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
169 s->parity_bit = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
170 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
171 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
172
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
173 int async_tx_get_bit(void *user_data)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
174 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
175 async_tx_state_t *s;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
176 int bit;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
177
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
178 s = (async_tx_state_t *) user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
179 if (s->bitpos == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
180 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
181 if ((s->byte_in_progress = s->get_byte(s->user_data)) < 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
182 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
183 /* No more data */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
184 bit = PUTBIT_END_OF_DATA;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
185 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
186 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
187 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
188 /* Start bit */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
189 bit = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
190 s->parity_bit = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
191 s->bitpos++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
192 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
193 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
194 else if (s->bitpos <= s->data_bits)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
195 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
196 bit = s->byte_in_progress & 1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
197 s->byte_in_progress >>= 1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
198 s->parity_bit ^= bit;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
199 s->bitpos++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
200 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
201 else if (s->parity && s->bitpos == s->data_bits + 1)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
202 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
203 if (s->parity == ASYNC_PARITY_ODD)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
204 s->parity_bit ^= 1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
205 bit = s->parity_bit;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
206 s->bitpos++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
207 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
208 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
209 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
210 /* Stop bit(s) */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
211 bit = 1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
212 if (++s->bitpos > s->data_bits + s->stop_bits)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
213 s->bitpos = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
214 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
215 return bit;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
216 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
217 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
218 /*- End of file ------------------------------------------------------------*/

Repositories maintained by Peter Meerwald, pmeerw@pmeerw.net.