annotate spandsp-0.0.3/spandsp-0.0.3/src/fsk.c @ 5:f762bf195c4b

import spandsp-0.0.3
author Peter Meerwald <pmeerw@cosy.sbg.ac.at>
date Fri, 25 Jun 2010 16:00:21 +0200
parents
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
5
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1 /*
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2 * SpanDSP - a series of DSP components for telephony
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4 * fsk.c - FSK modem transmit and receive parts
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
5 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
6 * Written by Steve Underwood <steveu@coppice.org>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
7 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
8 * Copyright (C) 2003 Steve Underwood
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
9 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
10 * All rights reserved.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
11 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
12 * This program is free software; you can redistribute it and/or modify
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
13 * it under the terms of the GNU General Public License version 2, as
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
14 * published by the Free Software Foundation.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
15 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
16 * This program is distributed in the hope that it will be useful,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
19 * GNU General Public License for more details.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
20 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
21 * You should have received a copy of the GNU General Public License
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
22 * along with this program; if not, write to the Free Software
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
24 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
25 * $Id: fsk.c,v 1.27 2006/11/19 14:07:24 steveu Exp $
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
26 */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
27
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
28 /*! \file */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
29
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
30 #ifdef HAVE_CONFIG_H
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
31 #include <config.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
32 #endif
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
33
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
34 #include <inttypes.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
35 #include <stdlib.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
36 #include <string.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
37 #if defined(HAVE_TGMATH_H)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
38 #include <tgmath.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
39 #endif
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
40 #if defined(HAVE_MATH_H)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
41 #include <math.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
42 #endif
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
43 #include <assert.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
44
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
45 #include "spandsp/telephony.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
46 #include "spandsp/complex.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
47 #include "spandsp/dds.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
48 #include "spandsp/power_meter.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
49 #include "spandsp/async.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
50 #include "spandsp/fsk.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
51
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
52 fsk_spec_t preset_fsk_specs[] =
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
53 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
54 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
55 "V21 ch 1",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
56 1080 + 100,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
57 1080 - 100,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
58 -14,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
59 -30,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
60 300
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
61 },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
62 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
63 "V21 ch 2",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
64 1750 + 100,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
65 1750 - 100,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
66 -14,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
67 -30,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
68 300
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
69 },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
70 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
71 "V23 ch 1",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
72 2100,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
73 1300,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
74 -14,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
75 -30,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
76 1200
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
77 },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
78 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
79 "V23 ch 2",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
80 450,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
81 390,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
82 -14,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
83 -30,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
84 75
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
85 },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
86 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
87 "Bell103 ch 1",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
88 2125 - 100,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
89 2125 + 100,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
90 -14,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
91 -30,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
92 300
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
93 },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
94 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
95 "Bell103 ch 2",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
96 1170 - 100,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
97 1170 + 100,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
98 -14,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
99 -30,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
100 300
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
101 },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
102 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
103 "Bell202",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
104 2200,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
105 1200,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
106 -14,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
107 -30,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
108 1200
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
109 },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
110 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
111 "Weitbrecht", /* Used for TDD (Telecomc Device for the Deaf) */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
112 1800,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
113 1400,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
114 -14,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
115 -30,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
116 45 /* Actually 45.45 */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
117 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
118 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
119
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
120 fsk_tx_state_t *fsk_tx_init(fsk_tx_state_t *s,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
121 fsk_spec_t *spec,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
122 get_bit_func_t get_bit,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
123 void *user_data)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
124 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
125 s->baud_rate = spec->baud_rate;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
126 s->get_bit = get_bit;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
127 s->user_data = user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
128
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
129 s->phase_rates[0] = dds_phase_rate((float) spec->freq_zero);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
130 s->phase_rates[1] = dds_phase_rate((float) spec->freq_one);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
131 s->scaling = dds_scaling_dbm0((float) spec->tx_level);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
132 /* Initialise fractional sample baud generation. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
133 s->phase_acc = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
134 s->baud_inc = (s->baud_rate*0x10000)/SAMPLE_RATE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
135 s->baud_frac = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
136 s->current_phase_rate = s->phase_rates[1];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
137
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
138 s->shutdown = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
139 return s;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
140 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
141 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
142
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
143 int fsk_tx(fsk_tx_state_t *s, int16_t *amp, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
144 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
145 int sample;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
146 int bit;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
147
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
148 if (s->shutdown)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
149 return 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
150 /* Make the transitions between 0 and 1 phase coherent, but instantaneous
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
151 jumps. There is currently no interpolation for bauds that end mid-sample.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
152 Mainstream users will not care. Some specialist users might have a problem
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
153 with they, if they care about accurate transition timing. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
154 for (sample = 0; sample < len; sample++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
155 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
156 if ((s->baud_frac += s->baud_inc) >= 0x10000)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
157 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
158 s->baud_frac -= 0x10000;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
159 if ((bit = s->get_bit(s->user_data)) == PUTBIT_END_OF_DATA)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
160 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
161 s->shutdown = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
162 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
163 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
164 s->current_phase_rate = s->phase_rates[bit & 1];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
165 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
166 amp[sample] = dds_mod(&(s->phase_acc), s->current_phase_rate, s->scaling, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
167 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
168 return sample;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
169 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
170 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
171
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
172 void fsk_tx_power(fsk_tx_state_t *s, float power)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
173 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
174 s->scaling = dds_scaling_dbm0(power);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
175 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
176 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
177
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
178 void fsk_tx_set_get_bit(fsk_tx_state_t *s, get_bit_func_t get_bit, void *user_data)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
179 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
180 s->get_bit = get_bit;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
181 s->user_data = user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
182 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
183 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
184
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
185 void fsk_rx_signal_cutoff(fsk_rx_state_t *s, float cutoff)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
186 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
187 s->min_power = power_meter_level_dbm0(cutoff);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
188 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
189 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
190
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
191 float fsk_rx_signal_power(fsk_rx_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
192 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
193 return power_meter_dbm0(&s->power);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
194 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
195 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
196
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
197 void fsk_rx_set_put_bit(fsk_rx_state_t *s, put_bit_func_t put_bit, void *user_data)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
198 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
199 s->put_bit = put_bit;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
200 s->user_data = user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
201 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
202 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
203
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
204 fsk_rx_state_t *fsk_rx_init(fsk_rx_state_t *s,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
205 fsk_spec_t *spec,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
206 int sync_mode,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
207 put_bit_func_t put_bit,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
208 void *user_data)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
209 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
210 int chop;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
211
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
212 memset(s, 0, sizeof(*s));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
213 s->baud_rate = spec->baud_rate;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
214 s->sync_mode = sync_mode;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
215 s->min_power = power_meter_level_dbm0((float) spec->min_level);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
216 s->put_bit = put_bit;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
217 s->user_data = user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
218
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
219 /* Detect by correlating against the tones we want, over a period
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
220 of one baud. The correlation must be quadrature. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
221
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
222 /* First we need the quadrature tone generators to correlate
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
223 against. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
224 s->phase_rate[0] = dds_phase_rate((float) spec->freq_zero);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
225 s->phase_rate[1] = dds_phase_rate((float) spec->freq_one);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
226 s->phase_acc[0] = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
227 s->phase_acc[1] = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
228 s->last_sample = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
229
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
230 /* The correlation should be over one baud. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
231 s->correlation_span = SAMPLE_RATE/spec->baud_rate;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
232 /* But limit it for very slow baud rates, so we do not overflow our
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
233 buffer. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
234 if (s->correlation_span > FSK_MAX_WINDOW_LEN)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
235 s->correlation_span = FSK_MAX_WINDOW_LEN;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
236
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
237 /* We need to scale, to avoid overflow in the correlation. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
238 s->scaling_shift = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
239 chop = s->correlation_span;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
240 while (chop != 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
241 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
242 s->scaling_shift++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
243 chop >>= 1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
244 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
245
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
246 /* Initialise the baud/bit rate tracking. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
247 s->baud_inc = (s->baud_rate*0x10000)/SAMPLE_RATE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
248 s->baud_pll = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
249
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
250 /* Initialise a power detector, so sense when a signal is present. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
251 power_meter_init(&(s->power), 4);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
252 s->carrier_present = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
253 return s;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
254 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
255 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
256
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
257 int fsk_rx(fsk_rx_state_t *s, const int16_t *amp, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
258 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
259 int buf_ptr;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
260 int baudstate;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
261 int sample;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
262 int j;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
263 int32_t dot;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
264 int32_t sum;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
265 int32_t power;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
266 icomplex_t ph;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
267
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
268 buf_ptr = s->buf_ptr;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
269
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
270 for (sample = 0; sample < len; sample++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
271 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
272 /* If there isn't much signal, don't demodulate - it will only produce
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
273 useless junk results. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
274 /* TODO: The carrier signal has no hysteresis! */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
275 power = power_meter_update(&(s->power), amp[sample] - s->last_sample);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
276 s->last_sample = amp[sample];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
277 if (power < s->min_power)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
278 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
279 if (s->carrier_present)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
280 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
281 s->put_bit(s->user_data, PUTBIT_CARRIER_DOWN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
282 s->carrier_present = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
283 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
284 continue;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
285 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
286 if (!s->carrier_present)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
287 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
288 s->put_bit(s->user_data, PUTBIT_CARRIER_UP);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
289 s->carrier_present = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
290 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
291 /* Non-coherent FSK demodulation by correlation with the target tones
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
292 over a one baud interval. The slow V.xx specs. are too open ended
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
293 to allow anything fancier to be used. The dot products are calculated
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
294 using a sliding window approach, so the compute load is not that great. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
295 /* The *totally* asynchronous character to character behaviour of these
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
296 modems, when carrying async. data, seems to force a sample by sample
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
297 approach. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
298 for (j = 0; j < 2; j++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
299 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
300 s->dot_i[j] -= s->window_i[j][buf_ptr];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
301 s->dot_q[j] -= s->window_q[j][buf_ptr];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
302
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
303 ph = dds_complex(&(s->phase_acc[j]), s->phase_rate[j]);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
304 s->window_i[j][buf_ptr] = (ph.re*amp[sample]) >> s->scaling_shift;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
305 s->window_q[j][buf_ptr] = (ph.im*amp[sample]) >> s->scaling_shift;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
306
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
307 s->dot_i[j] += s->window_i[j][buf_ptr];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
308 s->dot_q[j] += s->window_q[j][buf_ptr];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
309 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
310 dot = s->dot_i[0] >> 15;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
311 sum = dot*dot;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
312 dot = s->dot_q[0] >> 15;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
313 sum += dot*dot;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
314 dot = s->dot_i[1] >> 15;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
315 sum -= dot*dot;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
316 dot = s->dot_q[1] >> 15;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
317 sum -= dot*dot;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
318 baudstate = (sum < 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
319
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
320 if (s->lastbit != baudstate)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
321 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
322 s->lastbit = baudstate;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
323 if (s->sync_mode)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
324 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
325 /* For synchronous use (e.g. HDLC channels in FAX modems), nudge
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
326 the baud phase gently, trying to keep it centred on the bauds. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
327 if (s->baud_pll < 0x8000)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
328 s->baud_pll += (s->baud_inc >> 3);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
329 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
330 s->baud_pll -= (s->baud_inc >> 3);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
331 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
332 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
333 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
334 /* For async. operation, believe transitions completely, and
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
335 sample appropriately. This allows instant start on the first
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
336 transition. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
337 /* We must now be about half way to a sampling point. We do not do
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
338 any fractional sample estimation of the transitions, so this is
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
339 the most accurate baud alignment we can do. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
340 s->baud_pll = 0x8000;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
341 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
342
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
343 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
344 if ((s->baud_pll += s->baud_inc) >= 0x10000)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
345 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
346 /* We should be in the middle of a baud now, so report the current
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
347 state as the next bit */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
348 s->baud_pll -= 0x10000;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
349 s->put_bit(s->user_data, baudstate);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
350 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
351 if (++buf_ptr >= s->correlation_span)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
352 buf_ptr = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
353 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
354 s->buf_ptr = buf_ptr;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
355 return 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
356 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
357 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
358 /*- End of file ------------------------------------------------------------*/

Repositories maintained by Peter Meerwald, pmeerw@pmeerw.net.