annotate spandsp-0.0.3/spandsp-0.0.3/src/t30.c @ 5:f762bf195c4b

import spandsp-0.0.3
author Peter Meerwald <pmeerw@cosy.sbg.ac.at>
date Fri, 25 Jun 2010 16:00:21 +0200
parents
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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5
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1 /*
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2 * SpanDSP - a series of DSP components for telephony
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4 * t30.c - ITU T.30 FAX transfer processing
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
5 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
6 * Written by Steve Underwood <steveu@coppice.org>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
7 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
8 * Copyright (C) 2003, 2004, 2005, 2006 Steve Underwood
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
9 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
10 * All rights reserved.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
11 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
12 * This program is free software; you can redistribute it and/or modify
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
13 * it under the terms of the GNU General Public License version 2, as
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
14 * published by the Free Software Foundation.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
15 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
16 * This program is distributed in the hope that it will be useful,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
19 * GNU General Public License for more details.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
20 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
21 * You should have received a copy of the GNU General Public License
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
22 * along with this program; if not, write to the Free Software
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
24 *
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
25 * $Id: t30.c,v 1.149 2006/11/30 15:41:47 steveu Exp $
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
26 */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
27
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
28 /*! \file */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
29
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
30 #ifdef HAVE_CONFIG_H
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
31 #include <config.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
32 #endif
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
33
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
34 #include <stdlib.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
35 #include <stdio.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
36 #include <inttypes.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
37 #include <string.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
38 #include <fcntl.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
39 #include <time.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
40 #if defined(HAVE_TGMATH_H)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
41 #include <tgmath.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
42 #endif
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
43 #if defined(HAVE_MATH_H)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
44 #include <math.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
45 #endif
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
46 #include <tiffio.h>
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
47
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
48 #include "spandsp/telephony.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
49 #include "spandsp/logging.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
50 #include "spandsp/bit_operations.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
51 #include "spandsp/queue.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
52 #include "spandsp/power_meter.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
53 #include "spandsp/complex.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
54 #include "spandsp/tone_generate.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
55 #include "spandsp/async.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
56 #include "spandsp/hdlc.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
57 #include "spandsp/fsk.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
58 #include "spandsp/v29rx.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
59 #include "spandsp/v29tx.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
60 #include "spandsp/v27ter_rx.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
61 #include "spandsp/v27ter_tx.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
62 #include "spandsp/t4.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
63
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
64 #include "spandsp/t30_fcf.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
65 #include "spandsp/t35.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
66 #include "spandsp/t30.h"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
67
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
68 #define MAX_MESSAGE_TRIES 3
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
69
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
70 #define ms_to_samples(t) (((t)*SAMPLE_RATE)/1000)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
71
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
72 typedef struct
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
73 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
74 int val;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
75 const char *str;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
76 } value_string_t;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
77
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
78 /* T.30 defines the following call phases:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
79 Phase A: Call set-up.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
80 Exchange of CNG, CED and the called terminal identification.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
81 Phase B: Pre-message procedure for identifying and selecting the required facilities.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
82 Capabilities negotiation, and training, up the the confirmation to receive.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
83 Phase C: Message transmission (includes phasing and synchronization where appropriate).
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
84 Transfer of the message at high speed.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
85 Phase D: Post-message procedure, including end-of-message and confirmation and multi-document procedures.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
86 End of message and acknowledgement.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
87 Phase E: Call release
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
88 Final call disconnect. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
89 enum
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
90 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
91 T30_PHASE_IDLE = 0, /* Freshly initialised */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
92 T30_PHASE_A_CED, /* Doing the CED (answer) sequence */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
93 T30_PHASE_A_CNG, /* Doing the CNG (caller) sequence */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
94 T30_PHASE_B_RX, /* Receiving pre-message control messages */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
95 T30_PHASE_B_TX, /* Transmitting pre-message control messages */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
96 T30_PHASE_C_NON_ECM_RX, /* Receiving a document message in non-ECM mode */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
97 T30_PHASE_C_NON_ECM_TX, /* Transmitting a document message in non-ECM mode */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
98 T30_PHASE_C_ECM_RX, /* Receiving a document message in ECM (HDLC) mode */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
99 T30_PHASE_C_ECM_TX, /* Transmitting a document message in ECM (HDLC) mode */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
100 T30_PHASE_D_RX, /* Receiving post-message control messages */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
101 T30_PHASE_D_TX, /* Transmitting post-message control messages */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
102 T30_PHASE_E, /* In phase E */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
103 T30_PHASE_CALL_FINISHED /* Call completely finished */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
104 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
105
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
106 static const char *phase_names[] =
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
107 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
108 "T30_PHASE_IDLE",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
109 "T30_PHASE_A_CED",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
110 "T30_PHASE_A_CNG",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
111 "T30_PHASE_B_RX",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
112 "T30_PHASE_B_TX",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
113 "T30_PHASE_C_NON_ECM_RX",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
114 "T30_PHASE_C_NON_ECM_TX",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
115 "T30_PHASE_C_ECM_RX",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
116 "T30_PHASE_C_ECM_TX",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
117 "T30_PHASE_D_RX",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
118 "T30_PHASE_D_TX",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
119 "T30_PHASE_E",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
120 "T30_PHASE_CALL_FINISHED"
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
121 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
122
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
123 /* These state names are modelled after places in the T.30 flow charts. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
124 enum
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
125 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
126 T30_STATE_ANSWERING = 1,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
127 T30_STATE_B,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
128 T30_STATE_C,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
129 T30_STATE_D,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
130 T30_STATE_D_TCF,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
131 T30_STATE_D_POST_TCF,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
132 T30_STATE_F_TCF,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
133 T30_STATE_F_CFR,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
134 T30_STATE_F_FTT,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
135 T30_STATE_F_DOC,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
136 T30_STATE_F_POST_DOC_NON_ECM,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
137 T30_STATE_F_POST_DOC_ECM,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
138 T30_STATE_F_POST_RCP_MCF,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
139 T30_STATE_F_POST_RCP_PPR,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
140 T30_STATE_R,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
141 T30_STATE_T,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
142 T30_STATE_I,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
143 T30_STATE_II,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
144 T30_STATE_II_Q,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
145 T30_STATE_III_Q_MCF,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
146 T30_STATE_III_Q_RTP,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
147 T30_STATE_III_Q_RTN,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
148 T30_STATE_IV,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
149 T30_STATE_IV_PPS_NULL,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
150 T30_STATE_IV_PPS_Q,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
151 T30_STATE_IV_PPS_RNR,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
152 T30_STATE_IV_CTC,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
153 T30_STATE_IV_EOR,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
154 T30_STATE_IV_EOR_RNR,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
155 T30_STATE_CALL_FINISHED
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
156 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
157
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
158 enum
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
159 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
160 T30_MODE_SEND_DOC = 1,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
161 T30_MODE_RECEIVE_DOC
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
162 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
163
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
164 enum
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
165 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
166 T30_COPY_QUALITY_GOOD = 0,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
167 T30_COPY_QUALITY_POOR,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
168 T30_COPY_QUALITY_BAD
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
169 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
170
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
171 #define DISBIT1 0x01
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
172 #define DISBIT2 0x02
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
173 #define DISBIT3 0x04
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
174 #define DISBIT4 0x08
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
175 #define DISBIT5 0x10
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
176 #define DISBIT6 0x20
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
177 #define DISBIT7 0x40
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
178 #define DISBIT8 0x80
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
179
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
180 /* All timers specified in milliseconds */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
181
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
182 /* Time-out T0 defines the amount of time an automatic calling terminal waits for the called terminal
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
183 to answer the call.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
184 T0 begins after the dialling of the number is completed and is reset:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
185 a) when T0 times out; or
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
186 b) when timer T1 is started; or
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
187 c) if the terminal is capable of detecting any condition which indicates that the call will not be
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
188 successful, when such a condition is detected.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
189 The recommended value of T0 is 60+-5s; however, when it is anticipated that a long call set-up
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
190 time may be encountered, an alternative value of up to 120s may be used.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
191 NOTE - National regulations may require the use of other values for T0. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
192 #define DEFAULT_TIMER_T0 60000
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
193
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
194 /* Time-out T1 defines the amount of time two terminals will continue to attempt to identify each
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
195 other. T1 is 35+-5s, begins upon entering phase B, and is reset upon detecting a valid signal or
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
196 when T1 times out.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
197 For operating methods 3 and 4 (see 3.1), the calling terminal starts time-out T1 upon reception of
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
198 the V.21 modulation scheme.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
199 For operating method 4 bis a (see 3.1), the calling terminal starts time-out T1 upon starting
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
200 transmission using the V.21 modulation scheme. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
201 #define DEFAULT_TIMER_T1 35000
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
202
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
203 /* Time-out T2 makes use of the tight control between commands and responses to detect the loss of
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
204 command/response synchronization. T2 is 6+-1s and begins when initiating a command search
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
205 (e.g., the first entrance into the "command received" subroutine, reference flow diagram in 5.2).
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
206 T2 is reset when an HDLC flag is received or when T2 times out. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
207 #define DEFAULT_TIMER_T2 7000
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
208
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
209 /* Time-out T3 defines the amount of time a terminal will attempt to alert the local operator in
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
210 response to a procedural interrupt. Failing to achieve operator intervention, the terminal will
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
211 discontinue this attempt and shall issue other commands or responses. T3 is 10+-5s, begins on the
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
212 first detection of a procedural interrupt command/response signal (i.e., PIN/PIP or PRI-Q) and is
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
213 reset when T3 times out or when the operator initiates a line request. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
214 #define DEFAULT_TIMER_T3 15000
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
215
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
216 /* NOTE - For manual FAX units, the value of timer T4 may be either 3.0s +-15% or 4.5s +-15%.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
217 If the value of 4.5s is used, then after detection of a valid response to the first DIS, it may
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
218 be reduced to 3.0s +-15%. T4 = 3.0s +-15% for automatic units. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
219 #define DEFAULT_TIMER_T4 3450
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
220
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
221 /* Time-out T5 is defined for the optional T.4 error correction mode. Time-out T5 defines the amount
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
222 of time waiting for clearance of the busy condition of the receiving terminal. T5 is 60+-5s and
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
223 begins on the first detection of the RNR response. T5 is reset when T5 times out or the MCF or PIP
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
224 response is received or when the ERR or PIN response is received in the flow control process after
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
225 transmitting the EOR command. If the timer T5 has expired, the DCN command is transmitted for
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
226 call release. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
227 #define DEFAULT_TIMER_T5 65000
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
228
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
229 #define DEFAULT_TIMER_T6 5000
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
230
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
231 #define DEFAULT_TIMER_T7 6000
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
232
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
233 #define DEFAULT_TIMER_T8 10000
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
234
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
235 /* Exact widths in PELs for the difference resolutions, and page widths:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
236 R4 864 pels/215mm for ISO A4, North American Letter and Legal
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
237 R4 1024 pels/255mm for ISO B4
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
238 R4 1216 pels/303mm for ISO A3
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
239 R8 1728 pels/215mm for ISO A4, North American Letter and Legal
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
240 R8 2048 pels/255mm for ISO B4
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
241 R8 2432 pels/303mm for ISO A3
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
242 R16 3456 pels/215mm for ISO A4, North American Letter and Legal
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
243 R16 4096 pels/255mm for ISO B4
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
244 R16 4864 pels/303mm for ISO A3
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
245 */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
246
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
247 #define T30_V17_FALLBACK_START 0
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
248 #define T30_V29_FALLBACK_START 3
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
249 #define T30_V27TER_FALLBACK_START 6
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
250
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
251 static const struct
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
252 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
253 int bit_rate;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
254 int modem_type;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
255 uint8_t dcs_code;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
256 } fallback_sequence[] =
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
257 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
258 {14400, T30_MODEM_V17_14400, DISBIT6},
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
259 {12000, T30_MODEM_V17_12000, (DISBIT6 | DISBIT4)},
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
260 { 9600, T30_MODEM_V17_9600, (DISBIT6 | DISBIT3)},
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
261 { 9600, T30_MODEM_V29_9600, DISBIT3},
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
262 { 7200, T30_MODEM_V17_7200, (DISBIT6 | DISBIT4 | DISBIT3)},
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
263 { 7200, T30_MODEM_V29_7200, (DISBIT4 | DISBIT3)},
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
264 { 4800, T30_MODEM_V27TER_4800, DISBIT4},
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
265 { 2400, T30_MODEM_V27TER_2400, 0},
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
266 { 0, 0, 0}
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
267 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
268
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
269 static void queue_phase(t30_state_t *s, int phase);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
270 static void set_phase(t30_state_t *s, int phase);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
271 static void set_state(t30_state_t *s, int state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
272 static void send_simple_frame(t30_state_t *s, int type);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
273 static void send_frame(t30_state_t *s, const uint8_t *fr, int frlen);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
274 static void send_dcn(t30_state_t *s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
275 static void repeat_last_command(t30_state_t *s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
276 static void disconnect(t30_state_t *s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
277 static void decode_20digit_msg(t30_state_t *s, char *msg, const uint8_t *pkt, int len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
278 static void decode_url_msg(t30_state_t *s, char *msg, const uint8_t *pkt, int len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
279
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
280 static void rx_start_page(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
281 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
282 int i;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
283
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
284 t4_rx_set_image_width(&(s->t4), s->image_width);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
285 t4_rx_set_sub_address(&(s->t4), s->far_sub_address);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
286 t4_rx_set_far_ident(&(s->t4), s->far_ident);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
287 t4_rx_set_vendor(&(s->t4), s->vendor);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
288 t4_rx_set_model(&(s->t4), s->model);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
289
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
290 t4_rx_set_rx_encoding(&(s->t4), s->line_encoding);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
291 t4_rx_set_y_resolution(&(s->t4), s->y_resolution);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
292
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
293 t4_rx_start_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
294 /* Clear the buffer */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
295 for (i = 0; i < 256; i++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
296 s->ecm_len[i] = -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
297 s->ecm_frames = -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
298 s->ecm_page++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
299 s->ecm_block = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
300 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
301 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
302
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
303 static int copy_quality(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
304 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
305 t4_stats_t stats;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
306
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
307 /* There is no specification for judging copy quality. However, we need to classify
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
308 it at three levels, to control what we do next: OK; tolerable, but retrain;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
309 intolerable, so retrain. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
310 t4_get_transfer_statistics(&(s->t4), &stats);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
311 span_log(&s->logging, SPAN_LOG_FLOW, "Pages = %d\n", stats.pages_transferred);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
312 span_log(&s->logging, SPAN_LOG_FLOW, "Image size = %dx%d\n", stats.width, stats.length);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
313 span_log(&s->logging, SPAN_LOG_FLOW, "Image resolution = %dx%d\n", stats.x_resolution, stats.y_resolution);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
314 span_log(&s->logging, SPAN_LOG_FLOW, "Bad rows = %d\n", stats.bad_rows);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
315 span_log(&s->logging, SPAN_LOG_FLOW, "Longest bad row run = %d\n", stats.longest_bad_row_run);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
316 if (stats.bad_rows*50 < stats.length)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
317 return T30_COPY_QUALITY_GOOD;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
318 if (stats.bad_rows*20 < stats.length)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
319 return T30_COPY_QUALITY_POOR;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
320 return T30_COPY_QUALITY_BAD;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
321 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
322 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
323
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
324 const char *t30_completion_code_to_str(int result)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
325 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
326 switch (result)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
327 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
328 case T30_ERR_OK:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
329 return "OK";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
330 case T30_ERR_CEDTONE:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
331 return "The CED tone exceeded 5s";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
332 case T30_ERR_T0EXPIRED:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
333 return "Timed out waiting for initial communication";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
334 case T30_ERR_T1EXPIRED:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
335 return "Timed out waiting for the first message";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
336 case T30_ERR_T3EXPIRED:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
337 return "Timed out waiting for procedural interrupt";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
338 case T30_ERR_HDLCCARR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
339 return "The HDLC carrier did not stop in a timely manner";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
340 case T30_ERR_CANNOTTRAIN:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
341 return "Failed to train with any of the compatible modems";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
342 case T30_ERR_OPERINTFAIL:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
343 return "Operator intervention failed";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
344 case T30_ERR_INCOMPATIBLE:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
345 return "Far end is not compatible";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
346 case T30_ERR_NOTRXCAPABLE:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
347 return "Far end is not receive capable";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
348 case T30_ERR_NOTTXCAPABLE:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
349 return "Far end is not transmit capable";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
350 case T30_ERR_UNEXPECTED:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
351 return "Unexpected message received";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
352 case T30_ERR_NORESSUPPORT:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
353 return "Far end cannot receive at the resolution of the image";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
354 case T30_ERR_NOSIZESUPPORT:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
355 return "Far end cannot receive at the size of image";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
356 case T30_ERR_FILEERROR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
357 return "TIFF/F file cannot be opened";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
358 case T30_ERR_NOPAGE:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
359 return "TIFF/F page not found";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
360 case T30_ERR_BADTIFF:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
361 return "TIFF/F format is not compatible";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
362 case T30_ERR_UNSUPPORTED:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
363 return "Unsupported feature";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
364 case T30_ERR_BADDCSTX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
365 return "Received bad response to DCS or training";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
366 case T30_ERR_BADPGTX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
367 return "Received a DCN from remote after sending a page";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
368 case T30_ERR_ECMPHDTX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
369 return "Invalid ECM response received from receiver";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
370 case T30_ERR_ECMRNRTX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
371 return "Timer T5 expired, receiver not ready";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
372 case T30_ERR_GOTDCNTX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
373 return "Received a DCN while waiting for a DIS";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
374 case T30_ERR_INVALRSPTX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
375 return "Invalid response after sending a page";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
376 case T30_ERR_NODISTX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
377 return "Received other than DIS while waiting for DIS";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
378 case T30_ERR_NXTCMDTX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
379 return "Timed out waiting for next send_page command from driver";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
380 case T30_ERR_PHBDEADTX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
381 return "Received no response to DCS, training or TCF";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
382 case T30_ERR_PHDDEADTX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
383 return "No response after sending a page";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
384 case T30_ERR_ECMPHDRX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
385 return "Invalid ECM response received from transmitter";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
386 case T30_ERR_GOTDCSRX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
387 return "DCS received while waiting for DTC";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
388 case T30_ERR_INVALCMDRX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
389 return "Unexpected command after page received";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
390 case T30_ERR_NOCARRIERRX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
391 return "Carrier lost during fax receive";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
392 case T30_ERR_NOEOLRX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
393 return "Timed out while waiting for EOL (end Of line)";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
394 case T30_ERR_NOFAXRX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
395 return "Timed out while waiting for first line";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
396 case T30_ERR_NXTCMDRX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
397 return "Timed out waiting for next receive page command";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
398 case T30_ERR_T2EXPDCNRX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
399 return "Timer T2 expired while waiting for DCN";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
400 case T30_ERR_T2EXPDRX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
401 return "Timer T2 expired while waiting for phase D";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
402 case T30_ERR_T2EXPFAXRX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
403 return "Timer T2 expired while waiting for fax page";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
404 case T30_ERR_T2EXPMPSRX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
405 return "Timer T2 expired while waiting for next fax page";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
406 case T30_ERR_T2EXPRRRX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
407 return "Timer T2 expired while waiting for RR command";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
408 case T30_ERR_T2EXPRX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
409 return "Timer T2 expired while waiting for NSS, DCS or MCF";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
410 case T30_ERR_DCNWHYRX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
411 return "Unexpected DCN while waiting for DCS or DIS";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
412 case T30_ERR_DCNDATARX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
413 return "Unexpected DCN while waiting for image data";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
414 case T30_ERR_DCNFAXRX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
415 return "Unexpected DCN while waiting for EOM, EOP or MPS";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
416 case T30_ERR_DCNPHDRX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
417 return "Unexpected DCN after EOM or MPS sequence";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
418 case T30_ERR_DCNRRDRX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
419 return "Unexpected DCN after RR/RNR sequence";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
420 case T30_ERR_DCNNORTNRX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
421 return "Unexpected DCN after requested retransmission";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
422 case T30_ERR_BADPAGE:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
423 return "TIFF/F page number tag missing";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
424 case T30_ERR_BADTAG:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
425 return "Incorrect values for TIFF/F tags";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
426 case T30_ERR_BADTIFFHDR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
427 return "Bad TIFF/F header - incorrect values in fields";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
428 case T30_ERR_BADPARM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
429 return "Invalid value for fax parameter";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
430 case T30_ERR_BADSTATE:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
431 return "Invalid initial state value specified";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
432 case T30_ERR_CMDDATA:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
433 return "Last command contained invalid data";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
434 case T30_ERR_DISCONNECT:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
435 return "Fax call disconnected by the other station";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
436 case T30_ERR_INVALARG:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
437 return "Illegal argument to function";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
438 case T30_ERR_INVALFUNC:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
439 return "Illegal call to function";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
440 case T30_ERR_NODATA:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
441 return "Data requested is not available (NSF, DIS, DCS)";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
442 case T30_ERR_NOMEM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
443 return "Cannot allocate memory for more pages";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
444 case T30_ERR_NOPOLL:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
445 return "Poll not accepted";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
446 case T30_ERR_NOSTATE:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
447 return "Initial state value not set";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
448 case T30_ERR_RETRYDCN:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
449 return "Disconnected after permitted retries";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
450 case T30_ERR_CALLDROPPED:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
451 return "The call dropped prematurely";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
452 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
453 return "???";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
454 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
455 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
456
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
457 void t30_non_ecm_put_bit(void *user_data, int bit)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
458 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
459 t30_state_t *s;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
460 int was_trained;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
461
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
462 s = (t30_state_t *) user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
463 if (bit < 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
464 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
465 /* Special conditions */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
466 switch (bit)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
467 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
468 case PUTBIT_TRAINING_FAILED:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
469 span_log(&s->logging, SPAN_LOG_FLOW, "Non-ECM carrier training failed in state %d\n", s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
470 s->rx_trained = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
471 /* Cancel the timer, since we have actually seen something, and wait until the carrier drops
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
472 before proceeding. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
473 // TODO: this is not a complete answer to handling failures to train
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
474 s->timer_t2_t4 = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
475 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
476 case PUTBIT_TRAINING_SUCCEEDED:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
477 /* The modem is now trained */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
478 span_log(&s->logging, SPAN_LOG_FLOW, "Non-ECM carrier trained in state %d\n", s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
479 /* In case we are in trainability test mode... */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
480 /* A FAX machine is supposed to send 1.5s of training test
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
481 data, but some send a little bit less. Lets just check
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
482 the first 1s, and be safe. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
483 s->training_current_zeros = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
484 s->training_most_zeros = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
485 s->rx_signal_present = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
486 s->rx_trained = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
487 s->timer_t2_t4 = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
488 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
489 case PUTBIT_CARRIER_UP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
490 span_log(&s->logging, SPAN_LOG_FLOW, "Non-ECM carrier up in state %d\n", s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
491 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
492 case PUTBIT_CARRIER_DOWN:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
493 span_log(&s->logging, SPAN_LOG_FLOW, "Non-ECM carrier down in state %d\n", s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
494 was_trained = s->rx_trained;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
495 s->rx_signal_present = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
496 s->rx_trained = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
497 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
498 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
499 case T30_STATE_F_TCF:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
500 /* Only respond if we managed to actually sync up with the source. We don't
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
501 want to respond just because we saw a click. These often occur just
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
502 before the real signal, with many modems. Presumably this is due to switching
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
503 within the far end modem. We also want to avoid the possibility of responding
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
504 to the tail end of any slow modem signal. If there was a genuine data signal
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
505 which we failed to train on it should not matter. If things are that bad, we
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
506 do not stand much chance of good quality communications. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
507 if (was_trained)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
508 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
509 /* Although T.30 says the training test should be 1.5s of all 0's, some FAX
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
510 machines send a burst of all 1's before the all 0's. Tolerate this. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
511 if (s->training_current_zeros > s->training_most_zeros)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
512 s->training_most_zeros = s->training_current_zeros;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
513 if (s->training_most_zeros < fallback_sequence[s->current_fallback].bit_rate)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
514 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
515 span_log(&s->logging, SPAN_LOG_FLOW, "Trainability test failed - longest run of zeros was %d\n", s->training_most_zeros);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
516 set_phase(s, T30_PHASE_B_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
517 set_state(s, T30_STATE_F_FTT);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
518 send_simple_frame(s, T30_FTT);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
519 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
520 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
521 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
522 /* The training went OK */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
523 s->short_train = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
524 s->in_message = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
525 rx_start_page(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
526 set_phase(s, T30_PHASE_B_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
527 set_state(s, T30_STATE_F_CFR);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
528 send_simple_frame(s, T30_CFR);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
529 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
530 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
531 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
532 case T30_STATE_F_POST_DOC_NON_ECM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
533 /* Page ended cleanly */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
534 if (s->current_status == T30_ERR_NOCARRIERRX)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
535 s->current_status = T30_ERR_OK;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
536 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
537 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
538 /* We should be receiving a document right now, but it did not end cleanly. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
539 if (was_trained)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
540 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
541 span_log(&s->logging, SPAN_LOG_WARNING, "Page did not end cleanly\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
542 /* We trained OK, so we should have some kind of received page, even though
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
543 it did not end cleanly. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
544 set_state(s, T30_STATE_F_POST_DOC_NON_ECM);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
545 set_phase(s, T30_PHASE_D_RX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
546 s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
547 s->timer_is_t4 = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
548 if (s->current_status == T30_ERR_NOCARRIERRX)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
549 s->current_status = T30_ERR_OK;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
550 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
551 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
552 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
553 span_log(&s->logging, SPAN_LOG_WARNING, "Non-ECM carrier not found\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
554 s->current_status = T30_ERR_NOCARRIERRX;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
555 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
556 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
557 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
558 if (s->next_phase != T30_PHASE_IDLE)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
559 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
560 set_phase(s, s->next_phase);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
561 s->next_phase = T30_PHASE_IDLE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
562 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
563 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
564 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
565 span_log(&s->logging, SPAN_LOG_WARNING, "Unexpected non-ECM special bit - %d!\n", bit);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
566 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
567 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
568 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
569 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
570 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
571 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
572 case T30_STATE_F_TCF:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
573 /* Trainability test */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
574 if (bit)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
575 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
576 if (s->training_current_zeros > s->training_most_zeros)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
577 s->training_most_zeros = s->training_current_zeros;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
578 s->training_current_zeros = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
579 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
580 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
581 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
582 s->training_current_zeros++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
583 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
584 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
585 case T30_STATE_F_DOC:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
586 /* Document transfer */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
587 if (t4_rx_put_bit(&(s->t4), bit))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
588 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
589 /* That is the end of the document */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
590 set_state(s, T30_STATE_F_POST_DOC_NON_ECM);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
591 queue_phase(s, T30_PHASE_D_RX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
592 s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
593 s->timer_is_t4 = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
594 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
595 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
596 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
597 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
598 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
599
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
600 void t30_non_ecm_putbyte(void *user_data, int byte)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
601 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
602 t30_state_t *s;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
603 int i;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
604
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
605 s = (t30_state_t *) user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
606 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
607 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
608 case T30_STATE_F_TCF:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
609 /* Trainability test */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
610 if (byte == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
611 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
612 s->training_current_zeros += 8;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
613 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
614 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
615 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
616 for (i = 7; i >= 0; i--)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
617 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
618 if (((byte >> i) & 1))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
619 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
620 if (s->training_current_zeros > s->training_most_zeros)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
621 s->training_most_zeros = s->training_current_zeros;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
622 s->training_current_zeros = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
623 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
624 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
625 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
626 s->training_current_zeros++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
627 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
628 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
629 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
630 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
631 case T30_STATE_F_DOC:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
632 /* Document transfer */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
633 for (i = 7; i >= 0; i--)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
634 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
635 if (t4_rx_put_bit(&(s->t4), (byte >> i) & 1))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
636 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
637 /* That is the end of the document */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
638 set_state(s, T30_STATE_F_POST_DOC_NON_ECM);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
639 queue_phase(s, T30_PHASE_D_RX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
640 s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
641 s->timer_is_t4 = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
642 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
643 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
644 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
645 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
646 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
647 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
648
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
649 int t30_non_ecm_get_bit(void *user_data)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
650 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
651 int bit;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
652 t30_state_t *s;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
653
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
654 s = (t30_state_t *) user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
655 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
656 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
657 case T30_STATE_D_TCF:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
658 /* Trainability test. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
659 bit = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
660 if (s->training_test_bits-- < 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
661 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
662 /* Finished sending training test. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
663 bit = PUTBIT_END_OF_DATA;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
664 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
665 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
666 case T30_STATE_I:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
667 /* Transferring real data. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
668 bit = t4_tx_get_bit(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
669 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
670 case T30_STATE_D_POST_TCF:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
671 case T30_STATE_II_Q:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
672 /* We should be padding out a block of samples if we are here */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
673 bit = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
674 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
675 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
676 span_log(&s->logging, SPAN_LOG_WARNING, "t30_non_ecm_get_bit in bad state %d\n", s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
677 bit = 2;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
678 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
679 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
680 return bit;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
681 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
682 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
683
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
684 static int check_next_tx_step(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
685 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
686 int more;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
687
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
688 if (t4_tx_more_pages(&(s->t4)) == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
689 return (s->local_interrupt_pending) ? T30_PRI_MPS : T30_MPS;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
690 /* Call a user handler, if one is set, to check if another document is to be sent.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
691 If so, we send an EOM, rather than an EOP. Then we will renegotiate, and the new
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
692 document will begin. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
693 if (s->document_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
694 more = s->document_handler(s, s->document_user_data, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
695 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
696 more = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
697 if (more)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
698 return (s->local_interrupt_pending) ? T30_PRI_EOM : T30_EOM;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
699 return (s->local_interrupt_pending) ? T30_PRI_EOP : T30_EOP;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
700 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
701 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
702
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
703 static int get_partial_ecm_page(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
704 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
705 int i;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
706 int j;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
707 int k;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
708 int bit;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
709 uint8_t octet;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
710
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
711 s->ppr_count = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
712 /* Fill our partial page buffer with a partial page. Use the negotiated preferred frame size
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
713 as the basis for the size of the frames produced. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
714 /* We fill the buffer with complete HDLC frames, ready to send out. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
715 /* The frames are all marked as not being final frames. When sent, the are followed by a partial
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
716 page signal, which is marked as the final frame. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
717 for (i = 0; i < 256; i++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
718 s->ecm_len[i] = -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
719 for (i = 3; i < 32 + 3; i++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
720 s->ecm_frame_map[i] = 0xFF;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
721 for (i = 0; i < 256; i++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
722 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
723 s->ecm_data[i][0] = 0xFF;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
724 s->ecm_data[i][1] = 0x03;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
725 s->ecm_data[i][2] = T4_FCD;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
726 /* These frames contain a frame sequence number within the partial page (one octet) followed
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
727 by some image data. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
728 s->ecm_data[i][3] = i;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
729 for (j = 4; j < s->octets_per_ecm_frame + 4; j++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
730 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
731 octet = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
732 for (k = 0; k < 8; k++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
733 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
734 if (((bit = t4_tx_get_bit(&(s->t4)))) == PUTBIT_END_OF_DATA)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
735 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
736 if (k > 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
737 s->ecm_data[i][j++] = (uint8_t) (octet >> (7 - k));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
738 if (j > 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
739 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
740 memset(&s->ecm_data[i][j], 0, s->octets_per_ecm_frame + 4 - j);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
741 s->ecm_len[i++] = (int16_t) (s->octets_per_ecm_frame + 4);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
742 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
743 /* The image is not big enough to fill the entire buffer */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
744 /* We need to pad to a full frame, as most receivers expect
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
745 that. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
746 s->ecm_frames = i;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
747 span_log(&s->logging, SPAN_LOG_FLOW, "Partial page buffer contains %d frames (%d per frame)\n", i, s->octets_per_ecm_frame);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
748 s->ecm_at_page_end = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
749 return i;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
750 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
751 octet = (uint8_t) ((octet >> 1) | ((bit & 1) << 7));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
752 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
753 s->ecm_data[i][j] = octet;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
754 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
755 s->ecm_len[i] = (int16_t) j;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
756 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
757 /* We filled the entire buffer */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
758 s->ecm_frames = 256;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
759 span_log(&s->logging, SPAN_LOG_FLOW, "Partial page buffer full (%d per frame)\n", s->octets_per_ecm_frame);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
760 s->ecm_at_page_end = ((t4_tx_check_bit(&(s->t4)) & 2) != 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
761 return 256;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
762 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
763 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
764
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
765 static int t30_ecm_commit_partial_page(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
766 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
767 int i;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
768 int j;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
769 int k;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
770 int bit;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
771
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
772 span_log(&s->logging, SPAN_LOG_FLOW, "Commiting partial page - %d frames\n", s->ecm_frames);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
773 for (i = 0; i < s->ecm_frames; i++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
774 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
775 for (j = 0; j < s->ecm_len[i]; j++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
776 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
777 for (k = 0; k < 8; k++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
778 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
779 bit = (s->ecm_data[i][j] >> k) & 1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
780 if (t4_rx_put_bit(&(s->t4), bit))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
781 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
782 /* That is the end of the document */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
783 /* Clear the buffer */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
784 for (i = 0; i < 256; i++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
785 s->ecm_len[i] = -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
786 s->ecm_frames = -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
787 return -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
788 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
789 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
790 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
791 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
792 /* Clear the buffer */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
793 for (i = 0; i < 256; i++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
794 s->ecm_len[i] = -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
795 s->ecm_frames = -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
796 return 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
797 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
798 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
799
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
800 static int send_next_ecm_frame(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
801 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
802 int i;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
803 uint8_t frame[3];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
804
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
805 if (s->ecm_current_frame < s->ecm_frames)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
806 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
807 /* Search for the next frame, within the current partial page, which has
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
808 not been tagged as transferred OK. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
809 for (i = s->ecm_current_frame; i < s->ecm_frames; i++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
810 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
811 if (s->ecm_len[i] >= 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
812 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
813 send_frame(s, s->ecm_data[i], s->ecm_len[i]);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
814 s->ecm_current_frame = i + 1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
815 return 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
816 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
817 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
818 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
819 if (s->ecm_current_frame <= s->ecm_frames + 3)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
820 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
821 /* We have sent all the FCD frames. Send some RCP frames. Three seems to be
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
822 a popular number, to minimise the risk of a bit error stopping the receiving
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
823 end from recognising the RCP. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
824 s->ecm_current_frame++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
825 /* The RCP frame is an odd man out, as its a simple 1 byte control
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
826 frame, but is specified to not have the final bit set. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
827 frame[0] = 0xFF;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
828 frame[1] = 0x03;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
829 frame[2] = (uint8_t) (T4_RCP | s->dis_received);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
830 send_frame(s, frame, 3);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
831 return 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
832 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
833 return -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
834 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
835 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
836
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
837 static void print_frame(t30_state_t *s, const char *io, const uint8_t *fr, int frlen)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
838 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
839 span_log(&s->logging,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
840 SPAN_LOG_FLOW,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
841 "%s %s with%s final frame tag\n",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
842 io,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
843 t30_frametype(fr[2]),
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
844 (fr[1] & 0x10) ? "" : "out");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
845 span_log_buf(&s->logging, SPAN_LOG_FLOW, io, fr, frlen);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
846 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
847 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
848
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
849 static void send_frame(t30_state_t *s, const uint8_t *fr, int frlen)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
850 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
851 print_frame(s, "Tx: ", fr, frlen);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
852
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
853 if (s->send_hdlc_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
854 s->send_hdlc_handler(s->send_hdlc_user_data, fr, frlen);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
855 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
856 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
857
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
858 static void send_simple_frame(t30_state_t *s, int type)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
859 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
860 uint8_t frame[3];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
861
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
862 /* The simple command/response frames are always final frames */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
863 frame[0] = 0xFF;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
864 frame[1] = 0x13;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
865 frame[2] = (uint8_t) (type | s->dis_received);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
866 send_frame(s, frame, 3);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
867 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
868 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
869
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
870 static void send_20digit_msg_frame(t30_state_t *s, int cmd, char *msg)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
871 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
872 size_t len;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
873 int p;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
874 uint8_t frame[23];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
875
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
876 len = strlen(msg);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
877 p = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
878 frame[p++] = 0xFF;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
879 frame[p++] = 0x03;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
880 frame[p++] = (uint8_t) (cmd | s->dis_received);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
881 while (len > 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
882 frame[p++] = msg[--len];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
883 while (p < 23)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
884 frame[p++] = ' ';
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
885 send_frame(s, frame, 23);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
886 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
887 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
888
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
889 static int send_ident_frame(t30_state_t *s, uint8_t cmd)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
890 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
891 /* Only send if there is an ident to send. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
892 if (s->local_ident[0])
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
893 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
894 span_log(&s->logging, SPAN_LOG_FLOW, "Sending ident '%s'\n", s->local_ident);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
895 /* 'cmd' should be T30_TSI, T30_CIG or T30_CSI */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
896 send_20digit_msg_frame(s, cmd, s->local_ident);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
897 return TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
898 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
899 return FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
900 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
901 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
902
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
903 static int send_pw_frame(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
904 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
905 /* Only send if there is a password to send. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
906 if (s->local_password[0])
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
907 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
908 span_log(&s->logging, SPAN_LOG_FLOW, "Sending password '%s'\n", s->local_password);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
909 send_20digit_msg_frame(s, T30_PWD, s->local_password);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
910 return TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
911 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
912 return FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
913 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
914 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
915
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
916 static int send_sub_frame(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
917 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
918 /* Only send if there is a sub-address to send. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
919 if (s->local_sub_address[0])
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
920 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
921 span_log(&s->logging, SPAN_LOG_FLOW, "Sending sub address '%s'\n", s->local_sub_address);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
922 send_20digit_msg_frame(s, T30_SUB, s->local_sub_address);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
923 return TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
924 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
925 return FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
926 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
927 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
928
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
929 static int send_nsf_frame(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
930 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
931 int p;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
932 uint8_t frame[100 + 3];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
933
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
934 /* Only send if there is an NSF message to send. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
935 if (s->local_nsf_len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
936 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
937 span_log(&s->logging, SPAN_LOG_FLOW, "Sending user supplied NSF - %d octets\n", s->local_nsf_len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
938 p = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
939 frame[p++] = 0xFF;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
940 frame[p++] = 0x03;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
941 frame[p++] = (uint8_t) (T30_NSF | s->dis_received);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
942 for ( ; p < s->local_nsf_len + 3; p++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
943 frame[p] = s->local_nsf[p - 3];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
944 send_frame(s, frame, s->local_nsf_len + 3);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
945 return TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
946 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
947 return FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
948 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
949 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
950
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
951 static int send_pps_frame(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
952 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
953 uint8_t frame[100 + 3];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
954
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
955 frame[0] = 0xFF;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
956 frame[1] = 0x13;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
957 frame[2] = T30_PPS;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
958 frame[3] = (s->ecm_at_page_end) ? ((uint8_t) (s->next_tx_step | s->dis_received)) : T30_NULL;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
959 frame[4] = (uint8_t) (s->ecm_page & 0xFF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
960 frame[5] = (uint8_t) (s->ecm_block & 0xFF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
961 frame[6] = (uint8_t) (s->ecm_frames - 1);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
962 span_log(&s->logging, SPAN_LOG_FLOW, "Sending PPS + %s\n", t30_frametype(frame[3]));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
963 send_frame(s, frame, 7);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
964 return frame[3] & 0xFE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
965 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
966 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
967
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
968 static int set_dis_or_dtc(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
969 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
970 /* Whether we use a DIS or a DTC is determined by whether we have received a DIS.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
971 We just need to edit the prebuilt message. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
972 s->dis_dtc_frame[2] = (uint8_t) (T30_DIS | s->dis_received);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
973 /* If we have a file name to receive into, then we are receive capable */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
974 if (s->rx_file[0])
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
975 s->dis_dtc_frame[4] |= DISBIT2;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
976 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
977 s->dis_dtc_frame[4] &= ~DISBIT2;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
978 /* If we have a file name to transmit, then we are ready to transmit (polling) */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
979 if (s->tx_file[0])
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
980 s->dis_dtc_frame[4] |= DISBIT1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
981 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
982 s->dis_dtc_frame[4] &= ~DISBIT1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
983 t30_decode_dis_dtc_dcs(s, s->dis_dtc_frame, s->dis_dtc_len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
984 return 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
985 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
986 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
987
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
988 static int build_dis_or_dtc(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
989 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
990 int i;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
991
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
992 /* Build a skeleton for the DIS and DTC messages. This will be edited for
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
993 the dynamically changing capabilities (e.g. can receive) just before
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
994 it is sent. It might also be edited if the application changes our
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
995 capabilities (e.g. disabling fine mode). Right now we set up all the
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
996 unchanging stuff about what we are capable of doing. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
997 s->dis_dtc_frame[0] = 0xFF;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
998 s->dis_dtc_frame[1] = 0x13;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
999 s->dis_dtc_frame[2] = (uint8_t) (T30_DIS | s->dis_received);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1000 s->dis_dtc_frame[3] = 0x00;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1001 s->dis_dtc_frame[4] = 0x00;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1002 for (i = 5; i < 18; i++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1003 s->dis_dtc_frame[i] = DISBIT8;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1004 s->dis_dtc_frame[18] = 0x00;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1005
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1006 /* Always say 256 octets per ECM frame preferred, as 64 is never used in the
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1007 real world. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1008 if ((s->iaf & T30_IAF_MODE_T37))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1009 s->dis_dtc_frame[3] |= DISBIT1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1010 if ((s->iaf & T30_IAF_MODE_T38))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1011 s->dis_dtc_frame[3] |= DISBIT3;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1012 /* No 3G mobile */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1013 /* No V.8 */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1014 /* 256 octets preferred - don't bother making this optional, as everything uses 256 */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1015 /* Ready to transmit a fax (polling) will be determined separately, and this message edited. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1016 /* Ready to receive a fax will be determined separately, and this message edited. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1017 /* With no modems set we are actually selecting V.27ter fallback at 2400bps */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1018 if ((s->supported_modems & T30_SUPPORT_V27TER))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1019 s->dis_dtc_frame[4] |= DISBIT4;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1020 if ((s->supported_modems & T30_SUPPORT_V29))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1021 s->dis_dtc_frame[4] |= DISBIT3;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1022 /* V.17 is only valid when combined with V.29 and V.27ter, so if we enable V.17 we force the others too. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1023 if ((s->supported_modems & T30_SUPPORT_V17))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1024 s->dis_dtc_frame[4] |= (DISBIT6 | DISBIT4 | DISBIT3);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1025 if ((s->supported_resolutions & T30_SUPPORT_FINE_RESOLUTION))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1026 s->dis_dtc_frame[4] |= DISBIT7;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1027 if ((s->supported_compressions & T30_SUPPORT_T4_2D_COMPRESSION))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1028 s->dis_dtc_frame[4] |= DISBIT8;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1029 /* 215mm wide is always supported */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1030 if ((s->supported_image_sizes & T30_SUPPORT_303MM_WIDTH))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1031 s->dis_dtc_frame[5] |= DISBIT2;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1032 else if ((s->supported_image_sizes & T30_SUPPORT_255MM_WIDTH))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1033 s->dis_dtc_frame[5] |= DISBIT1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1034 /* A4 is always supported. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1035 if ((s->supported_image_sizes & T30_SUPPORT_UNLIMITED_LENGTH))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1036 s->dis_dtc_frame[5] |= DISBIT4;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1037 else if ((s->supported_image_sizes & T30_SUPPORT_B4_LENGTH))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1038 s->dis_dtc_frame[5] |= DISBIT3;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1039 /* No scan-line padding required. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1040 s->dis_dtc_frame[5] |= (DISBIT7 | DISBIT6 | DISBIT5);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1041 if ((s->supported_compressions & T30_SUPPORT_NO_COMPRESSION))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1042 s->dis_dtc_frame[6] |= DISBIT2;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1043 if (s->ecm_allowed)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1044 s->dis_dtc_frame[6] |= DISBIT3;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1045 if ((s->supported_compressions & T30_SUPPORT_T6_COMPRESSION))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1046 s->dis_dtc_frame[6] |= DISBIT7;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1047 #if defined(SUPPORT_FNV)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1048 s->dis_dtc_frame[7] |= DISBIT1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1049 #endif
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1050 if ((s->supported_polling_features & T30_SUPPORT_SEP))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1051 s->dis_dtc_frame[7] |= DISBIT3;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1052 if ((s->supported_polling_features & T30_SUPPORT_PSA))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1053 s->dis_dtc_frame[7] |= DISBIT4;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1054 if ((s->supported_compressions & T30_SUPPORT_T43_COMPRESSION))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1055 s->dis_dtc_frame[7] |= DISBIT4;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1056 /* No plane interleave */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1057 /* No G.726 */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1058 /* No extended voice coding */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1059 if ((s->supported_resolutions & T30_SUPPORT_SUPERFINE_RESOLUTION))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1060 s->dis_dtc_frame[8] |= DISBIT1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1061 if ((s->supported_resolutions & T30_SUPPORT_300_300_RESOLUTION))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1062 s->dis_dtc_frame[8] |= DISBIT2;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1063 if ((s->supported_resolutions & (T30_SUPPORT_400_400_RESOLUTION | T30_SUPPORT_R16_RESOLUTION)))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1064 s->dis_dtc_frame[8] |= DISBIT3;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1065 /* Metric */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1066 s->dis_dtc_frame[8] |= DISBIT4;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1067 /* No sub-addressing */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1068 /* No password */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1069 /* No data file (polling) */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1070 /* No BFT */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1071 /* No DTM */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1072 /* No EDI */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1073 /* No BTM */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1074 /* No mixed mode (polling) */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1075 /* No character mode */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1076 /* No mixed mode */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1077 /* No mode 26 */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1078 /* No digital network capable */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1079 /* No JPEG */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1080 /* No full colour */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1081 /* No 12bits/pel */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1082 /* No sub-sampling */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1083 if ((s->supported_image_sizes & T30_SUPPORT_US_LETTER_LENGTH))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1084 s->dis_dtc_frame[12] |= DISBIT4;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1085 if ((s->supported_image_sizes & T30_SUPPORT_US_LEGAL_LENGTH))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1086 s->dis_dtc_frame[12] |= DISBIT5;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1087 if ((s->supported_compressions & T30_SUPPORT_T85_COMPRESSION))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1088 s->dis_dtc_frame[12] |= DISBIT6;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1089 /* No T.85 optional. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1090 if ((s->supported_resolutions & T30_SUPPORT_600_600_RESOLUTION))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1091 s->dis_dtc_frame[15] |= DISBIT1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1092 if ((s->supported_resolutions & T30_SUPPORT_1200_1200_RESOLUTION))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1093 s->dis_dtc_frame[15] |= DISBIT2;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1094 if ((s->supported_resolutions & T30_SUPPORT_300_600_RESOLUTION))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1095 s->dis_dtc_frame[15] |= DISBIT3;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1096 if ((s->supported_resolutions & T30_SUPPORT_400_800_RESOLUTION))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1097 s->dis_dtc_frame[15] |= DISBIT4;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1098 if ((s->supported_resolutions & T30_SUPPORT_600_1200_RESOLUTION))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1099 s->dis_dtc_frame[15] |= DISBIT5;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1100 if ((s->supported_compressions & T30_SUPPORT_T45_COMPRESSION))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1101 s->dis_dtc_frame[16] |= DISBIT4;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1102 if ((s->iaf & T30_IAF_MODE_FLOW_CONTROL))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1103 s->dis_dtc_frame[18] |= DISBIT1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1104 if ((s->iaf & T30_IAF_MODE_CONTINUOUS_FLOW))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1105 s->dis_dtc_frame[18] |= DISBIT3;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1106 s->dis_dtc_len = 19;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1107 t30_decode_dis_dtc_dcs(s, s->dis_dtc_frame, s->dis_dtc_len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1108 return 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1109 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1110 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1111
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1112 static int build_dcs(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1113 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1114 /* Translation between the codes for the minimum scan times the other end needs,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1115 and the codes for what we say will be used. We need 0 minimum. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1116 static const uint8_t translate_min_scan_time[3][8] =
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1117 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1118 /* 20 5 10 20 40 40 10 0ms */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1119 {0, 1, 2, 0, 4, 4, 2, 7}, /* normal */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1120 {0, 1, 2, 2, 4, 0, 1, 7}, /* fine */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1121 {2, 1, 1, 1, 0, 2, 1, 7} /* superfine, when half fine time is selected */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1122 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1123 /* Translation between the codes for the minimum scan time we will use, and milliseconds. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1124 static const int min_scan_times[8] =
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1125 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1126 20, 5, 10, 0, 40, 0, 0, 0
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1127 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1128 uint8_t dis_dtc_frame[T30_MAX_DIS_DTC_DCS_LEN];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1129 uint8_t min_bits_field;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1130 int i;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1131
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1132 if (len < 6)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1133 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1134 span_log(&s->logging, SPAN_LOG_FLOW, "Short DIS/DTC frame\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1135 return -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1136 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1137
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1138 /* Make a local copy of the message, padded to the maximum possible length with zeros. This allows
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1139 us to simply pick out the bits, without worrying about whether they were set from the remote side. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1140 if (len > T30_MAX_DIS_DTC_DCS_LEN)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1141 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1142 memcpy(dis_dtc_frame, msg, T30_MAX_DIS_DTC_DCS_LEN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1143 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1144 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1145 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1146 memcpy(dis_dtc_frame, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1147 if (len < T30_MAX_DIS_DTC_DCS_LEN)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1148 memset(dis_dtc_frame + len, 0, T30_MAX_DIS_DTC_DCS_LEN - len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1149 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1150
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1151 /* Make a DCS frame based on local issues and a received DIS frame. Negotiate the result
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1152 based on what both parties can do. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1153 s->dcs_frame[0] = 0xFF;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1154 s->dcs_frame[1] = 0x13;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1155 s->dcs_frame[2] = (uint8_t) (T30_DCS | s->dis_received);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1156 s->dcs_frame[3] = 0x00;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1157 s->dcs_frame[4] = 0x00;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1158 for (i = 5; i < 18; i++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1159 s->dcs_frame[i] = DISBIT8;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1160 s->dcs_frame[18] = 0x00;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1161 /* Set to required modem rate; standard resolution */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1162 s->dcs_frame[4] |= fallback_sequence[s->current_fallback].dcs_code;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1163
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1164 if ((s->iaf & T30_IAF_MODE_NO_FILL_BITS))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1165 min_bits_field = 7;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1166 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1167 min_bits_field = (dis_dtc_frame[5] >> 4) & 7;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1168 /* Select the compression to use. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1169 switch(s->line_encoding)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1170 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1171 case T4_COMPRESSION_ITU_T6:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1172 s->dcs_frame[6] |= DISBIT7;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1173 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1174 case T4_COMPRESSION_ITU_T4_2D:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1175 s->dcs_frame[4] |= DISBIT8;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1176 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1177 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1178 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1179 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1180 /* If we have a file to send, tell the far end to go into receive mode. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1181 if (s->tx_file[0])
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1182 s->dcs_frame[4] |= DISBIT2;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1183 /* Set the minimum scan time bits */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1184 switch (s->y_resolution)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1185 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1186 case T4_Y_RESOLUTION_SUPERFINE:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1187 if ((dis_dtc_frame[8] & DISBIT1))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1188 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1189 s->dcs_frame[8] |= DISBIT1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1190 if ((dis_dtc_frame[8] & DISBIT6))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1191 min_bits_field = translate_min_scan_time[2][min_bits_field];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1192 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1193 min_bits_field = translate_min_scan_time[1][min_bits_field];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1194 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1195 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1196 /* Fall back */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1197 s->y_resolution = T4_Y_RESOLUTION_FINE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1198 span_log(&s->logging, SPAN_LOG_FLOW, "Remote FAX does not support super-fine resolution.\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1199 /* Fall through */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1200 case T4_Y_RESOLUTION_FINE:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1201 if ((dis_dtc_frame[4] & DISBIT7))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1202 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1203 s->dcs_frame[4] |= DISBIT7;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1204 min_bits_field = translate_min_scan_time[1][min_bits_field];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1205 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1206 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1207 /* Fall back */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1208 s->y_resolution = T4_Y_RESOLUTION_STANDARD;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1209 span_log(&s->logging, SPAN_LOG_FLOW, "Remote FAX does not support fine resolution.\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1210 /* Fall through */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1211 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1212 case T4_Y_RESOLUTION_STANDARD:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1213 min_bits_field = translate_min_scan_time[0][min_bits_field];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1214 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1215 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1216 if (min_scan_times[min_bits_field] == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1217 s->min_row_bits = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1218 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1219 s->min_row_bits = fallback_sequence[s->current_fallback].bit_rate*min_scan_times[min_bits_field]/1000;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1220 s->dcs_frame[5] |= min_bits_field << 4;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1221 span_log(&s->logging, SPAN_LOG_FLOW, "Minimum bits per row will be %d\n", s->min_row_bits);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1222 switch (s->image_width)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1223 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1224 /* Low (R4) res widths are not supported in recent versions of T.30 */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1225 /* Medium (R8) res widths */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1226 case 1728:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1227 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1228 case 2048:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1229 if ((s->dis_dtc_frame[5] & (DISBIT2 | DISBIT1)) < 1)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1230 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1231 span_log(&s->logging, SPAN_LOG_FLOW, "Image width (%d pixels) not acceptable to far end\n", s->image_width);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1232 return -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1233 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1234 s->dcs_frame[5] |= DISBIT1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1235 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1236 case 2432:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1237 if ((s->dis_dtc_frame[5] & (DISBIT2 | DISBIT1)) < 2)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1238 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1239 span_log(&s->logging, SPAN_LOG_FLOW, "Image width (%d pixels) not acceptable to far end\n", s->image_width);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1240 return -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1241 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1242 s->dcs_frame[5] |= DISBIT2;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1243 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1244 /* High (R16) res widths */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1245 case 3456:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1246 if ((dis_dtc_frame[8] & DISBIT3) == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1247 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1248 span_log(&s->logging, SPAN_LOG_FLOW, "Image width (%d pixels) not acceptable to far end\n", s->image_width);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1249 return -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1250 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1251 s->dcs_frame[8] |= DISBIT3;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1252 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1253 case 4096:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1254 if ((dis_dtc_frame[8] & DISBIT3) == 0 || (s->dis_dtc_frame[5] & (DISBIT2 | DISBIT1)) == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1255 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1256 span_log(&s->logging, SPAN_LOG_FLOW, "Image width (%d pixels) not acceptable to far end\n", s->image_width);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1257 return -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1258 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1259 s->dcs_frame[5] |= DISBIT1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1260 s->dcs_frame[8] |= DISBIT3;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1261 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1262 case 4864:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1263 if ((dis_dtc_frame[8] & DISBIT3) == 0 || (s->dis_dtc_frame[5] & (DISBIT2 | DISBIT1)) != DISBIT2)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1264 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1265 span_log(&s->logging, SPAN_LOG_FLOW, "Image width (%d pixels) not acceptable to far end\n", s->image_width);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1266 return -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1267 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1268 s->dcs_frame[5] |= DISBIT2;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1269 s->dcs_frame[8] |= DISBIT3;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1270 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1271 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1272 /* The image is of an unrecognised width. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1273 span_log(&s->logging, SPAN_LOG_FLOW, "Image width (%d pixels) not a valid FAX image width\n", s->image_width);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1274 return -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1275 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1276 if (s->error_correcting_mode)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1277 s->dcs_frame[6] |= DISBIT3;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1278 s->dcs_len = 19;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1279 t30_decode_dis_dtc_dcs(s, s->dcs_frame, s->dcs_len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1280 return 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1281 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1282 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1283
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1284 static int check_rx_dis_dtc(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1285 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1286 uint8_t dis_dtc_frame[T30_MAX_DIS_DTC_DCS_LEN];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1287
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1288 if (len < 6)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1289 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1290 span_log(&s->logging, SPAN_LOG_FLOW, "Short DIS/DTC frame\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1291 return -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1292 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1293
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1294 /* Make a local copy of the message, padded to the maximum possible length with zeros. This allows
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1295 us to simply pick out the bits, without worrying about whether they were set from the remote side. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1296 if (len > T30_MAX_DIS_DTC_DCS_LEN)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1297 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1298 memcpy(dis_dtc_frame, msg, T30_MAX_DIS_DTC_DCS_LEN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1299 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1300 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1301 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1302 memcpy(dis_dtc_frame, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1303 if (len < T30_MAX_DIS_DTC_DCS_LEN)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1304 memset(dis_dtc_frame + len, 0, T30_MAX_DIS_DTC_DCS_LEN - len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1305 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1306 s->error_correcting_mode = (s->ecm_allowed && (dis_dtc_frame[6] & DISBIT3) != 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1307 /* 256 octets per ECM frame */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1308 s->octets_per_ecm_frame = 256;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1309 /* Select the compression to use. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1310 if ((s->supported_compressions & T30_SUPPORT_T6_COMPRESSION) && (dis_dtc_frame[6] & DISBIT7))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1311 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1312 s->line_encoding = T4_COMPRESSION_ITU_T6;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1313 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1314 else if ((s->supported_compressions & T30_SUPPORT_T4_2D_COMPRESSION) && (dis_dtc_frame[4] & DISBIT8))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1315 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1316 s->line_encoding = T4_COMPRESSION_ITU_T4_2D;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1317 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1318 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1319 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1320 s->line_encoding = T4_COMPRESSION_ITU_T4_1D;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1321 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1322 span_log(&s->logging, SPAN_LOG_FLOW, "Selected compression %d\n", s->line_encoding);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1323 switch (dis_dtc_frame[4] & (DISBIT6 | DISBIT5 | DISBIT4 | DISBIT3))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1324 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1325 case 0:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1326 s->current_fallback = T30_V27TER_FALLBACK_START + 1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1327 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1328 case DISBIT4:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1329 s->current_fallback = T30_V27TER_FALLBACK_START;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1330 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1331 case DISBIT3:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1332 /* TODO: this doesn't allow for skipping the V.27ter modes */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1333 s->current_fallback = T30_V29_FALLBACK_START;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1334 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1335 case (DISBIT4 | DISBIT3):
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1336 s->current_fallback = T30_V29_FALLBACK_START;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1337 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1338 case (DISBIT6 | DISBIT4 | DISBIT3):
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1339 if ((s->supported_modems & T30_SUPPORT_V17))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1340 s->current_fallback = T30_V17_FALLBACK_START;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1341 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1342 s->current_fallback = T30_V29_FALLBACK_START;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1343 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1344 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1345 span_log(&s->logging, SPAN_LOG_FLOW, "Remote does not support a compatible modem\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1346 /* We cannot talk to this machine! */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1347 return -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1348 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1349 return 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1350 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1351 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1352
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1353 static int check_rx_dcs(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1354 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1355 static const int widths[3][4] =
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1356 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1357 { 864, 1024, 1216, -1}, /* R4 resolution - no longer used in recent versions of T.30 */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1358 {1728, 2048, 2432, -1}, /* R8 resolution */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1359 {3456, 4096, 4864, -1} /* R16 resolution */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1360 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1361 uint8_t dcs_frame[T30_MAX_DIS_DTC_DCS_LEN];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1362 int speed;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1363 int i;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1364
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1365 t30_decode_dis_dtc_dcs(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1366
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1367 /* Check DCS frame from remote */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1368 if (len < 6)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1369 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1370 span_log(&s->logging, SPAN_LOG_FLOW, "Short DCS frame\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1371 return -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1372 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1373
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1374 /* Make a local copy of the message, padded to the maximum possible length with zeros. This allows
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1375 us to simply pick out the bits, without worrying about whether they were set from the remote side. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1376 if (len > T30_MAX_DIS_DTC_DCS_LEN)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1377 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1378 memcpy(dcs_frame, msg, T30_MAX_DIS_DTC_DCS_LEN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1379 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1380 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1381 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1382 memcpy(dcs_frame, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1383 if (len < T30_MAX_DIS_DTC_DCS_LEN)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1384 memset(dcs_frame + len, 0, T30_MAX_DIS_DTC_DCS_LEN - len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1385 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1386
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1387 s->octets_per_ecm_frame = (dcs_frame[6] & DISBIT4) ? 256 : 64;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1388 if ((dcs_frame[8] & DISBIT1))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1389 s->y_resolution = T4_Y_RESOLUTION_SUPERFINE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1390 else if (dcs_frame[4] & DISBIT7)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1391 s->y_resolution = T4_Y_RESOLUTION_FINE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1392 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1393 s->y_resolution = T4_Y_RESOLUTION_STANDARD;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1394 s->image_width = widths[(dcs_frame[8] & DISBIT3) ? 2 : 1][dcs_frame[5] & (DISBIT2 | DISBIT1)];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1395
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1396 /* Check which compression we will use. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1397 if ((dcs_frame[6] & DISBIT7))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1398 s->line_encoding = T4_COMPRESSION_ITU_T6;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1399 else if ((dcs_frame[4] & DISBIT8))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1400 s->line_encoding = T4_COMPRESSION_ITU_T4_2D;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1401 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1402 s->line_encoding = T4_COMPRESSION_ITU_T4_1D;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1403 span_log(&s->logging, SPAN_LOG_FLOW, "Selected compression %d\n", s->line_encoding);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1404 if (!(dcs_frame[4] & DISBIT2))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1405 span_log(&s->logging, SPAN_LOG_FLOW, "Remote cannot receive\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1406
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1407 speed = dcs_frame[4] & (DISBIT6 | DISBIT5 | DISBIT4 | DISBIT3);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1408 for (i = 0; fallback_sequence[i].bit_rate; i++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1409 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1410 if (fallback_sequence[i].dcs_code == speed)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1411 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1412 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1413 if (fallback_sequence[i].bit_rate == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1414 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1415 span_log(&s->logging, SPAN_LOG_FLOW, "Remote asked for a modem standard we do not support\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1416 return -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1417 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1418 s->current_fallback = i;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1419 s->error_correcting_mode = ((dcs_frame[6] & DISBIT3) != 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1420 return 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1421 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1422 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1423
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1424 static void send_dcn(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1425 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1426 queue_phase(s, T30_PHASE_D_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1427 set_state(s, T30_STATE_C);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1428 send_simple_frame(s, T30_DCN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1429 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1430 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1431
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1432 static void send_dis_or_dtc_sequence(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1433 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1434 if (send_nsf_frame(s))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1435 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1436 s->step = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1437 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1438 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1439 if (send_ident_frame(s, T30_CSI))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1440 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1441 s->step = 1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1442 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1443 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1444 set_dis_or_dtc(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1445 send_frame(s, s->dis_dtc_frame, s->dis_dtc_len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1446 s->step = 2;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1447 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1448 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1449
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1450 static void send_dcs_sequence(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1451 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1452 if (send_pw_frame(s))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1453 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1454 s->step = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1455 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1456 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1457 if (send_sub_frame(s))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1458 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1459 s->step = 1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1460 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1461 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1462 if (send_ident_frame(s, T30_TSI))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1463 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1464 s->step = 2;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1465 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1466 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1467 send_frame(s, s->dcs_frame, s->dcs_len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1468 s->step = 3;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1469 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1470 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1471
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1472 static void disconnect(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1473 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1474 span_log(&s->logging, SPAN_LOG_FLOW, "Disconnecting\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1475 /* Make sure any FAX in progress is tidied up. If the tidying up has
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1476 already happened, repeating it here is harmless. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1477 t4_rx_end(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1478 t4_tx_end(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1479 s->timer_t0_t1 = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1480 s->timer_t2_t4 = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1481 s->timer_t3 = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1482 s->timer_t5 = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1483 set_phase(s, T30_PHASE_E);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1484 set_state(s, T30_STATE_B);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1485 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1486 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1487
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1488 static int start_sending_document(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1489 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1490 if (s->tx_file[0] == '\0')
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1491 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1492 /* There is nothing to send */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1493 span_log(&s->logging, SPAN_LOG_FLOW, "No document to send\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1494 return FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1495 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1496 span_log(&s->logging, SPAN_LOG_FLOW, "Start sending document\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1497 if (t4_tx_init(&(s->t4), s->tx_file, s->tx_start_page, s->tx_stop_page))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1498 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1499 span_log(&s->logging, SPAN_LOG_WARNING, "Cannot open source TIFF file '%s'\n", s->tx_file);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1500 s->current_status = T30_ERR_FILEERROR;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1501 return FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1502 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1503 t4_tx_set_tx_encoding(&(s->t4), s->line_encoding);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1504 t4_tx_set_min_row_bits(&(s->t4), s->min_row_bits);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1505 t4_tx_set_local_ident(&(s->t4), s->local_ident);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1506 t4_tx_set_header_info(&(s->t4), s->header_info);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1507
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1508 s->y_resolution = t4_tx_get_y_resolution(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1509 switch (s->y_resolution)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1510 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1511 case T4_Y_RESOLUTION_STANDARD:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1512 s->dcs_frame[4] &= ~DISBIT7;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1513 s->dcs_frame[8] &= ~DISBIT1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1514 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1515 case T4_Y_RESOLUTION_FINE:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1516 s->dcs_frame[4] |= DISBIT7;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1517 s->dcs_frame[8] &= ~DISBIT1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1518 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1519 case T4_Y_RESOLUTION_SUPERFINE:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1520 s->dcs_frame[4] &= ~DISBIT7;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1521 s->dcs_frame[8] |= DISBIT1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1522 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1523 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1524 s->image_width = t4_tx_get_image_width(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1525 t4_tx_start_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1526 s->ecm_page = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1527 s->ecm_block = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1528 if (s->error_correcting_mode)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1529 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1530 if (get_partial_ecm_page(s) == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1531 span_log(&s->logging, SPAN_LOG_WARNING, "No image data to send\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1532 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1533 /* Schedule training after the messages */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1534 set_state(s, T30_STATE_D);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1535 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1536 send_dcs_sequence(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1537 return TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1538 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1539 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1540
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1541 static int restart_sending_document(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1542 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1543 /* Schedule training after the messages */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1544 t4_tx_restart_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1545 set_state(s, T30_STATE_D);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1546 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1547 s->ecm_block = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1548 send_dis_or_dtc_sequence(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1549 return TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1550 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1551 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1552
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1553 static int start_receiving_document(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1554 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1555 if (s->rx_file[0] == '\0')
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1556 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1557 /* There is nothing to receive to */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1558 span_log(&s->logging, SPAN_LOG_FLOW, "No document to receive\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1559 return FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1560 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1561 span_log(&s->logging, SPAN_LOG_FLOW, "Start receiving document\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1562 queue_phase(s, T30_PHASE_B_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1563 set_state(s, T30_STATE_R);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1564 s->dis_received = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1565 s->ecm_page = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1566 s->ecm_block = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1567 send_dis_or_dtc_sequence(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1568 return TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1569 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1570 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1571
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1572 static void unexpected_frame(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1573 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1574 span_log(&s->logging, SPAN_LOG_FLOW, "Unexpected %s received in state %d\n", t30_frametype(msg[2]), s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1575 if (s->state == T30_STATE_F_DOC)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1576 s->current_status = T30_ERR_INVALCMDRX;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1577 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1578 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1579
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1580 static void unexpected_final_frame(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1581 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1582 span_log(&s->logging, SPAN_LOG_FLOW, "Unexpected %s received in state %d\n", t30_frametype(msg[2]), s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1583 s->current_status = T30_ERR_UNEXPECTED;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1584 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1585 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1586 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1587
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1588 static void unexpected_frame_length(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1589 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1590 span_log(&s->logging, SPAN_LOG_FLOW, "Unexpected %s frame length - %d\n", t30_frametype(msg[0]), len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1591 s->current_status = T30_ERR_UNEXPECTED;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1592 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1593 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1594 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1595
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1596 static void process_rx_dis_or_dtc(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1597 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1598 /* Digital identification signal or digital transmit command */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1599 s->dis_received = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1600 check_rx_dis_dtc(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1601 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1602 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1603 case T30_STATE_D_POST_TCF:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1604 /* It appears they didn't see what we sent - retry the TCF */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1605 if (++s->retries > MAX_MESSAGE_TRIES)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1606 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1607 s->current_status = T30_ERR_RETRYDCN;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1608 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1609 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1610 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1611 /* TODO: We should fall through at this point. However, if we do that
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1612 we need to allow for a send or receive already being in progress from
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1613 a previous try */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1614 queue_phase(s, T30_PHASE_B_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1615 /* Schedule training after the messages */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1616 set_state(s, T30_STATE_D);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1617 send_dcs_sequence(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1618 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1619 case T30_STATE_R:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1620 case T30_STATE_T:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1621 case T30_STATE_F_DOC:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1622 t30_decode_dis_dtc_dcs(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1623 if (s->phase_b_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1624 s->phase_b_handler(s, s->phase_d_user_data, msg[2]);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1625 queue_phase(s, T30_PHASE_B_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1626 /* Try to send something */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1627 if (s->tx_file[0])
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1628 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1629 span_log(&s->logging, SPAN_LOG_FLOW, "Trying to send file '%s'\n", s->tx_file);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1630 if ((msg[4] & DISBIT2))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1631 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1632 if (!start_sending_document(s))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1633 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1634 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1635 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1636 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1637 if (build_dcs(s, msg, len))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1638 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1639 span_log(&s->logging, SPAN_LOG_FLOW, "The remote machine is incompatible\n", s->tx_file);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1640 s->current_status = T30_ERR_INCOMPATIBLE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1641 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1642 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1643 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1644 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1645 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1646 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1647 span_log(&s->logging, SPAN_LOG_FLOW, "%s far end cannot receive\n", t30_frametype(msg[2]));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1648 s->current_status = T30_ERR_NOTRXCAPABLE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1649 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1650 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1651 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1652 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1653 span_log(&s->logging, SPAN_LOG_FLOW, "%s nothing to send\n", t30_frametype(msg[2]));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1654 /* ... then try to receive something */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1655 if (s->rx_file[0])
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1656 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1657 span_log(&s->logging, SPAN_LOG_FLOW, "Trying to receive file '%s'\n", s->rx_file);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1658 if ((msg[4] & DISBIT1))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1659 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1660 if (!start_receiving_document(s))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1661 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1662 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1663 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1664 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1665 if (set_dis_or_dtc(s))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1666 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1667 s->current_status = T30_ERR_INCOMPATIBLE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1668 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1669 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1670 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1671 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1672 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1673 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1674 span_log(&s->logging, SPAN_LOG_FLOW, "%s far end cannot transmit\n", t30_frametype(msg[2]));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1675 s->current_status = T30_ERR_NOTTXCAPABLE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1676 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1677 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1678 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1679 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1680 span_log(&s->logging, SPAN_LOG_FLOW, "%s nothing to receive\n", t30_frametype(msg[2]));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1681 /* There is nothing to do, or nothing we are able to do. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1682 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1683 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1684 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1685 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1686 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1687 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1688 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1689 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1690
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1691 static void process_rx_dcs(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1692 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1693 /* Digital command signal */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1694 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1695 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1696 case T30_STATE_R:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1697 case T30_STATE_F_DOC:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1698 /* (TSI) DCS */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1699 /* (PWD) (SUB) (TSI) DCS */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1700 check_rx_dcs(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1701 if (s->phase_b_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1702 s->phase_b_handler(s, s->phase_d_user_data, T30_DCS);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1703 /* Start document reception */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1704 span_log(&s->logging,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1705 SPAN_LOG_FLOW,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1706 "Get document at %dbps, modem %d\n",
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1707 fallback_sequence[s->current_fallback].bit_rate,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1708 fallback_sequence[s->current_fallback].modem_type);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1709 if (s->rx_file[0] == '\0')
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1710 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1711 span_log(&s->logging, SPAN_LOG_FLOW, "No document to receive\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1712 s->current_status = T30_ERR_FILEERROR;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1713 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1714 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1715 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1716 if (!s->in_message && t4_rx_init(&(s->t4), s->rx_file, T4_COMPRESSION_ITU_T4_2D))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1717 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1718 span_log(&s->logging, SPAN_LOG_WARNING, "Cannot open target TIFF file '%s'\n", s->rx_file);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1719 s->current_status = T30_ERR_FILEERROR;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1720 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1721 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1722 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1723 if (!(s->iaf & T30_IAF_MODE_NO_TCF))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1724 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1725 set_state(s, T30_STATE_F_TCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1726 set_phase(s, T30_PHASE_C_NON_ECM_RX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1727 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1728 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1729 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1730 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1731 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1732 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1733 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1734 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1735
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1736 static void process_rx_cfr(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1737 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1738 /* Confirmation to receive */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1739 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1740 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1741 case T30_STATE_D_POST_TCF:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1742 /* Trainability test succeeded. Send the document. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1743 span_log(&s->logging, SPAN_LOG_FLOW, "Trainability test succeeded\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1744 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1745 s->short_train = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1746 if (s->error_correcting_mode)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1747 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1748 set_state(s, T30_STATE_IV);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1749 queue_phase(s, T30_PHASE_C_ECM_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1750 s->ecm_current_frame = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1751 send_next_ecm_frame(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1752 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1753 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1754 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1755 set_state(s, T30_STATE_I);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1756 queue_phase(s, T30_PHASE_C_NON_ECM_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1757 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1758 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1759 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1760 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1761 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1762 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1763 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1764 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1765
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1766 static void process_rx_ftt(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1767 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1768 /* Failure to train */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1769 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1770 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1771 case T30_STATE_D_POST_TCF:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1772 /* Trainability test failed. Try again. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1773 span_log(&s->logging, SPAN_LOG_FLOW, "Trainability test failed\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1774 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1775 s->short_train = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1776 if (fallback_sequence[++s->current_fallback].bit_rate == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1777 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1778 /* We have fallen back as far as we can go. Give up. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1779 s->current_fallback = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1780 s->current_status = T30_ERR_CANNOTTRAIN;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1781 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1782 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1783 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1784 /* Schedule training after the messages */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1785 set_state(s, T30_STATE_D);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1786 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1787 send_dcs_sequence(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1788 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1789 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1790 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1791 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1792 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1793 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1794 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1795
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1796 static void process_rx_eom(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1797 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1798 /* End of message */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1799 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1800 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1801 case T30_STATE_F_POST_DOC_NON_ECM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1802 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1803 s->phase_d_handler(s, s->phase_d_user_data, T30_EOM);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1804 s->next_rx_step = T30_EOM;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1805 /* Return to phase B */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1806 queue_phase(s, T30_PHASE_B_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1807 switch (copy_quality(s))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1808 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1809 case T30_COPY_QUALITY_GOOD:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1810 t4_rx_end_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1811 rx_start_page(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1812 set_state(s, T30_STATE_III_Q_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1813 send_simple_frame(s, T30_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1814 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1815 case T30_COPY_QUALITY_POOR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1816 t4_rx_end_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1817 rx_start_page(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1818 set_state(s, T30_STATE_III_Q_RTP);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1819 send_simple_frame(s, T30_RTP);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1820 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1821 case T30_COPY_QUALITY_BAD:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1822 rx_start_page(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1823 set_state(s, T30_STATE_III_Q_RTN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1824 send_simple_frame(s, T30_RTN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1825 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1826 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1827 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1828 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1829 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1830 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1831 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1832 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1833 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1834
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1835 static void process_rx_mps(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1836 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1837 /* Multi-page signal */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1838 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1839 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1840 case T30_STATE_F_POST_DOC_NON_ECM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1841 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1842 s->phase_d_handler(s, s->phase_d_user_data, T30_MPS);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1843 s->next_rx_step = T30_MPS;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1844 /* Return to phase C */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1845 queue_phase(s, T30_PHASE_D_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1846 switch (copy_quality(s))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1847 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1848 case T30_COPY_QUALITY_GOOD:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1849 t4_rx_end_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1850 rx_start_page(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1851 set_state(s, T30_STATE_III_Q_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1852 send_simple_frame(s, T30_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1853 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1854 case T30_COPY_QUALITY_POOR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1855 t4_rx_end_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1856 rx_start_page(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1857 set_state(s, T30_STATE_III_Q_RTP);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1858 send_simple_frame(s, T30_RTP);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1859 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1860 case T30_COPY_QUALITY_BAD:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1861 rx_start_page(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1862 set_state(s, T30_STATE_III_Q_RTN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1863 send_simple_frame(s, T30_RTN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1864 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1865 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1866 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1867 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1868 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1869 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1870 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1871 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1872 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1873
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1874 static void process_rx_eop(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1875 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1876 /* End of procedure */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1877 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1878 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1879 case T30_STATE_F_POST_DOC_NON_ECM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1880 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1881 s->phase_d_handler(s, s->phase_d_user_data, T30_EOP);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1882 s->next_rx_step = T30_EOP;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1883 queue_phase(s, T30_PHASE_D_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1884 switch (copy_quality(s))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1885 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1886 case T30_COPY_QUALITY_GOOD:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1887 t4_rx_end_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1888 t4_rx_end(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1889 s->in_message = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1890 set_state(s, T30_STATE_III_Q_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1891 send_simple_frame(s, T30_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1892 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1893 case T30_COPY_QUALITY_POOR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1894 t4_rx_end_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1895 t4_rx_end(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1896 s->in_message = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1897 set_state(s, T30_STATE_III_Q_RTP);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1898 send_simple_frame(s, T30_RTP);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1899 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1900 case T30_COPY_QUALITY_BAD:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1901 set_state(s, T30_STATE_III_Q_RTN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1902 send_simple_frame(s, T30_RTN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1903 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1904 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1905 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1906 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1907 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1908 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1909 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1910 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1911 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1912
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1913 static void process_rx_pri_eom(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1914 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1915 /* Procedure interrupt - end of procedure */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1916 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1917 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1918 case T30_STATE_F_POST_DOC_NON_ECM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1919 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1920 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1921 s->phase_d_handler(s, s->phase_d_user_data, T30_PRI_EOM);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1922 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1923 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1924 s->next_rx_step = T30_PRI_EOM;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1925 switch (copy_quality(s))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1926 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1927 case T30_COPY_QUALITY_GOOD:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1928 t4_rx_end_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1929 t4_rx_end(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1930 s->in_message = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1931 set_state(s, T30_STATE_III_Q_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1932 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1933 case T30_COPY_QUALITY_POOR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1934 t4_rx_end_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1935 t4_rx_end(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1936 s->in_message = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1937 set_state(s, T30_STATE_III_Q_RTP);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1938 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1939 case T30_COPY_QUALITY_BAD:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1940 set_state(s, T30_STATE_III_Q_RTN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1941 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1942 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1943 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1944 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1945 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1946 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1947 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1948 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1949 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1950
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1951 static void process_rx_pri_mps(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1952 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1953 /* Procedure interrupt - multipage signal */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1954 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1955 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1956 case T30_STATE_F_POST_DOC_NON_ECM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1957 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1958 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1959 s->phase_d_handler(s, s->phase_d_user_data, T30_PRI_MPS);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1960 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1961 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1962 s->next_rx_step = T30_PRI_MPS;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1963 switch (copy_quality(s))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1964 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1965 case T30_COPY_QUALITY_GOOD:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1966 t4_rx_end_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1967 t4_rx_end(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1968 s->in_message = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1969 set_state(s, T30_STATE_III_Q_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1970 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1971 case T30_COPY_QUALITY_POOR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1972 t4_rx_end_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1973 t4_rx_end(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1974 s->in_message = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1975 set_state(s, T30_STATE_III_Q_RTP);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1976 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1977 case T30_COPY_QUALITY_BAD:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1978 set_state(s, T30_STATE_III_Q_RTN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1979 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1980 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1981 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1982 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1983 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1984 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1985 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1986 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1987 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1988
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1989 static void process_rx_pri_eop(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1990 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1991 /* Procedure interrupt - end of procedure */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1992 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1993 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1994 case T30_STATE_F_POST_DOC_NON_ECM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1995 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1996 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1997 s->phase_d_handler(s, s->phase_d_user_data, T30_PRI_EOP);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1998 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
1999 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2000 s->next_rx_step = T30_PRI_EOP;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2001 switch (copy_quality(s))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2002 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2003 case T30_COPY_QUALITY_GOOD:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2004 t4_rx_end_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2005 t4_rx_end(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2006 s->in_message = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2007 set_state(s, T30_STATE_III_Q_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2008 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2009 case T30_COPY_QUALITY_POOR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2010 t4_rx_end_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2011 t4_rx_end(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2012 s->in_message = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2013 set_state(s, T30_STATE_III_Q_RTP);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2014 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2015 case T30_COPY_QUALITY_BAD:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2016 set_state(s, T30_STATE_III_Q_RTN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2017 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2018 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2019 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2020 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2021 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2022 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2023 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2024 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2025 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2026
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2027 static void process_rx_nss(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2028 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2029 /* Non-standard facilities set-up */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2030 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2031 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2032 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2033 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2034 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2035 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2036 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2037 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2038
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2039 static void process_rx_ctc(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2040 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2041 /* Continue to correct */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2042 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2043 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2044 case T30_STATE_F_DOC:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2045 case T30_STATE_F_POST_DOC_ECM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2046 send_simple_frame(s, T30_CTR);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2047 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2048 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2049 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2050 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2051 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2052 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2053 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2054
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2055 static void process_rx_ctr(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2056 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2057 /* Response for continue to correct */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2058 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2059 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2060 case T30_STATE_IV_CTC:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2061 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2062 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2063 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2064 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2065 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2066 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2067 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2068
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2069 static void process_rx_err(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2070 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2071 /* Response for end of retransmission */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2072 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2073 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2074 case T30_STATE_IV_EOR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2075 case T30_STATE_IV_EOR_RNR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2076 /* TODO: Continue with the next message if MPS or EOM? */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2077 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2078 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2079 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2080 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2081 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2082 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2083 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2084 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2085
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2086 static void process_rx_ppr(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2087 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2088 int i;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2089 int j;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2090 int frame_no;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2091 int mask;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2092 uint8_t frame[100 + 3];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2093
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2094 /* Partial page request */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2095 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2096 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2097 case T30_STATE_IV_PPS_NULL:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2098 case T30_STATE_IV_PPS_Q:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2099 if (++s->ppr_count >= 4)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2100 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2101 /* Continue to correct? */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2102 /* TODO: Decide if we should continue */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2103 if (1)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2104 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2105 set_state(s, T30_STATE_IV_CTC);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2106 send_simple_frame(s, T30_CTC);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2107 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2108 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2109 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2110 set_state(s, T30_STATE_IV_EOR);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2111 frame[0] = 0xFF;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2112 frame[1] = 0x13;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2113 frame[2] = T30_EOR;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2114 frame[3] = (s->ecm_at_page_end) ? ((uint8_t) (s->next_tx_step | s->dis_received)) : T30_NULL;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2115 span_log(&s->logging, SPAN_LOG_FLOW, "Sending EOR + %s\n", t30_frametype(frame[3]));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2116 send_frame(s, frame, 4);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2117 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2118 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2119 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2120 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2121 /* Check which frames are OK, and mark them as OK. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2122 for (i = 0; i < 32; i++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2123 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2124 if (msg[i + 3] == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2125 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2126 s->ecm_frame_map[i + 3] = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2127 for (j = 0; j < 8; j++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2128 s->ecm_len[(i << 3) + j] = -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2129 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2130 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2131 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2132 mask = 1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2133 for (j = 0; j < 8; j++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2134 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2135 frame_no = (i << 3) + j;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2136 /* Tick off the frames they are not complaining about as OK */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2137 if ((msg[i + 3] & mask) == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2138 s->ecm_len[frame_no] = -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2139 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2140 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2141 if (frame_no < s->ecm_frames)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2142 span_log(&s->logging, SPAN_LOG_FLOW, "Frame %d to be resent\n", frame_no);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2143 #if 0
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2144 /* Diagnostic: See if the other end is complaining about something we didn't even send this time. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2145 if (s->ecm_len[frame_no] < 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2146 span_log(&s->logging, SPAN_LOG_FLOW, "PPR contains complaint about frame %d, which was not send\n", frame_no);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2147 #endif
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2148 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2149 mask <<= 1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2150 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2151 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2152 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2153 /* Initiate resending of the remainder of the frames. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2154 set_state(s, T30_STATE_IV);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2155 queue_phase(s, T30_PHASE_C_ECM_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2156 s->ecm_current_frame = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2157 send_next_ecm_frame(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2158 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2159 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2160 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2161 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2162 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2163 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2164 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2165 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2166
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2167 static void process_rx_rr(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2168 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2169 /* Receiver ready */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2170 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2171 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2172 case T30_STATE_F_POST_DOC_NON_ECM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2173 /* TODO: */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2174 s->timer_t5 = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2175 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2176 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2177 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2178 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2179 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2180 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2181 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2182
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2183 static void process_rx_rnr(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2184 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2185 /* Receive not ready */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2186 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2187 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2188 case T30_STATE_IV_PPS_NULL:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2189 case T30_STATE_IV_PPS_Q:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2190 set_state(s, T30_STATE_IV_PPS_RNR);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2191 send_simple_frame(s, T30_RR);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2192 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2193 case T30_STATE_IV_PPS_RNR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2194 send_simple_frame(s, T30_RR);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2195 /* TODO: */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2196 if (s->timer_t5 == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2197 s->timer_t5 = ms_to_samples(DEFAULT_TIMER_T5);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2198 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2199 case T30_STATE_IV_EOR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2200 set_state(s, T30_STATE_IV_EOR_RNR);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2201 send_simple_frame(s, T30_RR);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2202 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2203 case T30_STATE_IV_EOR_RNR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2204 send_simple_frame(s, T30_RR);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2205 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2206 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2207 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2208 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2209 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2210 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2211 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2212
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2213 static void process_rx_eos(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2214 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2215 /* End of selection */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2216 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2217 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2218 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2219 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2220 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2221 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2222 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2223 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2224
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2225 static void process_rx_tr(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2226 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2227 /* Transmit ready */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2228 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2229 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2230 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2231 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2232 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2233 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2234 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2235 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2236
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2237 static void process_rx_fcd(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2238 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2239 int frame_no;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2240 int i;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2241
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2242 /* Facsimile coded data */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2243 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2244 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2245 case T30_STATE_F_DOC:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2246 if (len <= 4 + 256)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2247 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2248 frame_no = msg[3];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2249 /* Just store the actual image data, and record its length */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2250 span_log(&s->logging, SPAN_LOG_FLOW, "Storing image frame %d, length %d\n", frame_no, len - 4);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2251 for (i = 0; i < len - 4; i++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2252 s->ecm_data[frame_no][i] = msg[i + 4];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2253 s->ecm_len[frame_no] = (int16_t) (len - 4);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2254 span_log(&s->logging, SPAN_LOG_FLOW, "Storing ECM frame %d\n", frame_no);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2255 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2256 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2257 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2258 unexpected_frame_length(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2259 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2260 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2261 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2262 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2263 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2264 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2265 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2266 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2267
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2268 static void process_rx_rcp(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2269 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2270 /* Return to control for partial page */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2271 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2272 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2273 case T30_STATE_F_DOC:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2274 set_state(s, T30_STATE_F_POST_DOC_ECM);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2275 queue_phase(s, T30_PHASE_D_RX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2276 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2277 case T30_STATE_F_POST_DOC_ECM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2278 /* Ignore extra RCP frames. The source will usually send several to maximum the chance of
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2279 one getting through OK. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2280 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2281 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2282 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2283 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2284 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2285 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2286 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2287
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2288 static void process_rx_fnv(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2289 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2290 logging_state_t *log;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2291 const char *x;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2292
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2293 /* Field not valid */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2294 /* TODO: analyse the message, as per 5.3.6.2.13 */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2295 if (!span_log_test(&s->logging, SPAN_LOG_FLOW))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2296 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2297 log = &s->logging;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2298
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2299 if ((msg[3] & 0x01))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2300 span_log(log, SPAN_LOG_FLOW, " Incorrect password (PWD).\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2301 if ((msg[3] & 0x02))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2302 span_log(log, SPAN_LOG_FLOW, " Selective polling reference (SEP) not known.\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2303 if ((msg[3] & 0x04))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2304 span_log(log, SPAN_LOG_FLOW, " Subaddress (SUB) not known.\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2305 if ((msg[3] & 0x08))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2306 span_log(log, SPAN_LOG_FLOW, " Sender identity (SID) not known.\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2307 if ((msg[3] & 0x10))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2308 span_log(log, SPAN_LOG_FLOW, " Secure fax error.\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2309 if ((msg[3] & 0x20))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2310 span_log(log, SPAN_LOG_FLOW, " Transmitting subscriber identity (TSI) not accepted.\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2311 if ((msg[3] & 0x40))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2312 span_log(log, SPAN_LOG_FLOW, " Polled subaddress (PSA) not known.\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2313 if (len > 4 && (msg[3] & DISBIT8))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2314 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2315 if ((msg[4] & 0x01))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2316 span_log(log, SPAN_LOG_FLOW, " BFT negotiations request not accepted.\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2317 if ((msg[4] & 0x02))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2318 span_log(log, SPAN_LOG_FLOW, " Internet routing address (IRA) not known.\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2319 if ((msg[4] & 0x04))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2320 span_log(log, SPAN_LOG_FLOW, " Internet selective polling address (ISP) not known.\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2321 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2322 if (len > 5)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2323 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2324 span_log(log, SPAN_LOG_FLOW, " FNV sequence number %d.\n", msg[5]);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2325 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2326 if (len > 6)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2327 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2328 switch (msg[6])
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2329 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2330 case 0x83:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2331 x = "Incorrect password (PWD)";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2332 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2333 case 0x85:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2334 x = "Selective polling reference (SEP) not known";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2335 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2336 case 0x43:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2337 case 0xC3:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2338 x = "Subaddress (SUB) not known";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2339 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2340 case 0x45:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2341 case 0xC5:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2342 x = "Sender identity (SID) not known";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2343 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2344 case 0x10:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2345 x = "Secure fax error";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2346 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2347 case 0x42:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2348 case 0xC2:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2349 x = "Transmitting subscriber identity (TSI) not accepted";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2350 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2351 case 0x86:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2352 x = "Polled subaddress (PSA) not known";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2353 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2354 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2355 x = "???";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2356 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2357 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2358 span_log(log, SPAN_LOG_FLOW, " FNV diagnostic info type %s.\n", x);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2359 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2360 if (len > 7)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2361 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2362 span_log(log, SPAN_LOG_FLOW, " FNV length %d.\n", msg[7]);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2363 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2364 /* We've decoded it, but we don't yet know how to deal with it, so treat it as unexpected */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2365 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2366 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2367 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2368
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2369 static void process_rx_pps(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2370 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2371 int fcf2;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2372 int page;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2373 int block;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2374 int i;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2375 int j;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2376 int frame_no;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2377 int first_bad_frame;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2378
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2379 /* Partial page signal */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2380 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2381 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2382 case T30_STATE_F_DOC:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2383 case T30_STATE_F_POST_DOC_ECM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2384 if (len >= 7)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2385 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2386 fcf2 = msg[3] & 0xFE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2387 page = msg[4];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2388 block = msg[5];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2389 s->ecm_frames = msg[6] + 1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2390 span_log(&s->logging, SPAN_LOG_FLOW, "Received PPS + %s\n", t30_frametype(msg[3]));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2391 /* Build a bit map of which frames we now have stored OK */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2392 frame_no = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2393 first_bad_frame = 256;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2394 for (i = 3; i < 3 + 32; i++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2395 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2396 s->ecm_frame_map[i] = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2397 for (j = 0; j < 8; j++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2398 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2399 if (s->ecm_len[frame_no] < 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2400 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2401 s->ecm_frame_map[i] |= (1 << j);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2402 if (frame_no < first_bad_frame)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2403 first_bad_frame = frame_no;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2404 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2405 frame_no++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2406 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2407 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2408 /* Now, are there really bad frames, or does our scan represent things being OK? */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2409 queue_phase(s, T30_PHASE_D_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2410 if (first_bad_frame >= s->ecm_frames)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2411 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2412 /* Everything was OK. We can accept the data and move on. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2413 switch (fcf2)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2414 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2415 case T30_NULL:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2416 /* We can confirm this partial page. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2417 t30_ecm_commit_partial_page(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2418 set_state(s, T30_STATE_F_POST_RCP_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2419 send_simple_frame(s, T30_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2420 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2421 case T30_EOP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2422 case T30_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2423 case T30_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2424 case T30_PRI_EOP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2425 case T30_PRI_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2426 case T30_PRI_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2427 /* We can confirm the whole page. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2428 s->next_rx_step = fcf2;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2429 t30_ecm_commit_partial_page(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2430 t4_rx_end_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2431 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2432 s->phase_d_handler(s, s->phase_d_user_data, fcf2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2433 rx_start_page(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2434 set_state(s, T30_STATE_F_POST_RCP_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2435 send_simple_frame(s, T30_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2436 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2437 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2438 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2439 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2440 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2441 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2442 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2443 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2444 /* We need to send the PPR frame we have created, to try to fill in the missing/bad data. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2445 set_state(s, T30_STATE_F_POST_RCP_PPR);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2446 s->ecm_frame_map[0] = 0xFF;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2447 s->ecm_frame_map[1] = 0x13;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2448 s->ecm_frame_map[2] = T30_PPR;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2449 send_frame(s, s->ecm_frame_map, 3 + 32);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2450 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2451 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2452 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2453 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2454 span_log(&s->logging, SPAN_LOG_FLOW, "Bad PPS message length %d.\n", len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2455 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2456 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2457 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2458 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2459 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2460 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2461 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2462 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2463
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2464 static void process_rx_tnr(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2465 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2466 /* Transmit not ready */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2467 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2468 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2469 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2470 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2471 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2472 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2473 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2474 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2475
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2476 static void process_rx_eor(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2477 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2478 int fcf2;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2479
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2480 /* End of retransmission */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2481 /* Partial page signal */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2482 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2483 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2484 case T30_STATE_F_DOC:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2485 case T30_STATE_F_POST_DOC_ECM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2486 if (len == 4)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2487 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2488 fcf2 = msg[3] & 0xFE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2489 span_log(&s->logging, SPAN_LOG_FLOW, "Received EOR + %s\n", t30_frametype(msg[3]));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2490 switch (fcf2)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2491 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2492 case T30_NULL:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2493 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2494 case T30_PRI_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2495 case T30_PRI_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2496 case T30_PRI_EOP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2497 /* TODO: Alert operator */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2498 /* Fall through */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2499 case T30_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2500 case T30_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2501 case T30_EOP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2502 s->next_rx_step = fcf2;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2503 send_simple_frame(s, T30_ERR);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2504 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2505 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2506 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2507 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2508 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2509 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2510 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2511 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2512 unexpected_frame_length(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2513 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2514 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2515 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2516 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2517 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2518 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2519 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2520 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2521
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2522 static void process_rx_fdm(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2523 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2524 /* File diagnostics message */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2525 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2526 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2527 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2528 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2529 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2530 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2531 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2532 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2533
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2534 static void process_rx_mcf(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2535 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2536 t4_stats_t stats;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2537
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2538 /* Message confirmation */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2539 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2540 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2541 case T30_STATE_II_Q:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2542 switch (s->next_tx_step)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2543 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2544 case T30_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2545 case T30_PRI_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2546 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2547 t4_tx_end_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2548 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2549 s->phase_d_handler(s, s->phase_d_user_data, T30_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2550 t4_tx_start_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2551 set_state(s, T30_STATE_I);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2552 queue_phase(s, T30_PHASE_C_NON_ECM_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2553 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2554 case T30_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2555 case T30_PRI_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2556 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2557 t4_tx_end_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2558 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2559 s->phase_d_handler(s, s->phase_d_user_data, T30_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2560 t4_tx_end(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2561 set_state(s, T30_STATE_R);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2562 if (span_log_test(&s->logging, SPAN_LOG_FLOW))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2563 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2564 t4_get_transfer_statistics(&(s->t4), &stats);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2565 span_log(&s->logging, SPAN_LOG_FLOW, "Success - delivered %d pages\n", stats.pages_transferred);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2566 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2567 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2568 case T30_EOP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2569 case T30_PRI_EOP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2570 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2571 t4_tx_end_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2572 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2573 s->phase_d_handler(s, s->phase_d_user_data, T30_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2574 t4_tx_end(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2575 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2576 if (span_log_test(&s->logging, SPAN_LOG_FLOW))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2577 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2578 t4_get_transfer_statistics(&(s->t4), &stats);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2579 span_log(&s->logging, SPAN_LOG_FLOW, "Success - delivered %d pages\n", stats.pages_transferred);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2580 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2581 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2582 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2583 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2584 case T30_STATE_IV_PPS_NULL:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2585 case T30_STATE_IV_PPS_Q:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2586 case T30_STATE_IV_PPS_RNR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2587 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2588 /* Is there more of the current page to get, or do we move on? */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2589 span_log(&s->logging, SPAN_LOG_FLOW, "Is there more to send? - %d %d\n", s->ecm_frames, s->ecm_len[255]);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2590 if (!s->ecm_at_page_end && get_partial_ecm_page(s) > 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2591 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2592 span_log(&s->logging, SPAN_LOG_WARNING, "Additional image data to send\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2593 s->ecm_block++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2594 set_state(s, T30_STATE_IV);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2595 queue_phase(s, T30_PHASE_C_ECM_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2596 s->ecm_current_frame = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2597 send_next_ecm_frame(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2598 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2599 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2600 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2601
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2602 span_log(&s->logging, SPAN_LOG_FLOW, "Moving on to the next page\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2603 switch (s->next_tx_step)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2604 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2605 case T30_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2606 case T30_PRI_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2607 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2608 t4_tx_end_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2609 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2610 s->phase_d_handler(s, s->phase_d_user_data, T30_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2611 t4_tx_start_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2612 s->ecm_page++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2613 s->ecm_block = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2614 if (get_partial_ecm_page(s) > 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2615 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2616 set_state(s, T30_STATE_IV);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2617 queue_phase(s, T30_PHASE_C_ECM_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2618 s->ecm_current_frame = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2619 send_next_ecm_frame(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2620 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2621 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2622 case T30_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2623 case T30_PRI_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2624 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2625 t4_tx_end_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2626 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2627 s->phase_d_handler(s, s->phase_d_user_data, T30_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2628 t4_tx_end(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2629 set_state(s, T30_STATE_R);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2630 if (span_log_test(&s->logging, SPAN_LOG_FLOW))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2631 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2632 t4_get_transfer_statistics(&(s->t4), &stats);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2633 span_log(&s->logging, SPAN_LOG_FLOW, "Success - delivered %d pages\n", stats.pages_transferred);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2634 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2635 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2636 case T30_EOP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2637 case T30_PRI_EOP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2638 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2639 t4_tx_end_page(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2640 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2641 s->phase_d_handler(s, s->phase_d_user_data, T30_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2642 t4_tx_end(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2643 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2644 if (span_log_test(&s->logging, SPAN_LOG_FLOW))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2645 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2646 t4_get_transfer_statistics(&(s->t4), &stats);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2647 span_log(&s->logging, SPAN_LOG_FLOW, "Success - delivered %d pages\n", stats.pages_transferred);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2648 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2649 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2650 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2651 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2652 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2653 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2654 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2655 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2656 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2657 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2658 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2659
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2660 static void process_rx_rtp(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2661 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2662 /* Retrain positive */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2663 s->short_train = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2664 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2665 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2666 case T30_STATE_II_Q:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2667 switch (s->next_tx_step)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2668 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2669 case T30_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2670 case T30_PRI_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2671 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2672 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2673 s->phase_d_handler(s, s->phase_d_user_data, T30_RTP);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2674 /* Send fresh training, and then the next page */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2675 queue_phase(s, T30_PHASE_B_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2676 restart_sending_document(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2677 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2678 case T30_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2679 case T30_PRI_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2680 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2681 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2682 s->phase_d_handler(s, s->phase_d_user_data, T30_RTP);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2683 /* TODO: should go back to T, and resend */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2684 set_state(s, T30_STATE_R);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2685 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2686 case T30_EOP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2687 case T30_PRI_EOP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2688 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2689 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2690 s->phase_d_handler(s, s->phase_d_user_data, T30_RTN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2691 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2692 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2693 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2694 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2695 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2696 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2697 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2698 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2699 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2700 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2701
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2702 static void process_rx_rtn(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2703 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2704 /* Retrain negative */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2705 s->short_train = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2706 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2707 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2708 case T30_STATE_II_Q:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2709 switch (s->next_tx_step)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2710 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2711 case T30_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2712 case T30_PRI_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2713 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2714 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2715 s->phase_d_handler(s, s->phase_d_user_data, T30_RTN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2716 /* Send fresh training, and then repeat the last page */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2717 queue_phase(s, T30_PHASE_B_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2718 restart_sending_document(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2719 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2720 case T30_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2721 case T30_PRI_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2722 case T30_EOP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2723 case T30_PRI_EOP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2724 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2725 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2726 s->phase_d_handler(s, s->phase_d_user_data, T30_RTN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2727 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2728 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2729 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2730 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2731 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2732 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2733 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2734 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2735 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2736 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2737
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2738 static void process_rx_pip(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2739 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2740 /* Procedure interrupt positive */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2741 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2742 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2743 case T30_STATE_II_Q:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2744 case T30_STATE_IV_PPS_Q:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2745 case T30_STATE_IV_PPS_RNR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2746 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2747 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2748 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2749 s->phase_d_handler(s, s->phase_d_user_data, T30_PIP);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2750 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2751 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2752 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2753 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2754 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2755 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2756 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2757 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2758 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2759
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2760 static void process_rx_pin(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2761 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2762 /* Procedure interrupt negative */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2763 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2764 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2765 case T30_STATE_II_Q:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2766 case T30_STATE_IV_PPS_Q:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2767 case T30_STATE_IV_PPS_RNR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2768 case T30_STATE_IV_EOR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2769 case T30_STATE_IV_EOR_RNR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2770 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2771 if (s->phase_d_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2772 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2773 s->phase_d_handler(s, s->phase_d_user_data, T30_PIN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2774 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2775 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2776 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2777 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2778 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2779 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2780 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2781 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2782 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2783
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2784 static void process_rx_dcn(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2785 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2786 /* Disconnect */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2787 /* TODO: test if this is expected or unexpected */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2788 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2789 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2790 #if 0
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2791 case ??????:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2792 /* Unexpected DCN while waiting for image data */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2793 s->current_status = T30_ERR_DCNDATARX;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2794 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2795 #endif
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2796 case T30_STATE_F_POST_DOC_NON_ECM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2797 /* Unexpected DCN while waiting for EOM, EOP or MPS */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2798 s->current_status = T30_ERR_DCNFAXRX;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2799 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2800 case T30_STATE_II_Q:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2801 switch (s->next_tx_step)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2802 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2803 case T30_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2804 case T30_PRI_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2805 case T30_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2806 case T30_PRI_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2807 /* Unexpected DCN after EOM or MPS sequence */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2808 s->current_status = T30_ERR_DCNPHDRX;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2809 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2810 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2811 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2812 #if 0
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2813 case ??????:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2814 /* Unexpected DCN after RR/RNR sequence */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2815 s->current_status = T30_ERR_DCNRRDRX;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2816 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2817 case ??????:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2818 /* Unexpected DCN after requested retransmission */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2819 s->current_status = T30_ERR_DCNNORTNRX;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2820 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2821 #endif
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2822 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2823 /* Time to disconnect */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2824 disconnect(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2825 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2826 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2827
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2828 static void process_rx_crp(t30_state_t *s, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2829 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2830 /* Command repeat */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2831 repeat_last_command(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2832 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2833 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2834
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2835 static void hdlc_accept_control_msg(t30_state_t *s, int ok, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2836 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2837 int final_frame;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2838 char far_password[T30_MAX_IDENT_LEN];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2839
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2840 final_frame = msg[1] & 0x10;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2841 if (!final_frame)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2842 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2843 /* Restart the command or response timer, T2 or T4 */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2844 s->timer_t2_t4 = ms_to_samples((s->timer_is_t4) ? DEFAULT_TIMER_T4 : DEFAULT_TIMER_T2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2845
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2846 /* The following handles all the message types we expect to get without
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2847 a final frame tag. If we get one that T.30 says we should not expect
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2848 in a particular context, its pretty harmless, so don't worry. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2849 switch (msg[2] & 0xFE)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2850 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2851 case T30_CSI:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2852 if (msg[2] == T30_CSI)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2853 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2854 /* Called subscriber identification */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2855 /* OK in (NSF) (CSI) DIS */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2856 decode_20digit_msg(s, s->far_ident, &msg[2], len - 2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2857 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2858 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2859 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2860 /* CIG - Calling subscriber identification */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2861 /* OK in (NSC) (CIG) DTC */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2862 /* OK in (PWD) (SEP) (CIG) DTC */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2863 decode_20digit_msg(s, s->far_ident, &msg[2], len - 2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2864 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2865 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2866 case T30_NSF:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2867 if (msg[2] == T30_NSF)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2868 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2869 /* Non-standard facilities */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2870 /* OK in (NSF) (CSI) DIS */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2871 if (t35_decode(&msg[3], len - 3, &s->country, &s->vendor, &s->model))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2872 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2873 if (s->country)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2874 span_log(&s->logging, SPAN_LOG_FLOW, "The remote was made in '%s'\n", s->country);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2875 if (s->vendor)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2876 span_log(&s->logging, SPAN_LOG_FLOW, "The remote was made by '%s'\n", s->vendor);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2877 if (s->model)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2878 span_log(&s->logging, SPAN_LOG_FLOW, "The remote is a '%s'\n", s->model);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2879 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2880 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2881 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2882 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2883 /* NSC - Non-standard facilities command */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2884 /* OK in (NSC) (CIG) DTC */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2885 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2886 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2887 case T30_PWD:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2888 if (msg[2] == T30_PWD)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2889 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2890 /* Password */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2891 /* OK in (PWD) (SUB) (TSI) DCS */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2892 /* OK in (PWD) (SEP) (CIG) DTC */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2893 decode_20digit_msg(s, far_password, &msg[2], len - 2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2894 if (strcmp(s->far_password, far_password) == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2895 s->far_password_ok = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2896 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2897 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2898 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2899 unexpected_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2900 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2901 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2902 case T30_SEP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2903 if (msg[2] == T30_SEP)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2904 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2905 /* Selective polling */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2906 /* OK in (PWD) (SEP) (CIG) DTC */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2907 decode_20digit_msg(s, s->sep_address, &msg[2], len - 2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2908 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2909 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2910 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2911 unexpected_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2912 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2913 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2914 case T30_PSA:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2915 if (msg[2] == T30_PSA)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2916 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2917 /* Polled subaddress */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2918 decode_20digit_msg(s, s->psa_address, &msg[2], len - 2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2919 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2920 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2921 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2922 unexpected_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2923 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2924 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2925 case T30_CIA:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2926 if (msg[2] == T30_CIA)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2927 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2928 /* Calling subscriber internet address */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2929 decode_url_msg(s, NULL, &msg[2], len - 2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2930 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2931 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2932 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2933 unexpected_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2934 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2935 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2936 case T30_ISP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2937 if (msg[2] == T30_ISP)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2938 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2939 /* Internet selective polling address */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2940 decode_url_msg(s, NULL, &msg[2], len - 2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2941 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2942 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2943 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2944 unexpected_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2945 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2946 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2947 case T30_TSI:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2948 /* Transmitting subscriber identity */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2949 /* OK in (TSI) DCS */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2950 /* OK in (PWD) (SUB) (TSI) DCS */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2951 decode_20digit_msg(s, s->far_ident, &msg[2], len - 2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2952 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2953 case T30_SUB:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2954 /* Subaddress */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2955 /* OK in (PWD) (SUB) (TSI) DCS */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2956 decode_20digit_msg(s, s->far_sub_address, &msg[2], len - 2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2957 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2958 case T30_SID:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2959 /* Sender Identification */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2960 /* T.30 does not say where this is OK */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2961 decode_20digit_msg(s, NULL, &msg[2], len - 2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2962 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2963 case T30_CSA:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2964 /* Calling subscriber internet address */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2965 decode_url_msg(s, NULL, &msg[2], len - 2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2966 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2967 case T30_TSA:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2968 /* Transmitting subscriber internet address */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2969 decode_url_msg(s, NULL, &msg[2], len - 2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2970 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2971 case T30_IRA:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2972 /* Internet routing address */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2973 decode_url_msg(s, NULL, &msg[2], len - 2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2974 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2975 case T4_FCD:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2976 process_rx_fcd(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2977 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2978 case T4_RCP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2979 process_rx_rcp(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2980 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2981 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2982 span_log(&s->logging, SPAN_LOG_FLOW, "Unexpected %s frame\n", t30_frametype(msg[2]));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2983 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2984 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2985 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2986 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2987 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2988 /* Once we have any successful message from the far end, we
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2989 cancel timer T1 */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2990 s->timer_t0_t1 = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2991
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2992 /* The following handles context sensitive message types, which should
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2993 occur at the end of message sequences. They should, therefore have
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2994 the final frame flag set. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2995 span_log(&s->logging, SPAN_LOG_FLOW, "In state %d\n", s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2996 switch (msg[2] & 0xFE)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2997 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2998 case T30_DIS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
2999 process_rx_dis_or_dtc(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3000 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3001 case T30_DCS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3002 process_rx_dcs(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3003 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3004 case T30_NSS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3005 process_rx_nss(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3006 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3007 case T30_CTC:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3008 process_rx_ctc(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3009 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3010 case T30_CFR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3011 process_rx_cfr(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3012 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3013 case T30_FTT:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3014 process_rx_ftt(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3015 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3016 case T30_CTR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3017 process_rx_ctr(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3018 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3019 case T30_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3020 process_rx_eom(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3021 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3022 case T30_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3023 process_rx_mps(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3024 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3025 case T30_EOP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3026 process_rx_eop(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3027 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3028 case T30_PRI_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3029 process_rx_pri_eom(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3030 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3031 case T30_PRI_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3032 process_rx_pri_mps(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3033 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3034 case T30_PRI_EOP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3035 process_rx_pri_eop(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3036 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3037 case T30_EOS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3038 process_rx_eos(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3039 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3040 case T30_PPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3041 process_rx_pps(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3042 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3043 case T30_EOR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3044 process_rx_eor(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3045 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3046 case T30_RR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3047 process_rx_rr(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3048 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3049 case T30_MCF:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3050 process_rx_mcf(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3051 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3052 case T30_RTP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3053 process_rx_rtp(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3054 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3055 case T30_RTN:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3056 process_rx_rtn(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3057 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3058 case T30_PIP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3059 process_rx_pip(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3060 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3061 case T30_PIN:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3062 process_rx_pin(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3063 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3064 case T30_PPR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3065 process_rx_ppr(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3066 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3067 case T30_RNR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3068 process_rx_rnr(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3069 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3070 case T30_ERR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3071 process_rx_err(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3072 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3073 case T30_FDM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3074 process_rx_fdm(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3075 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3076 case T30_DCN:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3077 process_rx_dcn(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3078 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3079 case T30_CRP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3080 process_rx_crp(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3081 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3082 case T30_FNV:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3083 process_rx_fnv(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3084 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3085 case T30_TNR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3086 process_rx_tnr(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3087 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3088 case T30_TR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3089 process_rx_tr(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3090 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3091 case T4_RCP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3092 process_rx_rcp(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3093 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3094 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3095 /* We don't know what to do with this. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3096 unexpected_final_frame(s, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3097 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3098 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3099 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3100 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3101 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3102
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3103 void t30_hdlc_accept(void *user_data, int ok, const uint8_t *msg, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3104 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3105 t30_state_t *s;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3106
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3107 s = (t30_state_t *) user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3108 if (len < 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3109 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3110 /* Special conditions */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3111 switch (len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3112 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3113 case PUTBIT_TRAINING_FAILED:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3114 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC carrier training failed in state %d\n", s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3115 s->rx_trained = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3116 /* Cancel the timer, since we have actually seen something, and wait until the carrier drops
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3117 before proceeding. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3118 // TODO: this is not a complete answer to handling failures to train
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3119 s->timer_t2_t4 = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3120 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3121 case PUTBIT_TRAINING_SUCCEEDED:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3122 /* The modem is now trained */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3123 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC carrier trained in state %d\n", s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3124 s->rx_signal_present = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3125 s->rx_trained = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3126 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3127 case PUTBIT_CARRIER_UP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3128 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC carrier up in state %d\n", s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3129 s->rx_signal_present = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3130 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3131 case PUTBIT_CARRIER_DOWN:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3132 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC carrier down in state %d\n", s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3133 s->rx_signal_present = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3134 s->rx_trained = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3135 /* If a phase change has been queued to occur after the receive signal drops,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3136 its time to change. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3137 if (s->next_phase != T30_PHASE_IDLE)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3138 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3139 set_phase(s, s->next_phase);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3140 s->next_phase = T30_PHASE_IDLE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3141 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3142 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3143 case PUTBIT_FRAMING_OK:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3144 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC framing OK in state %d\n", s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3145 if (!s->far_end_detected && s->timer_t0_t1 > 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3146 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3147 s->timer_t0_t1 = ms_to_samples(DEFAULT_TIMER_T1);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3148 s->far_end_detected = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3149 if (s->phase == T30_PHASE_A_CED || s->phase == T30_PHASE_A_CNG)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3150 set_phase(s, T30_PHASE_B_RX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3151 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3152 /* 5.4.3.1 Timer T2 is reset if flag is received */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3153 if (!s->timer_is_t4 && s->timer_t2_t4 > 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3154 s->timer_t2_t4 = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3155 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3156 case PUTBIT_ABORT:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3157 /* Just ignore these */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3158 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3159 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3160 span_log(&s->logging, SPAN_LOG_FLOW, "Unexpected HDLC special length - %d!\n", len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3161 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3162 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3163 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3164 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3165
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3166 /* The spec. says a command or response is not valid if:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3167 - any of the frames, optional or mandatory, have an FCS error.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3168 - any single frame exceeds 3s +- 15% (i.e. no frame should exceed 2.55s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3169 - the final frame is not tagged as a final frame
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3170 - the final frame is not a recognised one.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3171 The first point seems benign. If we accept an optional frame, and a later
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3172 frame is bad, having accepted the optional frame should be harmless.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3173 The 2.55s maximum seems to limit signalling frames to no more than 95 octets,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3174 including FCS, and flag octets (assuming the use of V.21).
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3175 */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3176 if (!ok)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3177 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3178 span_log(&s->logging, SPAN_LOG_FLOW, "Bad CRC received\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3179 if (s->crp_enabled)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3180 send_simple_frame(s, T30_CRP);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3181 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3182 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3183
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3184 /* Cancel the command or response timer */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3185 s->timer_t2_t4 = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3186 if (len < 3)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3187 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3188 span_log(&s->logging, SPAN_LOG_FLOW, "Bad HDLC frame length - %d\n", len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3189 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3190 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3191 if (msg[0] != 0xFF || !(msg[1] == 0x03 || msg[1] == 0x13))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3192 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3193 span_log(&s->logging, SPAN_LOG_FLOW, "Bad HDLC frame header - %02x %02x\n", msg[0], msg[1]);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3194 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3195 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3196 print_frame(s, "Rx: ", msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3197
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3198 switch (s->phase)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3199 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3200 case T30_PHASE_A_CED:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3201 case T30_PHASE_A_CNG:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3202 case T30_PHASE_B_RX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3203 case T30_PHASE_C_ECM_RX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3204 case T30_PHASE_D_RX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3205 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3206 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3207 span_log(&s->logging, SPAN_LOG_FLOW, "Unexpected HDLC frame received in phase %s, state %d\n", phase_names[s->phase], s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3208 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3209 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3210 hdlc_accept_control_msg(s, ok, msg, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3211 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3212 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3213
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3214 static void queue_phase(t30_state_t *s, int phase)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3215 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3216 if (s->rx_signal_present)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3217 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3218 /* We need to wait for that signal to go away */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3219 s->next_phase = phase;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3220 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3221 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3222 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3223 set_phase(s, phase);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3224 s->next_phase = T30_PHASE_IDLE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3225 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3226 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3227 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3228
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3229 static void set_phase(t30_state_t *s, int phase)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3230 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3231 if (phase != s->phase)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3232 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3233 span_log(&s->logging, SPAN_LOG_FLOW, "Changing from phase %s to %s\n", phase_names[s->phase], phase_names[phase]);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3234 /* We may be killing a receiver before it has declared the end of the
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3235 signal. Force the signal present indicator to off, because the
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3236 receiver will never be able to. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3237 if (s->phase != T30_PHASE_A_CED && s->phase != T30_PHASE_A_CNG)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3238 s->rx_signal_present = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3239 s->rx_trained = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3240 s->phase = phase;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3241 switch (phase)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3242 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3243 case T30_PHASE_A_CED:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3244 if (s->set_rx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3245 s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_V21, FALSE, TRUE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3246 if (s->set_tx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3247 s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_CED, FALSE, FALSE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3248 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3249 case T30_PHASE_A_CNG:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3250 if (s->set_rx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3251 s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_V21, FALSE, TRUE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3252 if (s->set_tx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3253 s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_CNG, FALSE, FALSE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3254 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3255 case T30_PHASE_B_RX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3256 case T30_PHASE_D_RX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3257 if (s->set_rx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3258 s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_V21, FALSE, TRUE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3259 if (s->set_tx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3260 s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_NONE, FALSE, FALSE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3261 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3262 case T30_PHASE_B_TX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3263 case T30_PHASE_D_TX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3264 if (!s->far_end_detected && s->timer_t0_t1 > 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3265 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3266 s->timer_t0_t1 = ms_to_samples(DEFAULT_TIMER_T1);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3267 s->far_end_detected = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3268 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3269 if (s->set_rx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3270 s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_NONE, FALSE, FALSE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3271 if (s->set_tx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3272 s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_V21, FALSE, TRUE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3273 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3274 case T30_PHASE_C_NON_ECM_RX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3275 s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3276 s->timer_is_t4 = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3277 if (s->set_rx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3278 s->set_rx_type_handler(s->set_rx_type_user_data, fallback_sequence[s->current_fallback].modem_type, s->short_train, FALSE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3279 if (s->set_tx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3280 s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_NONE, FALSE, FALSE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3281 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3282 case T30_PHASE_C_NON_ECM_TX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3283 /* Pause before switching from anything to phase C */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3284 /* Always prime the training count for 1.5s of data at the current rate. Its harmless if
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3285 we prime it and are not doing TCF. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3286 s->training_test_bits = (3*fallback_sequence[s->current_fallback].bit_rate)/2;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3287 if (s->set_rx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3288 s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_NONE, FALSE, FALSE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3289 if (s->set_tx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3290 s->set_tx_type_handler(s->set_tx_type_user_data, fallback_sequence[s->current_fallback].modem_type, s->short_train, FALSE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3291 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3292 case T30_PHASE_C_ECM_RX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3293 s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3294 s->timer_is_t4 = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3295 if (s->set_rx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3296 s->set_rx_type_handler(s->set_rx_type_user_data, fallback_sequence[s->current_fallback].modem_type, s->short_train, TRUE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3297 if (s->set_tx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3298 s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_NONE, FALSE, FALSE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3299 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3300 case T30_PHASE_C_ECM_TX:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3301 /* Pause before switching from anything to phase C */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3302 if (s->set_rx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3303 s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_NONE, FALSE, FALSE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3304 if (s->set_tx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3305 s->set_tx_type_handler(s->set_tx_type_user_data, fallback_sequence[s->current_fallback].modem_type, s->short_train, TRUE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3306 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3307 case T30_PHASE_E:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3308 /* Send a little silence before ending things, to ensure the
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3309 buffers are all flushed through, and the far end has seen
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3310 the last message we sent. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3311 s->training_current_zeros = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3312 s->training_most_zeros = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3313 if (s->set_rx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3314 s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_NONE, FALSE, FALSE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3315 if (s->set_tx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3316 s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_PAUSE, 200, FALSE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3317 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3318 case T30_PHASE_CALL_FINISHED:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3319 if (s->set_rx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3320 s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_DONE, FALSE, FALSE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3321 if (s->set_tx_type_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3322 s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_DONE, FALSE, FALSE);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3323 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3324 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3325 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3326 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3327 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3328
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3329 static void set_state(t30_state_t *s, int state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3330 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3331 if (s->state != state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3332 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3333 span_log(&s->logging, SPAN_LOG_FLOW, "Changing from state %d to %d\n", s->state, state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3334 s->state = state;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3335 s->step = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3336 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3337 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3338 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3339
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3340 void t30_receive_complete(void *user_data)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3341 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3342 t30_state_t *s;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3343
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3344 s = (t30_state_t *) user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3345
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3346 span_log(&s->logging, SPAN_LOG_FLOW, "Receive complete in phase %s, state %d\n", phase_names[s->phase], s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3347 /* Usually receive complete is notified by a carrier down signal. However,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3348 in cases like a T.38 packet stream dying in the middle of reception
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3349 there needs to be a means to stop things. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3350 if (s->phase == T30_PHASE_C_NON_ECM_RX)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3351 t30_non_ecm_put_bit(s, PUTBIT_CARRIER_DOWN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3352 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3353 t30_hdlc_accept(s, TRUE, NULL, PUTBIT_CARRIER_DOWN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3354 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3355 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3356
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3357 void t30_send_complete(void *user_data)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3358 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3359 t30_state_t *s;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3360
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3361 s = (t30_state_t *) user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3362
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3363 span_log(&s->logging, SPAN_LOG_FLOW, "Send complete in phase %s, state %d\n", phase_names[s->phase], s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3364 /* We have finished sending our messages, so move on to the next operation. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3365 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3366 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3367 case T30_STATE_ANSWERING:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3368 span_log(&s->logging, SPAN_LOG_FLOW, "Starting answer mode\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3369 set_phase(s, T30_PHASE_B_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3370 s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T2);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3371 s->timer_is_t4 = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3372 set_state(s, T30_STATE_R);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3373 s->dis_received = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3374 send_dis_or_dtc_sequence(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3375 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3376 case T30_STATE_R:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3377 switch (s->step)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3378 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3379 case 0:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3380 s->step++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3381 if (send_ident_frame(s, T30_CSI))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3382 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3383 /* Fall through */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3384 case 1:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3385 s->step++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3386 set_dis_or_dtc(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3387 send_frame(s, s->dis_dtc_frame, s->dis_dtc_len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3388 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3389 case 2:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3390 s->step++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3391 if (s->send_hdlc_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3392 s->send_hdlc_handler(s->send_hdlc_user_data, NULL, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3393 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3394 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3395 /* Wait for an acknowledgement. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3396 set_phase(s, T30_PHASE_B_RX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3397 s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T4);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3398 s->timer_is_t4 = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3399 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3400 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3401 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3402 case T30_STATE_F_CFR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3403 if (s->step == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3404 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3405 if (s->send_hdlc_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3406 s->send_hdlc_handler(s->send_hdlc_user_data, NULL, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3407 s->step++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3408 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3409 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3410 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3411 set_state(s, T30_STATE_F_DOC);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3412 set_phase(s, (s->error_correcting_mode) ? T30_PHASE_C_ECM_RX : T30_PHASE_C_NON_ECM_RX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3413 s->next_rx_step = T30_MPS;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3414 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3415 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3416 case T30_STATE_F_FTT:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3417 if (s->step == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3418 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3419 if (s->send_hdlc_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3420 s->send_hdlc_handler(s->send_hdlc_user_data, NULL, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3421 s->step++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3422 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3423 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3424 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3425 set_phase(s, T30_PHASE_B_RX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3426 s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T4);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3427 s->timer_is_t4 = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3428 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3429 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3430 case T30_STATE_III_Q_MCF:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3431 case T30_STATE_III_Q_RTP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3432 case T30_STATE_III_Q_RTN:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3433 case T30_STATE_F_POST_RCP_PPR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3434 case T30_STATE_F_POST_RCP_MCF:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3435 if (s->step == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3436 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3437 if (s->send_hdlc_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3438 s->send_hdlc_handler(s->send_hdlc_user_data, NULL, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3439 s->step++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3440 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3441 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3442 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3443 switch (s->next_rx_step)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3444 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3445 case T30_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3446 case T30_PRI_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3447 set_state(s, T30_STATE_F_DOC);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3448 set_phase(s, (s->error_correcting_mode) ? T30_PHASE_C_ECM_RX : T30_PHASE_C_NON_ECM_RX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3449 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3450 case T30_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3451 case T30_PRI_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3452 /* TODO: */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3453 disconnect(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3454 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3455 case T30_EOP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3456 case T30_PRI_EOP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3457 disconnect(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3458 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3459 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3460 span_log(&s->logging, SPAN_LOG_FLOW, "Unknown next rx step - %d\n", s->next_rx_step);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3461 disconnect(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3462 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3463 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3464 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3465 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3466 case T30_STATE_II_Q:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3467 case T30_STATE_IV_PPS_NULL:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3468 case T30_STATE_IV_PPS_Q:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3469 if (s->step == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3470 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3471 if (s->send_hdlc_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3472 s->send_hdlc_handler(s->send_hdlc_user_data, NULL, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3473 s->step++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3474 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3475 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3476 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3477 /* We have finished sending the post image message. Wait for an
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3478 acknowledgement. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3479 set_phase(s, T30_PHASE_D_RX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3480 s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T4);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3481 s->timer_is_t4 = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3482 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3483 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3484 case T30_STATE_B:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3485 /* We have now allowed time for the last message to flush
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3486 through the system, so it is safe to report the end of the
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3487 call. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3488 if (s->phase_e_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3489 s->phase_e_handler(s, s->phase_e_user_data, s->current_status);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3490 set_state(s, T30_STATE_CALL_FINISHED);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3491 set_phase(s, T30_PHASE_CALL_FINISHED);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3492 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3493 case T30_STATE_C:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3494 if (s->step == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3495 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3496 if (s->send_hdlc_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3497 s->send_hdlc_handler(s->send_hdlc_user_data, NULL, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3498 s->step++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3499 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3500 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3501 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3502 /* We just sent the disconnect message. Now it is time to disconnect */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3503 disconnect(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3504 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3505 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3506 case T30_STATE_D:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3507 switch (s->step)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3508 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3509 case 0:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3510 s->step++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3511 if (send_sub_frame(s))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3512 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3513 /* Fall through */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3514 case 1:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3515 s->step++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3516 if (send_ident_frame(s, T30_TSI))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3517 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3518 /* Fall through */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3519 case 2:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3520 s->step++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3521 send_frame(s, s->dcs_frame, s->dcs_len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3522 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3523 case 3:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3524 s->step++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3525 if (s->send_hdlc_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3526 s->send_hdlc_handler(s->send_hdlc_user_data, NULL, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3527 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3528 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3529 if ((s->iaf & T30_IAF_MODE_NO_TCF))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3530 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3531 /* Skip the trainability test */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3532 s->retries = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3533 s->short_train = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3534 if (s->error_correcting_mode)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3535 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3536 set_state(s, T30_STATE_IV);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3537 queue_phase(s, T30_PHASE_C_ECM_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3538 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3539 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3540 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3541 set_state(s, T30_STATE_I);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3542 queue_phase(s, T30_PHASE_C_NON_ECM_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3543 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3544 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3545 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3546 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3547 /* Do the trainability test */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3548 set_state(s, T30_STATE_D_TCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3549 set_phase(s, T30_PHASE_C_NON_ECM_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3550 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3551 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3552 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3553 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3554 case T30_STATE_D_TCF:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3555 /* Finished sending training test. Listen for the response. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3556 set_phase(s, T30_PHASE_B_RX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3557 s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T4);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3558 s->timer_is_t4 = TRUE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3559 set_state(s, T30_STATE_D_POST_TCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3560 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3561 case T30_STATE_I:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3562 /* Send the end of page message */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3563 set_phase(s, T30_PHASE_D_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3564 set_state(s, T30_STATE_II_Q);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3565 /* We might need to resend the page we are on, but we need to check if there
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3566 are any more pages to send, so we can send the correct signal right now. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3567 send_simple_frame(s, s->next_tx_step = check_next_tx_step(s));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3568 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3569 case T30_STATE_IV:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3570 /* We have finished sending an FCD frame */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3571 if (s->step == 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3572 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3573 if (send_next_ecm_frame(s))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3574 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3575 if (s->send_hdlc_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3576 s->send_hdlc_handler(s->send_hdlc_user_data, NULL, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3577 s->step++;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3578 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3579 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3580 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3581 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3582 /* Send the end of page or partial page message */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3583 set_phase(s, T30_PHASE_D_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3584 s->next_tx_step = check_next_tx_step(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3585 if (send_pps_frame(s) == T30_NULL)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3586 set_state(s, T30_STATE_IV_PPS_NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3587 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3588 set_state(s, T30_STATE_IV_PPS_Q);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3589 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3590 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3591 case T30_STATE_CALL_FINISHED:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3592 /* Just ignore anything that happens now. We might get here if a premature
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3593 disconnect from the far end overlaps something. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3594 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3595 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3596 span_log(&s->logging, SPAN_LOG_FLOW, "Bad state in t30_send_complete - %d\n", s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3597 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3598 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3599 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3600 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3601
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3602 static void repeat_last_command(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3603 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3604 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3605 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3606 case T30_STATE_R:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3607 set_phase(s, T30_PHASE_B_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3608 s->dis_received = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3609 send_dis_or_dtc_sequence(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3610 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3611 case T30_STATE_III_Q_MCF:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3612 set_phase(s, T30_PHASE_D_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3613 send_simple_frame(s, T30_MCF);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3614 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3615 case T30_STATE_III_Q_RTP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3616 set_phase(s, T30_PHASE_D_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3617 send_simple_frame(s, T30_RTP);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3618 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3619 case T30_STATE_III_Q_RTN:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3620 set_phase(s, T30_PHASE_D_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3621 send_simple_frame(s, T30_RTN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3622 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3623 case T30_STATE_II_Q:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3624 set_phase(s, T30_PHASE_D_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3625 send_simple_frame(s, s->next_tx_step);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3626 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3627 case T30_STATE_IV_PPS_NULL:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3628 case T30_STATE_IV_PPS_Q:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3629 set_phase(s, T30_PHASE_D_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3630 send_pps_frame(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3631 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3632 case T30_STATE_IV_PPS_RNR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3633 case T30_STATE_IV_EOR_RNR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3634 set_phase(s, T30_PHASE_D_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3635 send_simple_frame(s, T30_RNR);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3636 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3637 case T30_STATE_D:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3638 send_dcs_sequence(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3639 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3640 case T30_STATE_F_FTT:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3641 set_phase(s, T30_PHASE_B_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3642 send_simple_frame(s, T30_FTT);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3643 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3644 case T30_STATE_F_CFR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3645 set_phase(s, T30_PHASE_B_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3646 send_simple_frame(s, T30_CFR);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3647 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3648 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3649 span_log(&s->logging, SPAN_LOG_FLOW, "Repeat command called with nothing to repeat - phase %s, state %d\n", phase_names[s->phase], s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3650 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3651 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3652 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3653 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3654
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3655 static void timer_t0_expired(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3656 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3657 span_log(&s->logging, SPAN_LOG_FLOW, "T0 timeout in state %d\n", s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3658 s->current_status = T30_ERR_T0EXPIRED;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3659 /* Just end the call */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3660 disconnect(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3661 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3662 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3663
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3664 static void timer_t1_expired(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3665 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3666 span_log(&s->logging, SPAN_LOG_FLOW, "T1 timeout in state %d\n", s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3667 /* The initial connection establishment has timeout out. In other words, we
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3668 have been unable to communicate successfully with a remote machine.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3669 It is time to abandon the call. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3670 s->current_status = T30_ERR_T1EXPIRED;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3671 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3672 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3673 case T30_STATE_T:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3674 /* Just end the call */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3675 disconnect(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3676 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3677 case T30_STATE_R:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3678 /* Send disconnect, and then end the call. Since we have not
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3679 successfully contacted the far end, it is unclear why we should
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3680 send a disconnect message at this point. However, it is what T.30
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3681 says we should do. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3682 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3683 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3684 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3685 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3686 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3687
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3688 static void timer_t2_expired(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3689 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3690 span_log(&s->logging, SPAN_LOG_FLOW, "T2 timeout in phase %s, state %d\n", phase_names[s->phase], s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3691 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3692 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3693 case T30_STATE_F_DOC:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3694 /* While waiting for FAX page */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3695 s->current_status = T30_ERR_T2EXPFAXRX;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3696 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3697 case T30_STATE_F_POST_DOC_NON_ECM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3698 /* While waiting for next FAX page */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3699 s->current_status = T30_ERR_T2EXPMPSRX;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3700 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3701 #if 0
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3702 case ??????:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3703 /* While waiting for DCN */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3704 s->current_status = T30_ERR_T2EXPDCNRX;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3705 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3706 case ??????:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3707 /* While waiting for phase D */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3708 s->current_status = T30_ERR_T2EXPDRX;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3709 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3710 #endif
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3711 case T30_STATE_IV_PPS_RNR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3712 case T30_STATE_IV_EOR_RNR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3713 /* While waiting for RR command */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3714 s->current_status = T30_ERR_T2EXPRRRX;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3715 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3716 case T30_STATE_R:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3717 /* While waiting for NSS, DCS or MCF */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3718 s->current_status = T30_ERR_T2EXPRX;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3719 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3720 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3721 set_phase(s, T30_PHASE_B_TX);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3722 start_receiving_document(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3723 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3724 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3725
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3726 static void timer_t3_expired(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3727 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3728 span_log(&s->logging, SPAN_LOG_FLOW, "T3 timeout in phase %s, state %d\n", phase_names[s->phase], s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3729 s->current_status = T30_ERR_T3EXPIRED;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3730 disconnect(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3731 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3732 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3733
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3734 static void timer_t4_expired(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3735 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3736 /* There was no response (or only a corrupt response) to a command */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3737 span_log(&s->logging, SPAN_LOG_FLOW, "T4 timeout in phase %s, state %d\n", phase_names[s->phase], s->state);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3738 if (++s->retries > MAX_MESSAGE_TRIES)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3739 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3740 s->current_status = T30_ERR_RETRYDCN;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3741 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3742 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3743 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3744 repeat_last_command(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3745 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3746 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3747
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3748 static void timer_t5_expired(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3749 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3750 /* Give up waiting for the receiver to become ready in error correction mode */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3751 send_dcn(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3752 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3753 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3754
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3755 void t30_timer_update(t30_state_t *s, int samples)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3756 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3757 if (s->timer_t0_t1 > 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3758 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3759 s->timer_t0_t1 -= samples;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3760 if (s->timer_t0_t1 <= 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3761 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3762 if (s->far_end_detected)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3763 timer_t1_expired(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3764 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3765 timer_t0_expired(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3766 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3767 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3768 if (s->timer_t3 > 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3769 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3770 s->timer_t3 -= samples;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3771 if (s->timer_t3 <= 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3772 timer_t3_expired(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3773 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3774 if (s->timer_t2_t4 > 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3775 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3776 s->timer_t2_t4 -= samples;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3777 if (s->timer_t2_t4 <= 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3778 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3779 if (s->timer_is_t4)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3780 timer_t4_expired(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3781 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3782 timer_t2_expired(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3783 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3784 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3785 if (s->timer_t5 > 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3786 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3787 s->timer_t5 -= samples;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3788 if (s->timer_t5 <= 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3789 timer_t5_expired(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3790 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3791 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3792 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3793
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3794 static void decode_20digit_msg(t30_state_t *s, char *msg, const uint8_t *pkt, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3795 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3796 int p;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3797 int k;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3798 char text[20 + 1];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3799
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3800 if (msg == NULL)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3801 msg = text;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3802 if (len > T30_MAX_IDENT_LEN)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3803 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3804 unexpected_frame_length(s, pkt, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3805 msg[0] = '\0';
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3806 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3807 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3808 p = len;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3809 /* Strip trailing spaces */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3810 while (p > 1 && pkt[p - 1] == ' ')
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3811 p--;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3812 /* The string is actually backwards in the message */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3813 k = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3814 while (p > 1)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3815 msg[k++] = pkt[--p];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3816 msg[k] = '\0';
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3817 span_log(&s->logging, SPAN_LOG_FLOW, "Remote fax gave %s as: \"%s\"\n", t30_frametype(pkt[0]), msg);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3818 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3819 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3820
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3821 static void decode_url_msg(t30_state_t *s, char *msg, const uint8_t *pkt, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3822 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3823 char text[77 + 1];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3824
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3825 /* TODO: decode properly, as per T.30 5.3.6.2.12 */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3826 if (msg == NULL)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3827 msg = text;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3828 if (len < 3 || len > 77 + 3 || len != pkt[2] + 3)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3829 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3830 unexpected_frame_length(s, pkt, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3831 msg[0] = '\0';
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3832 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3833 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3834 /* First octet is the sequence number of the packet.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3835 Bit 7 = 1 for more follows, 0 for last packet in the sequence.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3836 Bits 6-0 = The sequence number, 0 to 0x7F
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3837 Second octet is the type of internet address.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3838 Bits 7-4 = reserved
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3839 Bits 3-0 = type:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3840 0 = reserved
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3841 1 = e-mail address
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3842 2 = URL
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3843 3 = TCP/IP V4
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3844 4 = TCP/IP V6
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3845 5 = international phone number, in the usual +... format
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3846 6-15 = reserved
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3847 Third octet is the length of the internet address
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3848 Bit 7 = 1 for more follows, 0 for last packet in the sequence.
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3849 Bits 6-0 = length
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3850 */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3851 memcpy(msg, &pkt[3], len - 3);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3852 msg[len - 3] = '\0';
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3853 span_log(&s->logging, SPAN_LOG_FLOW, "Remote fax gave %s as: %d, %d, \"%s\"\n", t30_frametype(pkt[0]), pkt[0], pkt[1], msg);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3854 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3855 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3856
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3857 const char *t30_frametype(uint8_t x)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3858 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3859 switch (x & 0xFE)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3860 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3861 case T30_DIS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3862 if (x == T30_DTC)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3863 return "DTC";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3864 return "DIS";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3865 case T30_CSI:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3866 if (x == T30_CIG)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3867 return "CIG";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3868 return "CSI";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3869 case T30_NSF:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3870 if (x == T30_NSC)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3871 return "NSC";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3872 return "NSF";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3873 case T30_PWD & 0xFE:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3874 if (x == T30_PWD)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3875 return "PWD";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3876 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3877 case T30_SEP & 0xFE:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3878 if (x == T30_SEP)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3879 return "SEP";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3880 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3881 case T30_PSA & 0xFE:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3882 if (x == T30_PSA)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3883 return "PSA";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3884 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3885 case T30_CIA & 0xFE:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3886 if (x == T30_CIA)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3887 return "CIA";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3888 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3889 case T30_ISP & 0xFE:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3890 if (x == T30_ISP)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3891 return "ISP";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3892 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3893 case T30_DCS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3894 return "DCS";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3895 case T30_TSI:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3896 return "TSI";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3897 case T30_NSS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3898 return "NSS";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3899 case T30_SUB:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3900 return "SUB";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3901 case T30_SID:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3902 return "SID";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3903 case T30_CTC:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3904 return "CTC";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3905 case T30_TSA:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3906 return "TSA";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3907 case T30_IRA:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3908 return "IRA";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3909 case T30_CFR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3910 return "CFR";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3911 case T30_FTT:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3912 return "FTT";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3913 case T30_CTR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3914 return "CTR";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3915 case T30_CSA:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3916 return "CSA";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3917 case T30_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3918 return "EOM";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3919 case T30_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3920 return "MPS";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3921 case T30_EOP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3922 return "EOP";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3923 case T30_PRI_EOM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3924 return "PRI_EOM";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3925 case T30_PRI_MPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3926 return "PRI_MPS";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3927 case T30_PRI_EOP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3928 return "PRI_EOP";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3929 case T30_EOS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3930 return "EOS";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3931 case T30_PPS:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3932 return "PPS";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3933 case T30_EOR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3934 return "EOR";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3935 case T30_RR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3936 return "RR";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3937 case T30_MCF:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3938 return "MCF";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3939 case T30_RTP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3940 return "RTP";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3941 case T30_RTN:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3942 return "RTN";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3943 case T30_PIP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3944 return "PIP";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3945 case T30_PIN:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3946 return "PIN";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3947 case T30_PPR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3948 return "PPR";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3949 case T30_RNR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3950 return "RNR";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3951 case T30_ERR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3952 return "ERR";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3953 case T30_FDM:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3954 return "FDM";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3955 case T30_DCN:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3956 return "DCN";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3957 case T30_CRP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3958 return "CRP";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3959 case T30_FNV:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3960 return "FNV";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3961 case T30_TNR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3962 return "TNR";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3963 case T30_TR:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3964 return "TR";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3965 case T30_PID:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3966 return "PID";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3967 case T30_NULL:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3968 return "NULL";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3969 case T4_FCD:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3970 return "FCD";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3971 case T4_RCP:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3972 return "RCP";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3973 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3974 return "???";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3975 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3976 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3977
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3978 static void octet_reserved_bit(logging_state_t *log,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3979 const uint8_t *msg,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3980 int bit_no,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3981 int expected)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3982 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3983 char s[10] = ".... ....";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3984 int bit;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3985 uint8_t octet;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3986
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3987 /* Break out the octet and the bit number within it. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3988 octet = msg[((bit_no - 1) >> 3) + 3];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3989 bit_no = (bit_no - 1) & 7;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3990 /* Now get the actual bit. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3991 bit = (octet >> bit_no) & 1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3992 /* Is it what it should be. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3993 if (bit ^ expected)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3994 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3995 /* Only log unexpected values. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3996 s[7 - bit_no + ((bit_no < 4) ? 1 : 0)] = (uint8_t) (bit + '0');
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3997 span_log(log, SPAN_LOG_FLOW, " %s= Unexpected state for reserved bit: %d\n", s, bit);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3998 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
3999 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4000 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4001
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4002 static void octet_bit_field(logging_state_t *log,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4003 const uint8_t *msg,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4004 int bit_no,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4005 const char *desc,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4006 const char *yeah,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4007 const char *neigh)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4008 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4009 char s[10] = ".... ....";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4010 int bit;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4011 uint8_t octet;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4012 const char *tag;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4013
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4014 /* Break out the octet and the bit number within it. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4015 octet = msg[((bit_no - 1) >> 3) + 3];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4016 bit_no = (bit_no - 1) & 7;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4017 /* Now get the actual bit. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4018 bit = (octet >> bit_no) & 1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4019 /* Edit the bit string for display. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4020 s[7 - bit_no + ((bit_no < 4) ? 1 : 0)] = (uint8_t) (bit + '0');
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4021 /* Find the right tag to display. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4022 if (bit)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4023 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4024 if ((tag = yeah) == NULL)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4025 tag = "Set";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4026 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4027 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4028 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4029 if ((tag = neigh) == NULL)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4030 tag = "Not set";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4031 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4032 /* Eh, voila! */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4033 span_log(log, SPAN_LOG_FLOW, " %s= %s: %s\n", s, desc, tag);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4034 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4035 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4036
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4037 static void octet_field(logging_state_t *log,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4038 const uint8_t *msg,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4039 int start,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4040 int end,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4041 const char *desc,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4042 const value_string_t tags[])
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4043 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4044 char s[10] = ".... ....";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4045 int i;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4046 uint8_t octet;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4047 const char *tag;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4048
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4049 /* Break out the octet and the bit number range within it. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4050 octet = msg[((start - 1) >> 3) + 3];
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4051 start = (start - 1) & 7;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4052 end = ((end - 1) & 7) + 1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4053
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4054 /* Edit the bit string for display. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4055 for (i = start; i < end; i++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4056 s[7 - i + ((i < 4) ? 1 : 0)] = (uint8_t) ((octet >> i) & 1) + '0';
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4057
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4058 /* Find the right tag to display. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4059 octet = (uint8_t) ((octet >> start) & ((0xFF + (1 << (end - start))) & 0xFF));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4060 tag = "Invalid";
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4061 for (i = 0; tags[i].str; i++)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4062 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4063 if (octet == tags[i].val)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4064 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4065 tag = tags[i].str;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4066 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4067 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4068 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4069 /* Eh, voila! */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4070 span_log(log, SPAN_LOG_FLOW, " %s= %s: %s\n", s, desc, tag);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4071 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4072 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4073
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4074 void t30_decode_dis_dtc_dcs(t30_state_t *s, const uint8_t *pkt, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4075 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4076 logging_state_t *log;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4077 uint8_t frame_type;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4078 static const value_string_t available_signalling_rate_tags[] =
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4079 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4080 { 0x00, "V.27 ter fall-back mode" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4081 { 0x01, "V.29" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4082 { 0x02, "V.27 ter" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4083 { 0x03, "V.27 ter and V.29" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4084 { 0x0B, "V.27 ter, V.29, and V.17" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4085 { 0x06, "Reserved" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4086 { 0x0A, "Reserved" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4087 { 0x0E, "Reserved" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4088 { 0x0F, "Reserved" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4089 { 0x04, "Not used" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4090 { 0x05, "Not used" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4091 { 0x08, "Not used" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4092 { 0x09, "Not used" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4093 { 0x0C, "Not used" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4094 { 0x0D, "Not used" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4095 { 0x00, NULL }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4096 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4097 static const value_string_t selected_signalling_rate_tags[] =
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4098 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4099 { 0x00, "V.27ter 2400bps" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4100 { 0x01, "V.29, 9600bps" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4101 { 0x02, "V.27ter 4800bps" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4102 { 0x03, "V.29 7200bps" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4103 { 0x08, "V.17 14400bps" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4104 { 0x09, "V.17 9600bps" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4105 { 0x0A, "V.17 12000bps" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4106 { 0x0B, "V.17 7200bps" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4107 { 0x05, "Reserved" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4108 { 0x07, "Reserved" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4109 { 0x0C, "Reserved" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4110 { 0x0D, "Reserved" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4111 { 0x0E, "Reserved" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4112 { 0x0F, "Reserved" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4113 { 0x00, NULL }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4114 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4115 static const value_string_t available_scan_line_length_tags[] =
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4116 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4117 { 0x00, "215 mm +- 1%" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4118 { 0x01, "215 mm +- 1% and 255 mm +- 1%" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4119 { 0x02, "215 mm +- 1% and 255 mm +- 1% and 303 mm +- 1%" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4120 { 0x00, NULL }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4121 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4122 static const value_string_t selected_scan_line_length_tags[] =
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4123 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4124 { 0x00, "215 mm +- 1%" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4125 { 0x01, "255 mm +- 1%" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4126 { 0x02, "303 mm +- 1%" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4127 { 0x00, NULL }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4128 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4129 static const value_string_t available_recording_length_tags[] =
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4130 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4131 { 0x00, "A4 (297 mm)" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4132 { 0x01, "A4 (297 mm) and B4 (364 mm)" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4133 { 0x02, "Unlimited" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4134 { 0x00, NULL }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4135 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4136 static const value_string_t selected_recording_length_tags[] =
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4137 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4138 { 0x00, "A4 (297 mm)" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4139 { 0x01, "B4 (364 mm)" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4140 { 0x02, "Unlimited" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4141 { 0x00, NULL }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4142 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4143 static const value_string_t available_minimum_scan_line_time_tags[] =
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4144 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4145 { 0x00, "20 ms at 3.85 l/mm: T7.7 = T3.85" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4146 { 0x01, "5 ms at 3.85 l/mm: T7.7 = T3.85" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4147 { 0x02, "10 ms at 3.85 l/mm: T7.7 = T3.85" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4148 { 0x03, "20 ms at 3.85 l/mm: T7.7 = 1/2 T3.85" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4149 { 0x04, "40 ms at 3.85 l/mm: T7.7 = T3.85" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4150 { 0x05, "40 ms at 3.85 l/mm: T7.7 = 1/2 T3.85" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4151 { 0x06, "10 ms at 3.85 l/mm: T7.7 = 1/2 T3.85" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4152 { 0x07, "0 ms at 3.85 l/mm: T7.7 = T3.85" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4153 { 0x00, NULL }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4154 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4155 static const value_string_t selected_minimum_scan_line_time_tags[] =
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4156 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4157 { 0x00, "20 ms" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4158 { 0x01, "40 ms" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4159 { 0x02, "10 ms" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4160 { 0x04, "5 ms" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4161 { 0x07, "0 ms" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4162 { 0x00, NULL }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4163 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4164 static const value_string_t shared_data_memory_capacity_tags[] =
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4165 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4166 { 0x00, "Not available" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4167 { 0x01, "Level 2 = 2.0 Mbytes" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4168 { 0x02, "Level 1 = 1.0 Mbytes" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4169 { 0x03, "Level 3 = unlimited (i.e. >= 32 Mbytes)" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4170 { 0x00, NULL }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4171 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4172 static const value_string_t t89_profile_tags[] =
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4173 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4174 { 0x00, "Not used" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4175 { 0x01, "Profiles 2 and 3" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4176 { 0x02, "Profile 2" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4177 { 0x04, "Profile 1" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4178 { 0x06, "Profile 3" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4179 { 0x03, "Reserved" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4180 { 0x05, "Reserved" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4181 { 0x07, "Reserved" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4182 { 0x00, NULL }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4183 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4184 static const value_string_t t44_mixed_raster_content_tags[] =
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4185 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4186 { 0x00, "0" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4187 { 0x01, "1" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4188 { 0x02, "2" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4189 { 0x32, "3" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4190 { 0x04, "4" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4191 { 0x05, "5" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4192 { 0x06, "6" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4193 { 0x07, "7" },
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4194 { 0x00, NULL }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4195 };
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4196
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4197 if (!span_log_test(&s->logging, SPAN_LOG_FLOW))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4198 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4199 frame_type = pkt[2] & 0xFE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4200 log = &s->logging;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4201 if (len <= 2)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4202 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4203 span_log(log, SPAN_LOG_FLOW, " Frame is short\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4204 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4205 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4206
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4207 span_log(log, SPAN_LOG_FLOW, "%s:\n", t30_frametype(pkt[2]));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4208 if (len <= 3)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4209 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4210 span_log(log, SPAN_LOG_FLOW, " Frame is short\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4211 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4212 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4213 octet_bit_field(log, pkt, 1, "Store and forward Internet fax (T.37)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4214 octet_reserved_bit(log, pkt, 2, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4215 octet_bit_field(log, pkt, 3, "Real-time Internet fax (T.38)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4216 octet_bit_field(log, pkt, 4, "3G mobile network", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4217 octet_reserved_bit(log, pkt, 5, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4218 if (frame_type == T30_DCS)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4219 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4220 octet_reserved_bit(log, pkt, 6, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4221 octet_reserved_bit(log, pkt, 7, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4222 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4223 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4224 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4225 octet_bit_field(log, pkt, 6, "V.8 capabilities", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4226 octet_bit_field(log, pkt, 7, "Preferred octets", "64 octets", "256 octets");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4227 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4228 octet_reserved_bit(log, pkt, 8, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4229 if (len <= 4)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4230 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4231 span_log(log, SPAN_LOG_FLOW, " Frame is short\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4232 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4233 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4234
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4235 if (frame_type == T30_DCS)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4236 octet_reserved_bit(log, pkt, 9, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4237 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4238 octet_bit_field(log, pkt, 9, "Ready to transmit a fax document (polling)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4239 octet_bit_field(log, pkt, 10, "Can receive fax", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4240 if (frame_type == T30_DCS)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4241 octet_field(log, pkt, 11, 14, "Selected data signalling rate", selected_signalling_rate_tags);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4242 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4243 octet_field(log, pkt, 11, 14, "Supported data signalling rates", available_signalling_rate_tags);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4244 octet_bit_field(log, pkt, 15, "R8x7.7lines/mm and/or 200x200pels/25.4mm", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4245 octet_bit_field(log, pkt, 16, "2-D coding", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4246 if (len <= 5)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4247 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4248 span_log(log, SPAN_LOG_FLOW, " Frame is short\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4249 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4250 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4251
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4252 if (frame_type == T30_DCS)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4253 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4254 octet_field(log, pkt, 17, 18, "Recording width", selected_scan_line_length_tags);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4255 octet_field(log, pkt, 19, 20, "Recording length", selected_recording_length_tags);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4256 octet_field(log, pkt, 21, 23, "Minimum scan line time", selected_minimum_scan_line_time_tags);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4257 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4258 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4259 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4260 octet_field(log, pkt, 17, 18, "Recording width", available_scan_line_length_tags);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4261 octet_field(log, pkt, 19, 20, "Recording length", available_recording_length_tags);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4262 octet_field(log, pkt, 21, 23, "Receiver's minimum scan line time", available_minimum_scan_line_time_tags);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4263 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4264 octet_bit_field(log, pkt, 24, "Extension indicator", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4265 if (!(pkt[5] & DISBIT8))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4266 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4267 if (len <= 6)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4268 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4269 span_log(log, SPAN_LOG_FLOW, " Frame is short\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4270 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4271 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4272
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4273 octet_reserved_bit(log, pkt, 25, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4274 octet_bit_field(log, pkt, 26, "Compressed/uncompressed mode", "Uncompressed", "Compressed");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4275 octet_bit_field(log, pkt, 27, "Error correction mode (ECM)", "ECM", "Non-ECM");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4276 if (frame_type == T30_DCS)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4277 octet_bit_field(log, pkt, 28, "Frame size", "64 octets", "256 octets");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4278 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4279 octet_reserved_bit(log, pkt, 28, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4280 octet_reserved_bit(log, pkt, 29, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4281 octet_reserved_bit(log, pkt, 30, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4282 octet_bit_field(log, pkt, 31, "T.6 coding", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4283 octet_bit_field(log, pkt, 32, "Extension indicator", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4284 if (!(pkt[6] & DISBIT8))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4285 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4286 if (len <= 7)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4287 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4288 span_log(log, SPAN_LOG_FLOW, " Frame is short\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4289 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4290 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4291
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4292 octet_bit_field(log, pkt, 33, "\"Field not valid\" supported", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4293 if (frame_type == T30_DCS)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4294 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4295 octet_reserved_bit(log, pkt, 34, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4296 octet_reserved_bit(log, pkt, 35, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4297 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4298 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4299 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4300 octet_bit_field(log, pkt, 34, "Multiple selective polling", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4301 octet_bit_field(log, pkt, 35, "Polled subaddress", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4302 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4303 octet_bit_field(log, pkt, 36, "T.43 coding", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4304 octet_bit_field(log, pkt, 37, "Plane interleave", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4305 octet_bit_field(log, pkt, 38, "Voice coding with 32kbit/s ADPCM (Rec. G.726)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4306 octet_bit_field(log, pkt, 39, "Reserved for the use of extended voice coding set", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4307 octet_bit_field(log, pkt, 40, "Extension indicator", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4308 if (!(pkt[7] & DISBIT8))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4309 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4310 if (len <= 8)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4311 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4312 span_log(log, SPAN_LOG_FLOW, " Frame is short\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4313 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4314 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4315
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4316 octet_bit_field(log, pkt, 41, "R8x15.4lines/mm", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4317 octet_bit_field(log, pkt, 42, "300x300pels/25.4mm", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4318 octet_bit_field(log, pkt, 43, "R16x15.4lines/mm and/or 400x400pels/25.4 mm", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4319 if (frame_type == T30_DCS)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4320 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4321 octet_bit_field(log, pkt, 44, "Resolution type selection", "Inch", "Metric");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4322 octet_reserved_bit(log, pkt, 45, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4323 octet_reserved_bit(log, pkt, 46, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4324 octet_reserved_bit(log, pkt, 47, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4325 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4326 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4327 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4328 octet_bit_field(log, pkt, 44, "Inch-based resolution preferred", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4329 octet_bit_field(log, pkt, 45, "Metric-based resolution preferred", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4330 octet_bit_field(log, pkt, 46, "Minimum scan line time for higher resolutions", "T15.4 = 1/2 T7.7", "T15.4 = T7.7");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4331 octet_bit_field(log, pkt, 47, "Selective polling", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4332 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4333 octet_bit_field(log, pkt, 48, "Extension indicator", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4334 if (!(pkt[8] & DISBIT8))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4335 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4336 if (len <= 9)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4337 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4338 span_log(log, SPAN_LOG_FLOW, " Frame is short\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4339 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4340 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4341
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4342 octet_bit_field(log, pkt, 49, "Subaddressing", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4343 if (frame_type == T30_DCS)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4344 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4345 octet_bit_field(log, pkt, 50, "Sender identification transmission", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4346 octet_reserved_bit(log, pkt, 51, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4347 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4348 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4349 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4350 octet_bit_field(log, pkt, 50, "Password", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4351 octet_bit_field(log, pkt, 51, "Ready to transmit a data file (polling)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4352 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4353 octet_reserved_bit(log, pkt, 52, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4354 octet_bit_field(log, pkt, 53, "Binary file transfer (BFT)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4355 octet_bit_field(log, pkt, 54, "Document transfer mode (DTM)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4356 octet_bit_field(log, pkt, 55, "Electronic data interchange (EDI)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4357 octet_bit_field(log, pkt, 56, "Extension indicator", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4358 if (!(pkt[9] & DISBIT8))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4359 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4360 if (len <= 10)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4361 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4362 span_log(log, SPAN_LOG_FLOW, " Frame is short\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4363 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4364 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4365
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4366 octet_bit_field(log, pkt, 57, "Basic transfer mode (BTM)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4367 octet_reserved_bit(log, pkt, 58, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4368 if (frame_type == T30_DCS)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4369 octet_reserved_bit(log, pkt, 59, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4370 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4371 octet_bit_field(log, pkt, 59, "Ready to transfer a character or mixed mode document (polling)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4372 octet_bit_field(log, pkt, 60, "Character mode", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4373 octet_reserved_bit(log, pkt, 61, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4374 octet_bit_field(log, pkt, 62, "Mixed mode (Annex E/T.4)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4375 octet_reserved_bit(log, pkt, 63, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4376 octet_bit_field(log, pkt, 64, "Extension indicator", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4377 if (!(pkt[10] & DISBIT8))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4378 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4379 if (len <= 11)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4380 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4381 span_log(log, SPAN_LOG_FLOW, " Frame is short\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4382 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4383 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4384
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4385 octet_bit_field(log, pkt, 65, "Processable mode 26 (Rec. T.505)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4386 octet_bit_field(log, pkt, 66, "Digital network capability", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4387 octet_bit_field(log, pkt, 67, "Duplex capability", "Full", "Half only");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4388 if (frame_type == T30_DCS)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4389 octet_bit_field(log, pkt, 68, "Full colour mode", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4390 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4391 octet_bit_field(log, pkt, 68, "JPEG coding", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4392 octet_bit_field(log, pkt, 69, "Full colour mode", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4393 if (frame_type == T30_DCS)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4394 octet_bit_field(log, pkt, 70, "Preferred Huffman tables", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4395 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4396 octet_reserved_bit(log, pkt, 70, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4397 octet_bit_field(log, pkt, 71, "12bits/pel component", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4398 octet_bit_field(log, pkt, 72, "Extension indicator", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4399 if (!(pkt[11] & DISBIT8))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4400 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4401 if (len <= 12)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4402 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4403 span_log(log, SPAN_LOG_FLOW, " Frame is short\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4404 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4405 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4406
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4407 octet_bit_field(log, pkt, 73, "No subsampling (1:1:1)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4408 octet_bit_field(log, pkt, 74, "Custom illuminant", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4409 octet_bit_field(log, pkt, 75, "Custom gamut range", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4410 octet_bit_field(log, pkt, 76, "North American Letter (215.9mm x 279.4mm)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4411 octet_bit_field(log, pkt, 77, "North American Legal (215.9mm x 355.6mm)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4412 octet_bit_field(log, pkt, 78, "Single-progression sequential coding (Rec. T.85) basic", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4413 octet_bit_field(log, pkt, 79, "Single-progression sequential coding (Rec. T.85) optional L0", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4414 octet_bit_field(log, pkt, 80, "Extension indicator", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4415 if (!(pkt[12] & DISBIT8))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4416 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4417 if (len <= 13)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4418 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4419 span_log(log, SPAN_LOG_FLOW, " Frame is short\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4420 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4421 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4422
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4423 octet_bit_field(log, pkt, 81, "HKM key management", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4424 octet_bit_field(log, pkt, 82, "RSA key management", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4425 octet_bit_field(log, pkt, 83, "Override", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4426 octet_bit_field(log, pkt, 84, "HFX40 cipher", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4427 octet_bit_field(log, pkt, 85, "Alternative cipher number 2", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4428 octet_bit_field(log, pkt, 86, "Alternative cipher number 3", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4429 octet_bit_field(log, pkt, 87, "HFX40-I hashing", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4430 octet_bit_field(log, pkt, 88, "Extension indicator", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4431 if (!(pkt[13] & DISBIT8))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4432 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4433 if (len <= 14)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4434 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4435 span_log(log, SPAN_LOG_FLOW, " Frame is short\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4436 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4437 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4438
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4439 octet_bit_field(log, pkt, 89, "Alternative hashing system 2", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4440 octet_bit_field(log, pkt, 90, "Alternative hashing system 3", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4441 octet_bit_field(log, pkt, 91, "Reserved for future security features", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4442 octet_field(log, pkt, 92, 94, "T.44 (Mixed Raster Content)", t44_mixed_raster_content_tags);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4443 octet_bit_field(log, pkt, 95, "Page length maximum stripe size for T.44 (Mixed Raster Content)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4444 octet_bit_field(log, pkt, 96, "Extension indicator", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4445 if (!(pkt[14] & DISBIT8))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4446 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4447 if (len <= 15)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4448 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4449 span_log(log, SPAN_LOG_FLOW, " Frame is short\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4450 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4451 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4452
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4453 octet_bit_field(log, pkt, 97, "Colour/gray-scale 300pels/25.4mm x 300lines/25.4mm or 400pels/25.4mm x 400lines/25.4mm resolution", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4454 octet_bit_field(log, pkt, 98, "100pels/25.4mm x 100lines/25.4mm for colour/gray scale", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4455 octet_bit_field(log, pkt, 99, "Simple phase C BFT negotiations", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4456 if (frame_type == T30_DCS)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4457 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4458 octet_reserved_bit(log, pkt, 100, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4459 octet_reserved_bit(log, pkt, 101, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4460 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4461 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4462 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4463 octet_bit_field(log, pkt, 100, "Extended BFT Negotiations capable", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4464 octet_bit_field(log, pkt, 101, "Internet Selective Polling address (ISP)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4465 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4466 octet_bit_field(log, pkt, 102, "Internet Routing Address (IRA)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4467 octet_reserved_bit(log, pkt, 103, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4468 octet_bit_field(log, pkt, 104, "Extension indicator", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4469 if (!(pkt[15] & DISBIT8))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4470 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4471 if (len <= 16)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4472 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4473 span_log(log, SPAN_LOG_FLOW, " Frame is short\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4474 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4475 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4476
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4477 octet_bit_field(log, pkt, 105, "600pels/25.4mm x 600lines/25.4mm", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4478 octet_bit_field(log, pkt, 106, "1200pels/25.4mm x 1200lines/25.4mm", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4479 octet_bit_field(log, pkt, 107, "300pels/25.4mm x 600lines/25.4mm", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4480 octet_bit_field(log, pkt, 108, "400pels/25.4mm x 800lines/25.4mm", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4481 octet_bit_field(log, pkt, 109, "600pels/25.4mm x 1200lines/25.4mm", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4482 octet_bit_field(log, pkt, 110, "Colour/gray scale 600pels/25.4mm x 600lines/25.4mm", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4483 octet_bit_field(log, pkt, 111, "Colour/gray scale 1200pels/25.4mm x 1200lines/25.4mm", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4484 octet_bit_field(log, pkt, 112, "Extension indicator", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4485 if (!(pkt[16] & DISBIT8))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4486 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4487 if (len <= 17)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4488 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4489 span_log(log, SPAN_LOG_FLOW, " Frame is short\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4490 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4491 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4492
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4493 octet_bit_field(log, pkt, 113, "Double sided printing capability (alternate mode)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4494 octet_bit_field(log, pkt, 114, "Double sided printing capability (continuous mode)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4495 if (frame_type == T30_DCS)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4496 octet_bit_field(log, pkt, 115, "Black and white mixed raster content profile (MRCbw)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4497 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4498 octet_reserved_bit(log, pkt, 115, 0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4499 octet_bit_field(log, pkt, 116, "T.45 (run length colour encoded)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4500 octet_field(log, pkt, 117, 118, "Shared memory", shared_data_memory_capacity_tags);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4501 octet_bit_field(log, pkt, 119, "T.44 colour space", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4502 octet_bit_field(log, pkt, 120, "Extension indicator", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4503 if (!(pkt[17] & DISBIT8))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4504 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4505 if (len <= 18)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4506 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4507 span_log(log, SPAN_LOG_FLOW, " Frame is short\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4508 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4509 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4510
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4511 octet_bit_field(log, pkt, 121, "Flow control capability for T.38 communication", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4512 octet_bit_field(log, pkt, 122, "K>4", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4513 octet_bit_field(log, pkt, 123, "Internet aware T.38 mode fax (not affected by data signal rate bits)", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4514 octet_field(log, pkt, 124, 126, "T.89 (Application profiles for ITU-T Rec T.8)", t89_profile_tags);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4515 octet_bit_field(log, pkt, 127, "sYCC-JPEG coding", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4516 octet_bit_field(log, pkt, 128, "Extension indicator", NULL, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4517 if (!(pkt[18] & DISBIT8))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4518 return;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4519
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4520 span_log(log, SPAN_LOG_FLOW, " Extended beyond the current T.30 specification!\n");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4521 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4522 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4523
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4524 int t30_restart(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4525 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4526 s->phase = T30_PHASE_IDLE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4527 s->next_phase = T30_PHASE_IDLE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4528 s->current_fallback = 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4529 s->rx_signal_present = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4530 s->rx_trained = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4531 s->current_status = T30_ERR_OK;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4532 build_dis_or_dtc(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4533 if (s->calling_party)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4534 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4535 set_state(s, T30_STATE_T);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4536 set_phase(s, T30_PHASE_A_CNG);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4537 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4538 else
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4539 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4540 set_state(s, T30_STATE_ANSWERING);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4541 set_phase(s, T30_PHASE_A_CED);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4542 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4543 s->far_end_detected = FALSE;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4544 s->timer_t0_t1 = ms_to_samples(DEFAULT_TIMER_T0);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4545 return 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4546 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4547 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4548
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4549 int t30_init(t30_state_t *s,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4550 int calling_party,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4551 t30_set_handler_t *set_rx_type_handler,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4552 void *set_rx_type_user_data,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4553 t30_set_handler_t *set_tx_type_handler,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4554 void *set_tx_type_user_data,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4555 t30_send_hdlc_handler_t *send_hdlc_handler,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4556 void *send_hdlc_user_data)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4557 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4558 memset(s, 0, sizeof(*s));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4559 s->calling_party = calling_party;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4560 s->set_rx_type_handler = set_rx_type_handler;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4561 s->set_rx_type_user_data = set_rx_type_user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4562 s->set_tx_type_handler = set_tx_type_handler;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4563 s->set_tx_type_user_data = set_tx_type_user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4564 s->send_hdlc_handler = send_hdlc_handler;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4565 s->send_hdlc_user_data = send_hdlc_user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4566
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4567 /* Default to the basic modems. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4568 s->supported_modems = T30_SUPPORT_V27TER | T30_SUPPORT_V29;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4569 s->supported_compressions = T30_SUPPORT_T4_1D_COMPRESSION | T30_SUPPORT_T4_2D_COMPRESSION;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4570 s->supported_resolutions = T30_SUPPORT_STANDARD_RESOLUTION | T30_SUPPORT_FINE_RESOLUTION | T30_SUPPORT_SUPERFINE_RESOLUTION
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4571 | T30_SUPPORT_R8_RESOLUTION;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4572 s->supported_image_sizes = T30_SUPPORT_US_LETTER_LENGTH | T30_SUPPORT_US_LEGAL_LENGTH | T30_SUPPORT_UNLIMITED_LENGTH
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4573 | T30_SUPPORT_215MM_WIDTH;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4574 span_log_init(&s->logging, SPAN_LOG_NONE, NULL);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4575 span_log_set_protocol(&s->logging, "T.30");
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4576 t30_restart(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4577 return 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4578 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4579 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4580
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4581 void t30_release(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4582 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4583 /* Make sure any FAX in progress is tidied up. If the tidying up has
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4584 already happened, repeating it here is harmless. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4585 t4_rx_end(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4586 t4_tx_end(&(s->t4));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4587 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4588 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4589
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4590 t30_state_t *t30_create(int calling_party,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4591 t30_set_handler_t *set_rx_type_handler,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4592 void *set_rx_type_user_data,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4593 t30_set_handler_t *set_tx_type_handler,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4594 void *set_tx_type_user_data,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4595 t30_send_hdlc_handler_t *send_hdlc_handler,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4596 void *send_hdlc_user_data)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4597 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4598 t30_state_t *s;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4599
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4600 if ((s = (t30_state_t *) malloc(sizeof(t30_state_t))) == NULL)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4601 return NULL;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4602 if (t30_init(s,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4603 calling_party,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4604 set_rx_type_handler,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4605 set_rx_type_user_data,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4606 set_tx_type_handler,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4607 set_tx_type_user_data,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4608 send_hdlc_handler,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4609 send_hdlc_user_data))
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4610 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4611 free(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4612 return NULL;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4613 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4614 return s;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4615 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4616 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4617
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4618 void t30_free(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4619 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4620 t30_release(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4621 free(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4622 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4623 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4624
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4625 void t30_terminate(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4626 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4627 if (s->phase != T30_PHASE_CALL_FINISHED)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4628 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4629 /* The far end disconnected early, but was it just a tiny bit too early,
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4630 as we were just tidying up, or seriously early as in a failure? */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4631 switch (s->state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4632 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4633 case T30_STATE_C:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4634 /* We were sending the final disconnect, so just hussle things along. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4635 disconnect(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4636 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4637 case T30_STATE_B:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4638 /* We were in the final wait for everything to flush through, so just
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4639 hussle things along. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4640 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4641 default:
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4642 /* The call terminated prematurely. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4643 s->current_status = T30_ERR_CALLDROPPED;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4644 break;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4645 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4646 if (s->phase_e_handler)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4647 s->phase_e_handler(s, s->phase_e_user_data, s->current_status);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4648 set_state(s, T30_STATE_CALL_FINISHED);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4649 set_phase(s, T30_PHASE_CALL_FINISHED);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4650 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4651 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4652 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4653
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4654 void t30_set_iaf_mode(t30_state_t *s, int iaf)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4655 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4656 s->iaf = iaf;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4657 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4658 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4659
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4660 int t30_set_header_info(t30_state_t *s, const char *info)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4661 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4662 if (info == NULL)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4663 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4664 s->header_info[0] = '\0';
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4665 return 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4666 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4667 if (strlen(info) > 50)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4668 return -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4669 strcpy(s->header_info, info);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4670 t4_tx_set_header_info(&(s->t4), s->header_info);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4671 return 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4672 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4673 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4674
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4675 int t30_set_local_ident(t30_state_t *s, const char *id)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4676 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4677 if (id == NULL)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4678 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4679 s->local_ident[0] = '\0';
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4680 return 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4681 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4682 if (strlen(id) > 20)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4683 return -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4684 strcpy(s->local_ident, id);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4685 t4_tx_set_local_ident(&(s->t4), s->local_ident);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4686 return 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4687 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4688 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4689
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4690 int t30_set_local_nsf(t30_state_t *s, const uint8_t *nsf, int len)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4691 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4692 if (len > 100)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4693 return -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4694 memcpy(s->local_nsf, nsf, len);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4695 s->local_nsf_len = len;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4696 return 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4697 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4698 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4699
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4700 int t30_set_local_sub_address(t30_state_t *s, const char *sub_address)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4701 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4702 if (sub_address == NULL)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4703 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4704 s->local_sub_address[0] = '\0';
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4705 return 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4706 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4707 if (strlen(sub_address) > 20)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4708 return -1;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4709 strcpy(s->local_sub_address, sub_address);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4710 return 0;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4711 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4712 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4713
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4714 size_t t30_get_sub_address(t30_state_t *s, char *sub_address)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4715 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4716 if (sub_address)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4717 strcpy(sub_address, s->far_sub_address);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4718 return strlen(s->far_sub_address);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4719 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4720 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4721
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4722 size_t t30_get_header_info(t30_state_t *s, char *info)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4723 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4724 if (info)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4725 strcpy(info, s->header_info);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4726 return strlen(s->header_info);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4727 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4728 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4729
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4730 size_t t30_get_local_ident(t30_state_t *s, char *id)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4731 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4732 if (id)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4733 strcpy(id, s->local_ident);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4734 return strlen(s->local_ident);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4735 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4736 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4737
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4738 size_t t30_get_far_ident(t30_state_t *s, char *id)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4739 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4740 if (id)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4741 strcpy(id, s->far_ident);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4742 return strlen(s->far_ident);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4743 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4744 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4745
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4746 const char *t30_get_far_country(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4747 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4748 return s->country;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4749 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4750 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4751
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4752 const char *t30_get_far_vendor(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4753 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4754 return s->vendor;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4755 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4756 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4757
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4758 const char *t30_get_far_model(t30_state_t *s)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4759 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4760 return s->model;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4761 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4762 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4763
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4764 void t30_get_transfer_statistics(t30_state_t *s, t30_stats_t *t)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4765 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4766 t4_stats_t stats;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4767
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4768 t->bit_rate = fallback_sequence[s->current_fallback].bit_rate;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4769 t->error_correcting_mode = s->error_correcting_mode;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4770 t4_get_transfer_statistics(&(s->t4), &stats);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4771 t->pages_transferred = stats.pages_transferred;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4772 t->width = stats.width;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4773 t->length = stats.length;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4774 t->bad_rows = stats.bad_rows;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4775 t->longest_bad_row_run = stats.longest_bad_row_run;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4776 t->x_resolution = stats.x_resolution;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4777 t->y_resolution = stats.y_resolution;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4778 t->encoding = stats.encoding;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4779 t->image_size = stats.image_size;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4780 t->current_status = s->current_status;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4781 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4782 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4783
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4784 void t30_set_phase_b_handler(t30_state_t *s, t30_phase_b_handler_t *handler, void *user_data)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4785 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4786 s->phase_b_handler = handler;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4787 s->phase_b_user_data = user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4788 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4789 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4790
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4791 void t30_set_phase_d_handler(t30_state_t *s, t30_phase_d_handler_t *handler, void *user_data)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4792 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4793 s->phase_d_handler = handler;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4794 s->phase_d_user_data = user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4795 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4796 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4797
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4798 void t30_set_phase_e_handler(t30_state_t *s, t30_phase_e_handler_t *handler, void *user_data)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4799 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4800 s->phase_e_handler = handler;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4801 s->phase_e_user_data = user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4802 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4803 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4804
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4805 void t30_set_document_handler(t30_state_t *s, t30_document_handler_t *handler, void *user_data)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4806 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4807 s->document_handler = handler;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4808 s->document_user_data = user_data;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4809 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4810 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4811
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4812 void t30_set_rx_file(t30_state_t *s, const char *file, int stop_page)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4813 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4814 strncpy(s->rx_file, file, sizeof(s->rx_file));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4815 s->rx_file[sizeof(s->rx_file) - 1] = '\0';
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4816 s->rx_stop_page = stop_page;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4817 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4818 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4819
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4820 void t30_set_tx_file(t30_state_t *s, const char *file, int start_page, int stop_page)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4821 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4822 strncpy(s->tx_file, file, sizeof(s->tx_file));
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4823 s->tx_file[sizeof(s->tx_file) - 1] = '\0';
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4824 s->tx_start_page = start_page;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4825 s->tx_stop_page = stop_page;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4826 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4827 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4828
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4829 void t30_set_supported_modems(t30_state_t *s, int supported_modems)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4830 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4831 s->supported_modems = supported_modems;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4832 build_dis_or_dtc(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4833 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4834 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4835
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4836 void t30_set_supported_compressions(t30_state_t *s, int supported_compressions)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4837 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4838 s->supported_compressions = supported_compressions;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4839 build_dis_or_dtc(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4840 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4841 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4842
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4843 void t30_set_supported_resolutions(t30_state_t *s, int supported_resolutions)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4844 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4845 s->supported_resolutions = supported_resolutions;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4846 build_dis_or_dtc(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4847 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4848 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4849
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4850 void t30_set_supported_image_sizes(t30_state_t *s, int supported_image_sizes)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4851 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4852 s->supported_image_sizes = supported_image_sizes;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4853 build_dis_or_dtc(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4854 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4855 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4856
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4857 void t30_set_ecm_capability(t30_state_t *s, int enabled)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4858 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4859 s->ecm_allowed = enabled;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4860 build_dis_or_dtc(s);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4861 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4862 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4863
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4864 void t30_local_interrupt_request(t30_state_t *s, int state)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4865 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4866 if (s->timer_t3 > 0)
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4867 {
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4868 /* Accept the far end's outstanding request for interrupt. */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4869 /* TODO: */
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4870 send_simple_frame(s, (state) ? T30_PIP : T30_PIN);
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4871 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4872 s->local_interrupt_pending = state;
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4873 }
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4874 /*- End of function --------------------------------------------------------*/
f762bf195c4b import spandsp-0.0.3
Peter Meerwald <pmeerw@cosy.sbg.ac.at>
parents:
diff changeset
4875 /*- End of file ------------------------------------------------------------*/

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