audiostuff: spandsp-0.0.6pre17/src/t31.c annotate

annotate spandsp-0.0.6pre17/src/t31.c @ 6:22a74b01a099 default tip

implement more meaningful test program

author	Peter Meerwald <pmeerw@cosy.sbg.ac.at>
date	Fri, 25 Jun 2010 16:14:50 +0200
parents	26cd8f1ef0b1
children

rev	line source
4 26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1 /*
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2 * SpanDSP - a series of DSP components for telephony
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	3 *
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	4 * t31.c - A T.31 compatible class 1 FAX modem interface.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	5 *
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	6 * Written by Steve Underwood <steveu@coppice.org>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	7 *
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	8 * Special thanks to Lee Howard <faxguy@howardsilvan.com>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	9 * for his great work debugging and polishing this code.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	10 *
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	11 * Copyright (C) 2004, 2005, 2006, 2008 Steve Underwood
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	12 *
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	13 * All rights reserved.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	14 *
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	15 * This program is free software; you can redistribute it and/or modify
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	16 * it under the terms of the GNU Lesser General Public License version 2.1,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	17 * as published by the Free Software Foundation.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	18 *
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	19 * This program is distributed in the hope that it will be useful,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	22 * GNU Lesser General Public License for more details.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	23 *
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	24 * You should have received a copy of the GNU Lesser General Public
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	25 * License along with this program; if not, write to the Free Software
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	26 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	27 *
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	28 * $Id: t31.c,v 1.155.4.1 2009/12/19 10:44:10 steveu Exp $
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	29 */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	30
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	31 /! \file /
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	32
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	33 #if defined(HAVE_CONFIG_H)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	34 #include "config.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	35 #endif
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	36
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	37 #include <inttypes.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	38 #include <stdlib.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	39 #include <stdio.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	40 #include <fcntl.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	41 #include <time.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	42 #include <memory.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	43 #include <string.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	44 #include <ctype.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	45 #if defined(HAVE_TGMATH_H)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	46 #include <tgmath.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	47 #endif
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	48 #if defined(HAVE_MATH_H)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	49 #include <math.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	50 #endif
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	51 #include "floating_fudge.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	52 #include <assert.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	53 #include <tiffio.h>
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	54
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	55 #include "spandsp/telephony.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	56 #include "spandsp/logging.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	57 #include "spandsp/bit_operations.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	58 #include "spandsp/dc_restore.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	59 #include "spandsp/queue.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	60 #include "spandsp/power_meter.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	61 #include "spandsp/complex.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	62 #include "spandsp/tone_detect.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	63 #include "spandsp/tone_generate.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	64 #include "spandsp/async.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	65 #include "spandsp/crc.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	66 #include "spandsp/hdlc.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	67 #include "spandsp/silence_gen.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	68 #include "spandsp/fsk.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	69 #include "spandsp/v29tx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	70 #include "spandsp/v29rx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	71 #include "spandsp/v27ter_tx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	72 #include "spandsp/v27ter_rx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	73 #include "spandsp/v17tx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	74 #include "spandsp/v17rx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	75 #include "spandsp/super_tone_rx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	76 #include "spandsp/modem_connect_tones.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	77 #include "spandsp/t4_rx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	78 #include "spandsp/t4_tx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	79 #include "spandsp/t30.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	80 #include "spandsp/t30_logging.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	81 #include "spandsp/t38_core.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	82
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	83 #include "spandsp/at_interpreter.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	84 #include "spandsp/fax_modems.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	85 #include "spandsp/t31.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	86 #include "spandsp/t30_fcf.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	87
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	88 #include "spandsp/private/logging.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	89 #include "spandsp/private/t38_core.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	90 #include "spandsp/private/silence_gen.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	91 #include "spandsp/private/fsk.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	92 #include "spandsp/private/v17tx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	93 #include "spandsp/private/v17rx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	94 #include "spandsp/private/v27ter_tx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	95 #include "spandsp/private/v27ter_rx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	96 #include "spandsp/private/v29tx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	97 #include "spandsp/private/v29rx.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	98 #include "spandsp/private/modem_connect_tones.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	99 #include "spandsp/private/hdlc.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	100 #include "spandsp/private/fax_modems.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	101 #include "spandsp/private/at_interpreter.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	102 #include "spandsp/private/t31.h"
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	103
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	104 /* Settings suitable for paced transmission over a UDP transport */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	105 /! The default number of milliseconds per transmitted IFP when sending bulk T.38 data /
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	106 #define MS_PER_TX_CHUNK 30
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	107 /! The number of transmissions of indicator IFP packets /
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	108 #define INDICATOR_TX_COUNT 3
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	109 /! The number of transmissions of data IFP packets /
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	110 #define DATA_TX_COUNT 1
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	111 /! The number of transmissions of terminating data IFP packets /
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	112 #define DATA_END_TX_COUNT 3
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	113 /! The default DTE timeout, in seconds /
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	114 #define DEFAULT_DTE_TIMEOUT 5
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	115
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	116 /* Settings suitable for unpaced transmission over a TCP transport */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	117 #define MAX_OCTETS_PER_UNPACED_CHUNK 300
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	118
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	119 /* Backstop timeout if reception of packets stops in the middle of a burst */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	120 #define MID_RX_TIMEOUT 15000
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	121
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	122 #define HDLC_FRAMING_OK_THRESHOLD 5
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	123
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	124 typedef const char (at_cmd_service_t)(t31_state_t s, const char cmd);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	125
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	126 enum
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	127 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	128 ETX = 0x03,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	129 DLE = 0x10,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	130 SUB = 0x1A
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	131 };
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	132
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	133 enum
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	134 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	135 DISBIT1 = 0x01,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	136 DISBIT2 = 0x02,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	137 DISBIT3 = 0x04,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	138 DISBIT4 = 0x08,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	139 DISBIT5 = 0x10,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	140 DISBIT6 = 0x20,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	141 DISBIT7 = 0x40,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	142 DISBIT8 = 0x80
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	143 };
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	144
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	145 enum
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	146 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	147 T38_CHUNKING_MERGE_FCS_WITH_DATA = 0x0001,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	148 T38_CHUNKING_WHOLE_FRAMES = 0x0002,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	149 T38_CHUNKING_ALLOW_TEP_TIME = 0x0004
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	150 };
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	151
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	152 enum
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	153 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	154 T38_TIMED_STEP_NONE = 0,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	155 T38_TIMED_STEP_NON_ECM_MODEM = 0x10,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	156 T38_TIMED_STEP_NON_ECM_MODEM_2 = 0x11,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	157 T38_TIMED_STEP_NON_ECM_MODEM_3 = 0x12,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	158 T38_TIMED_STEP_NON_ECM_MODEM_4 = 0x13,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	159 T38_TIMED_STEP_NON_ECM_MODEM_5 = 0x14,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	160 T38_TIMED_STEP_HDLC_MODEM = 0x20,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	161 T38_TIMED_STEP_HDLC_MODEM_2 = 0x21,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	162 T38_TIMED_STEP_HDLC_MODEM_3 = 0x22,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	163 T38_TIMED_STEP_HDLC_MODEM_4 = 0x23,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	164 T38_TIMED_STEP_HDLC_MODEM_5 = 0x24,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	165 T38_TIMED_STEP_FAKE_HDLC_MODEM = 0x30,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	166 T38_TIMED_STEP_FAKE_HDLC_MODEM_2 = 0x31,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	167 T38_TIMED_STEP_FAKE_HDLC_MODEM_3 = 0x32,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	168 T38_TIMED_STEP_FAKE_HDLC_MODEM_4 = 0x33,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	169 T38_TIMED_STEP_FAKE_HDLC_MODEM_5 = 0x34,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	170 T38_TIMED_STEP_CED = 0x40,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	171 T38_TIMED_STEP_CED_2 = 0x41,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	172 T38_TIMED_STEP_CED_3 = 0x42,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	173 T38_TIMED_STEP_CNG = 0x50,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	174 T38_TIMED_STEP_CNG_2 = 0x51,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	175 T38_TIMED_STEP_PAUSE = 0x60
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	176 };
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	177
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	178 static int restart_modem(t31_state_t *s, int new_modem);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	179 static void hdlc_accept_frame(void user_data, const uint8_t msg, int len, int ok);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	180 static void set_rx_handler(t31_state_t s, span_rx_handler_t rx_handler, span_rx_fillin_handler_t fillin_handler, void user_data);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	181 static void set_tx_handler(t31_state_t s, span_tx_handler_t handler, void *user_data);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	182 static void set_next_tx_handler(t31_state_t s, span_tx_handler_t handler, void *user_data);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	183 static int v17_v21_rx(void *user_data, const int16_t amp[], int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	184 static int v17_v21_rx_fillin(void *user_data, int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	185 static int v27ter_v21_rx(void *user_data, const int16_t amp[], int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	186 static int v27ter_v21_rx_fillin(void *user_data, int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	187 static int v29_v21_rx(void *user_data, const int16_t amp[], int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	188 static int v29_v21_rx_fillin(void *user_data, int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	189 static int silence_rx(void *user_data, const int16_t amp[], int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	190 static int cng_rx(void *user_data, const int16_t amp[], int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	191 static void non_ecm_put_bit(void *user_data, int bit);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	192 static void non_ecm_put_chunk(void *user_data, const uint8_t buf[], int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	193 static int non_ecm_get_chunk(void *user_data, uint8_t buf[], int len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	194 static void non_ecm_rx_status(void *user_data, int status);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	195 static void hdlc_rx_status(void *user_data, int status);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	196
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	197 static __inline__ void t31_set_at_rx_mode(t31_state_t *s, int new_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	198 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	199 s->at_state.at_rx_mode = new_mode;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	200 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	201 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	202
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	203 #if 0
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	204 static void monitor_control_messages(t31_state_t s, const uint8_t buf, int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	205 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	206 /* Monitor the control messages, at the point where we have the whole message, so we can
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	207 see what is happening to things like training success/failure. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	208 span_log(&s->logging, SPAN_LOG_FLOW, "Monitoring %s\n", t30_frametype(buf[2]));
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	209 if (len < 3)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	210 return;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	211 /endif/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	212 switch (buf[2])
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	213 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	214 case T30_DCS:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	215 case T30_DCS \| 1:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	216 /* We need to know if ECM is about to be used, so we can fake HDLC stuff. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	217 s->t38_fe.ecm_mode = (len >= 7) && (buf[6] & DISBIT3);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	218 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	219 default:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	220 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	221 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	222 /endswitch/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	223 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	224 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	225 #endif
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	226
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	227 static void front_end_status(t31_state_t *s, int status)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	228 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	229 span_log(&s->logging, SPAN_LOG_FLOW, "Front end status %d\n", status);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	230 switch (status)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	231 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	232 case T30_FRONT_END_SEND_STEP_COMPLETE:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	233 switch (s->modem)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	234 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	235 case FAX_MODEM_SILENCE_TX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	236 s->modem = FAX_MODEM_NONE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	237 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_OK);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	238 if (s->at_state.do_hangup)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	239 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	240 at_modem_control(&s->at_state, AT_MODEM_CONTROL_HANGUP, NULL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	241 t31_set_at_rx_mode(s, AT_MODE_ONHOOK_COMMAND);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	242 s->at_state.do_hangup = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	243 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	244 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	245 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	246 t31_set_at_rx_mode(s, AT_MODE_OFFHOOK_COMMAND);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	247 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	248 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	249 case FAX_MODEM_CED_TONE:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	250 /* Go directly to V.21/HDLC transmit. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	251 s->modem = FAX_MODEM_NONE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	252 restart_modem(s, FAX_MODEM_V21_TX);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	253 t31_set_at_rx_mode(s, AT_MODE_HDLC);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	254 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	255 case FAX_MODEM_V21_TX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	256 case FAX_MODEM_V17_TX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	257 case FAX_MODEM_V27TER_TX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	258 case FAX_MODEM_V29_TX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	259 s->modem = FAX_MODEM_NONE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	260 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_OK);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	261 t31_set_at_rx_mode(s, AT_MODE_OFFHOOK_COMMAND);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	262 restart_modem(s, FAX_MODEM_SILENCE_TX);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	263 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	264 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	265 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	266 case T30_FRONT_END_RECEIVE_COMPLETE:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	267 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	268 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	269 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	270 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	271
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	272 static int extra_bits_in_stuffed_frame(const uint8_t buf[], int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	273 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	274 int bitstream;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	275 int ones;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	276 int stuffed;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	277 int i;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	278 int j;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	279
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	280 bitstream = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	281 ones = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	282 stuffed = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	283 /* We should really append the CRC, and include the stuffed bits for that, to get
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	284 the exact number of bits in the frame. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	285 //len = crc_itu16_append(buf, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	286 for (i = 0; i < len; i++)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	287 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	288 bitstream = buf[i];
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	289 for (j = 0; j < 8; j++)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	290 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	291 if ((bitstream & 1))
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	292 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	293 if (++ones >= 5)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	294 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	295 ones = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	296 stuffed++;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	297 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	298 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	299 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	300 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	301 ones = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	302 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	303 bitstream >>= 1;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	304 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	305 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	306 /* The total length of the frame is:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	307 the number of bits in the body
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	308 + the number of additional bits in the body due to stuffing
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	309 + the number of bits in the CRC
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	310 + the number of additional bits in the CRC due to stuffing
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	311 + 16 bits for the two terminating flag octets.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	312 Lets just allow 3 bits for the CRC, which is the worst case. It
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	313 avoids calculating the real CRC, and the worst it can do is cause
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	314 a flag octet's worth of additional output.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	315 */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	316 return stuffed + 16 + 3 + 16;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	317 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	318 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	319
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	320 static int process_rx_missing(t38_core_state_t t, void user_data, int rx_seq_no, int expected_seq_no)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	321 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	322 t31_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	323
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	324 s = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	325 s->t38_fe.rx_data_missing = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	326 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	327 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	328 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	329
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	330 static int process_rx_indicator(t38_core_state_t t, void user_data, int indicator)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	331 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	332 t31_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	333 t31_t38_front_end_state_t *fe;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	334
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	335 s = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	336 fe = &s->t38_fe;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	337
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	338 if (t->current_rx_indicator == indicator)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	339 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	340 /* This is probably due to the far end repeating itself, or slipping
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	341 preamble messages in between HDLC frames. T.38/V.1.3 tells us to
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	342 ignore it. Its harmless. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	343 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	344 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	345 /* In termination mode we don't care very much about indicators telling us training
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	346 is starting. We only care about V.21 preamble starting, for timeout control, and
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	347 the actual data. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	348 switch (indicator)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	349 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	350 case T38_IND_NO_SIGNAL:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	351 if (t->current_rx_indicator == T38_IND_V21_PREAMBLE
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	352 &&
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	353 (fe->current_rx_type == T30_MODEM_V21 \|\| fe->current_rx_type == T30_MODEM_CNG))
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	354 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	355 hdlc_rx_status(s, SIG_STATUS_CARRIER_DOWN);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	356 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	357 fe->timeout_rx_samples = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	358 front_end_status(s, T30_FRONT_END_SIGNAL_ABSENT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	359 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	360 case T38_IND_CNG:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	361 front_end_status(s, T30_FRONT_END_CNG_PRESENT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	362 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	363 case T38_IND_CED:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	364 front_end_status(s, T30_FRONT_END_CED_PRESENT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	365 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	366 case T38_IND_V21_PREAMBLE:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	367 /* Some T.38 implementations insert these preamble indicators between HDLC frames, so
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	368 we need to be tolerant of that. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	369 fe->timeout_rx_samples = fe->samples + ms_to_samples(MID_RX_TIMEOUT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	370 front_end_status(s, T30_FRONT_END_SIGNAL_PRESENT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	371 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	372 case T38_IND_V27TER_2400_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	373 case T38_IND_V27TER_4800_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	374 case T38_IND_V29_7200_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	375 case T38_IND_V29_9600_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	376 case T38_IND_V17_7200_SHORT_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	377 case T38_IND_V17_7200_LONG_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	378 case T38_IND_V17_9600_SHORT_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	379 case T38_IND_V17_9600_LONG_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	380 case T38_IND_V17_12000_SHORT_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	381 case T38_IND_V17_12000_LONG_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	382 case T38_IND_V17_14400_SHORT_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	383 case T38_IND_V17_14400_LONG_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	384 case T38_IND_V33_12000_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	385 case T38_IND_V33_14400_TRAINING:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	386 /* We really don't care what kind of modem is delivering the following image data.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	387 We only care that some kind of fast modem signal is coming next. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	388 fe->timeout_rx_samples = fe->samples + ms_to_samples(MID_RX_TIMEOUT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	389 front_end_status(s, T30_FRONT_END_SIGNAL_PRESENT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	390 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	391 case T38_IND_V8_ANSAM:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	392 case T38_IND_V8_SIGNAL:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	393 case T38_IND_V34_CNTL_CHANNEL_1200:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	394 case T38_IND_V34_PRI_CHANNEL:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	395 case T38_IND_V34_CC_RETRAIN:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	396 /* V.34 support is a work in progress. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	397 front_end_status(s, T30_FRONT_END_SIGNAL_PRESENT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	398 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	399 default:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	400 front_end_status(s, T30_FRONT_END_SIGNAL_ABSENT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	401 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	402 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	403 fe->hdlc_rx.len = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	404 fe->rx_data_missing = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	405 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	406 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	407 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	408
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	409 static int process_rx_data(t38_core_state_t t, void user_data, int data_type, int field_type, const uint8_t *buf, int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	410 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	411 t31_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	412 t31_t38_front_end_state_t *fe;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	413 #if defined(_MSC_VER)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	414 uint8_t buf2 = (uint8_t ) _alloca(len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	415 #else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	416 uint8_t buf2[len];
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	417 #endif
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	418
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	419 s = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	420 fe = &s->t38_fe;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	421 #if 0
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	422 /* In termination mode we don't care very much what the data type is. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	423 switch (data_type)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	424 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	425 case T38_DATA_V21:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	426 case T38_DATA_V27TER_2400:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	427 case T38_DATA_V27TER_4800:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	428 case T38_DATA_V29_7200:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	429 case T38_DATA_V29_9600:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	430 case T38_DATA_V17_7200:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	431 case T38_DATA_V17_9600:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	432 case T38_DATA_V17_12000:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	433 case T38_DATA_V17_14400:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	434 case T38_DATA_V8:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	435 case T38_DATA_V34_PRI_RATE:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	436 case T38_DATA_V34_CC_1200:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	437 case T38_DATA_V34_PRI_CH:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	438 case T38_DATA_V33_12000:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	439 case T38_DATA_V33_14400:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	440 default:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	441 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	442 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	443 #endif
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	444 switch (field_type)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	445 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	446 case T38_FIELD_HDLC_DATA:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	447 if (fe->timeout_rx_samples == 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	448 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	449 /* HDLC can just start without any signal indicator on some platforms, even when
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	450 there is zero packet lost. Nasty, but true. Its a good idea to be tolerant of
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	451 loss, though, so accepting a sudden start of HDLC data is the right thing to do. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	452 fe->timeout_rx_samples = fe->samples + ms_to_samples(MID_RX_TIMEOUT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	453 front_end_status(s, T30_FRONT_END_SIGNAL_PRESENT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	454 /* All real HDLC messages in the FAX world start with 0xFF. If this one is not starting
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	455 with 0xFF it would appear some octets must have been missed before this one. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	456 if (len <= 0 \|\| buf[0] != 0xFF)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	457 fe->rx_data_missing = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	458 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	459 if (len > 0 && fe->hdlc_rx.len + len <= T31_T38_MAX_HDLC_LEN)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	460 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	461 bit_reverse(fe->hdlc_rx.buf + fe->hdlc_rx.len, buf, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	462 fe->hdlc_rx.len += len;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	463 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	464 fe->timeout_rx_samples = fe->samples + ms_to_samples(MID_RX_TIMEOUT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	465 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	466 case T38_FIELD_HDLC_FCS_OK:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	467 if (len > 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	468 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	469 span_log(&s->logging, SPAN_LOG_WARNING, "There is data in a T38_FIELD_HDLC_FCS_OK!\n");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	470 /* The sender has incorrectly included data in this message. It is unclear what we should do
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	471 with it, to maximise tolerance of buggy implementations. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	472 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	473 /* Some T.38 implementations send multiple T38_FIELD_HDLC_FCS_OK messages, in IFP packets with
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	474 incrementing sequence numbers, which are actually repeats. They get through to this point because
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	475 of the incrementing sequence numbers. We need to filter them here in a context sensitive manner. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	476 if (t->current_rx_data_type != data_type \|\| t->current_rx_field_type != field_type)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	477 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	478 span_log(&s->logging, SPAN_LOG_FLOW, "Type %s - CRC OK (%s)\n", (fe->hdlc_rx.len >= 3) ? t30_frametype(fe->hdlc_rx.buf[2]) : "???", (fe->rx_data_missing) ? "missing octets" : "clean");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	479 crc_itu16_append(fe->hdlc_rx.buf, fe->hdlc_rx.len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	480 hdlc_accept_frame(s, fe->hdlc_rx.buf, fe->hdlc_rx.len, !fe->rx_data_missing);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	481 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	482 fe->hdlc_rx.len = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	483 fe->rx_data_missing = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	484 fe->timeout_rx_samples = fe->samples + ms_to_samples(MID_RX_TIMEOUT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	485 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	486 case T38_FIELD_HDLC_FCS_BAD:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	487 if (len > 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	488 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	489 span_log(&s->logging, SPAN_LOG_WARNING, "There is data in a T38_FIELD_HDLC_FCS_BAD!\n");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	490 /* The sender has incorrectly included data in this message. We can safely ignore it, as the
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	491 bad FCS means we will throw away the whole message, anyway. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	492 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	493 /* Some T.38 implementations send multiple T38_FIELD_HDLC_FCS_BAD messages, in IFP packets with
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	494 incrementing sequence numbers, which are actually repeats. They get through to this point because
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	495 of the incrementing sequence numbers. We need to filter them here in a context sensitive manner. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	496 if (t->current_rx_data_type != data_type \|\| t->current_rx_field_type != field_type)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	497 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	498 span_log(&s->logging, SPAN_LOG_FLOW, "Type %s - CRC bad (%s)\n", (fe->hdlc_rx.len >= 3) ? t30_frametype(fe->hdlc_rx.buf[2]) : "???", (fe->rx_data_missing) ? "missing octets" : "clean");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	499 hdlc_accept_frame(s, fe->hdlc_rx.buf, fe->hdlc_rx.len, FALSE);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	500 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	501 fe->hdlc_rx.len = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	502 fe->rx_data_missing = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	503 fe->timeout_rx_samples = fe->samples + ms_to_samples(MID_RX_TIMEOUT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	504 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	505 case T38_FIELD_HDLC_FCS_OK_SIG_END:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	506 if (len > 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	507 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	508 span_log(&s->logging, SPAN_LOG_WARNING, "There is data in a T38_FIELD_HDLC_FCS_OK_SIG_END!\n");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	509 /* The sender has incorrectly included data in this message. It is unclear what we should do
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	510 with it, to maximise tolerance of buggy implementations. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	511 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	512 /* Some T.38 implementations send multiple T38_FIELD_HDLC_FCS_OK_SIG_END messages, in IFP packets with
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	513 incrementing sequence numbers, which are actually repeats. They get through to this point because
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	514 of the incrementing sequence numbers. We need to filter them here in a context sensitive manner. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	515 if (t->current_rx_data_type != data_type \|\| t->current_rx_field_type != field_type)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	516 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	517 span_log(&s->logging, SPAN_LOG_FLOW, "Type %s - CRC OK, sig end (%s)\n", (fe->hdlc_rx.len >= 3) ? t30_frametype(fe->hdlc_rx.buf[2]) : "???", (fe->rx_data_missing) ? "missing octets" : "clean");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	518 crc_itu16_append(fe->hdlc_rx.buf, fe->hdlc_rx.len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	519 hdlc_accept_frame(s, fe->hdlc_rx.buf, fe->hdlc_rx.len, !fe->rx_data_missing);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	520 hdlc_rx_status(s, SIG_STATUS_CARRIER_DOWN);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	521 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	522 fe->hdlc_rx.len = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	523 fe->rx_data_missing = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	524 fe->timeout_rx_samples = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	525 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	526 case T38_FIELD_HDLC_FCS_BAD_SIG_END:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	527 if (len > 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	528 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	529 span_log(&s->logging, SPAN_LOG_WARNING, "There is data in a T38_FIELD_HDLC_FCS_BAD_SIG_END!\n");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	530 /* The sender has incorrectly included data in this message. We can safely ignore it, as the
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	531 bad FCS means we will throw away the whole message, anyway. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	532 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	533 /* Some T.38 implementations send multiple T38_FIELD_HDLC_FCS_BAD_SIG_END messages, in IFP packets with
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	534 incrementing sequence numbers, which are actually repeats. They get through to this point because
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	535 of the incrementing sequence numbers. We need to filter them here in a context sensitive manner. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	536 if (t->current_rx_data_type != data_type \|\| t->current_rx_field_type != field_type)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	537 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	538 span_log(&s->logging, SPAN_LOG_FLOW, "Type %s - CRC bad, sig end (%s)\n", (fe->hdlc_rx.len >= 3) ? t30_frametype(fe->hdlc_rx.buf[2]) : "???", (fe->rx_data_missing) ? "missing octets" : "clean");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	539 hdlc_accept_frame(s, fe->hdlc_rx.buf, fe->hdlc_rx.len, FALSE);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	540 hdlc_rx_status(s, SIG_STATUS_CARRIER_DOWN);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	541 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	542 fe->hdlc_rx.len = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	543 fe->rx_data_missing = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	544 fe->timeout_rx_samples = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	545 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	546 case T38_FIELD_HDLC_SIG_END:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	547 if (len > 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	548 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	549 span_log(&s->logging, SPAN_LOG_WARNING, "There is data in a T38_FIELD_HDLC_SIG_END!\n");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	550 /* The sender has incorrectly included data in this message, but there seems nothing meaningful
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	551 it could be. There could not be an FCS good/bad report beyond this. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	552 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	553 /* Some T.38 implementations send multiple T38_FIELD_HDLC_SIG_END messages, in IFP packets with
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	554 incrementing sequence numbers, which are actually repeats. They get through to this point because
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	555 of the incrementing sequence numbers. We need to filter them here in a context sensitive manner. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	556 if (t->current_rx_data_type != data_type \|\| t->current_rx_field_type != field_type)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	557 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	558 /* WORKAROUND: At least some Mediatrix boxes have a bug, where they can send this message at the
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	559 end of non-ECM data. We need to tolerate this. We use the generic receive complete
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	560 indication, rather than the specific HDLC carrier down. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	561 /* This message is expected under 2 circumstances. One is as an alternative to T38_FIELD_HDLC_FCS_OK_SIG_END -
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	562 i.e. they send T38_FIELD_HDLC_FCS_OK, and then T38_FIELD_HDLC_SIG_END when the carrier actually drops.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	563 The other is because the HDLC signal drops unexpectedly - i.e. not just after a final frame. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	564 fe->hdlc_rx.len = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	565 fe->rx_data_missing = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	566 fe->timeout_rx_samples = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	567 hdlc_rx_status(s, SIG_STATUS_CARRIER_DOWN);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	568 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	569 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	570 case T38_FIELD_T4_NON_ECM_DATA:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	571 if (!s->at_state.rx_signal_present)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	572 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	573 non_ecm_rx_status(s, SIG_STATUS_TRAINING_SUCCEEDED);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	574 s->at_state.rx_signal_present = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	575 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	576 if (len > 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	577 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	578 bit_reverse(buf2, buf, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	579 non_ecm_put_chunk(s, buf, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	580 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	581 fe->timeout_rx_samples = fe->samples + ms_to_samples(MID_RX_TIMEOUT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	582 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	583 case T38_FIELD_T4_NON_ECM_SIG_END:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	584 /* Some T.38 implementations send multiple T38_FIELD_T4_NON_ECM_SIG_END messages, in IFP packets with
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	585 incrementing sequence numbers, which are actually repeats. They get through to this point because
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	586 of the incrementing sequence numbers. We need to filter them here in a context sensitive manner. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	587 if (t->current_rx_data_type != data_type \|\| t->current_rx_field_type != field_type)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	588 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	589 if (len > 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	590 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	591 if (!s->at_state.rx_signal_present)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	592 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	593 non_ecm_rx_status(s, SIG_STATUS_TRAINING_SUCCEEDED);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	594 s->at_state.rx_signal_present = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	595 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	596 bit_reverse(buf2, buf, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	597 non_ecm_put_chunk(s, buf, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	598 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	599 /* WORKAROUND: At least some Mediatrix boxes have a bug, where they can send HDLC signal end where
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	600 they should send non-ECM signal end. It is possible they also do the opposite.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	601 We need to tolerate this, so we use the generic receive complete
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	602 indication, rather than the specific non-ECM carrier down. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	603 non_ecm_rx_status(s, SIG_STATUS_CARRIER_DOWN);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	604 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	605 s->at_state.rx_signal_present = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	606 fe->timeout_rx_samples = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	607 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	608 case T38_FIELD_CM_MESSAGE:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	609 if (len >= 1)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	610 span_log(&s->logging, SPAN_LOG_FLOW, "CM profile %d - %s\n", buf[0] - '0', t38_cm_profile_to_str(buf[0]));
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	611 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	612 span_log(&s->logging, SPAN_LOG_FLOW, "Bad length for CM message - %d\n", len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	613 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	614 case T38_FIELD_JM_MESSAGE:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	615 if (len >= 2)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	616 span_log(&s->logging, SPAN_LOG_FLOW, "JM - %s\n", t38_jm_to_str(buf, len));
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	617 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	618 span_log(&s->logging, SPAN_LOG_FLOW, "Bad length for JM message - %d\n", len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	619 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	620 case T38_FIELD_CI_MESSAGE:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	621 if (len >= 1)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	622 span_log(&s->logging, SPAN_LOG_FLOW, "CI 0x%X\n", buf[0]);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	623 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	624 span_log(&s->logging, SPAN_LOG_FLOW, "Bad length for CI message - %d\n", len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	625 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	626 case T38_FIELD_V34RATE:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	627 if (len >= 3)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	628 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	629 fe->t38.v34_rate = t38_v34rate_to_bps(buf, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	630 span_log(&s->logging, SPAN_LOG_FLOW, "V.34 rate %d bps\n", fe->t38.v34_rate);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	631 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	632 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	633 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	634 span_log(&s->logging, SPAN_LOG_FLOW, "Bad length for V34rate message - %d\n", len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	635 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	636 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	637 default:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	638 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	639 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	640 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	641 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	642 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	643
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	644 static void send_hdlc(void user_data, const uint8_t msg, int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	645 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	646 t31_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	647
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	648 s = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	649 if (len <= 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	650 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	651 s->hdlc_tx.len = -1;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	652 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	653 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	654 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	655 s->t38_fe.hdlc_tx.extra_bits = extra_bits_in_stuffed_frame(msg, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	656 bit_reverse(s->hdlc_tx.buf, msg, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	657 s->hdlc_tx.len = len;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	658 s->hdlc_tx.ptr = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	659 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	660 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	661 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	662
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	663 static __inline__ int bits_to_us(t31_state_t *s, int bits)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	664 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	665 if (s->t38_fe.ms_per_tx_chunk == 0 \|\| s->t38_fe.tx_bit_rate == 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	666 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	667 return bits*1000000/s->t38_fe.tx_bit_rate;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	668 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	669 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	670
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	671 static void set_octets_per_data_packet(t31_state_t *s, int bit_rate)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	672 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	673 s->t38_fe.tx_bit_rate = bit_rate;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	674 if (s->t38_fe.ms_per_tx_chunk)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	675 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	676 s->t38_fe.octets_per_data_packet = s->t38_fe.ms_per_tx_chunkbit_rate/(81000);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	677 /* Make sure we have a positive number (i.e. we didn't truncate to zero). */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	678 if (s->t38_fe.octets_per_data_packet < 1)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	679 s->t38_fe.octets_per_data_packet = 1;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	680 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	681 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	682 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	683 s->t38_fe.octets_per_data_packet = MAX_OCTETS_PER_UNPACED_CHUNK;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	684 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	685 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	686 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	687
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	688 static int stream_non_ecm(t31_state_t *s)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	689 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	690 t31_t38_front_end_state_t *fe;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	691 uint8_t buf[MAX_OCTETS_PER_UNPACED_CHUNK + 50];
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	692 int delay;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	693 int len;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	694
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	695 fe = &s->t38_fe;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	696 for (delay = 0; delay == 0; )
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	697 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	698 switch (fe->timed_step)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	699 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	700 case T38_TIMED_STEP_NON_ECM_MODEM:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	701 /* Create a 75ms silence */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	702 if (fe->t38.current_tx_indicator != T38_IND_NO_SIGNAL)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	703 delay = t38_core_send_indicator(&fe->t38, T38_IND_NO_SIGNAL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	704 fe->timed_step = T38_TIMED_STEP_NON_ECM_MODEM_2;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	705 fe->next_tx_samples = fe->samples;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	706 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	707 case T38_TIMED_STEP_NON_ECM_MODEM_2:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	708 /* Switch on a fast modem, and give the training time to complete */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	709 delay = t38_core_send_indicator(&fe->t38, fe->next_tx_indicator);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	710 fe->timed_step = T38_TIMED_STEP_NON_ECM_MODEM_3;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	711 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	712 case T38_TIMED_STEP_NON_ECM_MODEM_3:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	713 /* Send a chunk of non-ECM image data */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	714 /* T.38 says it is OK to send the last of the non-ECM data in the signal end message.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	715 However, I think the early versions of T.38 said the signal end message should not
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	716 contain data. Hopefully, following the current spec will not cause compatibility
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	717 issues. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	718 len = non_ecm_get_chunk(s, buf, fe->octets_per_data_packet);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	719 if (len > 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	720 bit_reverse(buf, buf, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	721 if (len < fe->octets_per_data_packet)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	722 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	723 /* That's the end of the image data. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	724 if (s->t38_fe.ms_per_tx_chunk)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	725 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	726 /* Pad the end of the data with some zeros. If we just stop abruptly
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	727 at the end of the EOLs, some ATAs fail to clean up properly before
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	728 shutting down their transmit modem, and the last few rows of the image
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	729 are lost or corrupted. Simply delaying the no-signal message does not
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	730 help for all implentations. It is usually ignored, which is probably
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	731 the right thing to do after receiving a message saying the signal has
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	732 ended. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	733 memset(buf + len, 0, fe->octets_per_data_packet - len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	734 fe->non_ecm_trailer_bytes = 3*fe->octets_per_data_packet + len;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	735 len = fe->octets_per_data_packet;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	736 fe->timed_step = T38_TIMED_STEP_NON_ECM_MODEM_4;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	737 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	738 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	739 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	740 /* If we are sending quickly there seems no point in doing any padding */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	741 t38_core_send_data(&fe->t38, fe->current_tx_data_type, T38_FIELD_T4_NON_ECM_SIG_END, buf, len, T38_PACKET_CATEGORY_IMAGE_DATA_END);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	742 fe->timed_step = T38_TIMED_STEP_NON_ECM_MODEM_5;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	743 delay = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	744 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	745 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	746 t38_core_send_data(&fe->t38, fe->current_tx_data_type, T38_FIELD_T4_NON_ECM_DATA, buf, len, T38_PACKET_CATEGORY_IMAGE_DATA);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	747 delay = bits_to_us(s, 8*len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	748 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	749 case T38_TIMED_STEP_NON_ECM_MODEM_4:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	750 /* Send padding */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	751 len = fe->octets_per_data_packet;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	752 fe->non_ecm_trailer_bytes -= len;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	753 if (fe->non_ecm_trailer_bytes <= 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	754 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	755 len += fe->non_ecm_trailer_bytes;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	756 memset(buf, 0, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	757 t38_core_send_data(&fe->t38, fe->current_tx_data_type, T38_FIELD_T4_NON_ECM_SIG_END, buf, len, T38_PACKET_CATEGORY_IMAGE_DATA_END);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	758 fe->timed_step = T38_TIMED_STEP_NON_ECM_MODEM_5;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	759 /* Allow a bit more time than the data will take to play out, to ensure the far ATA does not
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	760 cut things short. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	761 delay = bits_to_us(s, 8*len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	762 if (s->t38_fe.ms_per_tx_chunk)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	763 delay += 60000;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	764 front_end_status(s, T30_FRONT_END_SEND_STEP_COMPLETE);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	765 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	766 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	767 memset(buf, 0, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	768 t38_core_send_data(&fe->t38, fe->current_tx_data_type, T38_FIELD_T4_NON_ECM_DATA, buf, len, T38_PACKET_CATEGORY_IMAGE_DATA);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	769 delay = bits_to_us(s, 8*len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	770 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	771 case T38_TIMED_STEP_NON_ECM_MODEM_5:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	772 /* This should not be needed, since the message above indicates the end of the signal, but it
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	773 seems like it can improve compatibility with quirky implementations. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	774 delay = t38_core_send_indicator(&fe->t38, T38_IND_NO_SIGNAL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	775 fe->timed_step = T38_TIMED_STEP_NONE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	776 return delay;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	777 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	778 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	779 return delay;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	780 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	781 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	782
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	783 static int stream_hdlc(t31_state_t *s)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	784 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	785 t31_t38_front_end_state_t *fe;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	786 uint8_t buf[MAX_OCTETS_PER_UNPACED_CHUNK + 50];
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	787 t38_data_field_t data_fields[2];
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	788 int previous;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	789 int delay;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	790 int i;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	791 int category;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	792
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	793 fe = &s->t38_fe;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	794 for (delay = 0; delay == 0; )
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	795 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	796 switch (fe->timed_step)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	797 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	798 case T38_TIMED_STEP_HDLC_MODEM:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	799 /* Create a 75ms silence */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	800 if (fe->t38.current_tx_indicator != T38_IND_NO_SIGNAL)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	801 delay = t38_core_send_indicator(&fe->t38, T38_IND_NO_SIGNAL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	802 fe->timed_step = T38_TIMED_STEP_HDLC_MODEM_2;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	803 fe->next_tx_samples = fe->samples + ms_to_samples(75);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	804 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	805 case T38_TIMED_STEP_HDLC_MODEM_2:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	806 /* Send HDLC preambling */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	807 delay = t38_core_send_indicator(&fe->t38, fe->next_tx_indicator);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	808 delay += t38_core_send_flags_delay(&fe->t38, fe->next_tx_indicator);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	809 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_CONNECT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	810 fe->timed_step = T38_TIMED_STEP_HDLC_MODEM_3;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	811 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	812 case T38_TIMED_STEP_HDLC_MODEM_3:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	813 /* Send a chunk of HDLC data */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	814 if (s->hdlc_tx.len == 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	815 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	816 /* We don't have a frame ready yet, so wait a little */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	817 delay = MS_PER_TX_CHUNK*1000;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	818 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	819 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	820 i = s->hdlc_tx.len - s->hdlc_tx.ptr;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	821 if (fe->octets_per_data_packet >= i)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	822 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	823 /* The last part of an HDLC frame */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	824 if (fe->chunking_modes & T38_CHUNKING_MERGE_FCS_WITH_DATA)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	825 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	826 /* Copy the data, as we might be about to refill the buffer it is in */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	827 memcpy(buf, &s->hdlc_tx.buf[s->hdlc_tx.ptr], i);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	828 data_fields[0].field_type = T38_FIELD_HDLC_DATA;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	829 data_fields[0].field = buf;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	830 data_fields[0].field_len = i;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	831
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	832 /* Now see about the next HDLC frame. This will tell us whether to send FCS_OK or FCS_OK_SIG_END */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	833 previous = fe->current_tx_data_type;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	834 s->hdlc_tx.ptr = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	835 s->hdlc_tx.len = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	836 front_end_status(s, T30_FRONT_END_SEND_STEP_COMPLETE);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	837 if (s->hdlc_tx.final)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	838 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	839 data_fields[1].field_type = T38_FIELD_HDLC_FCS_OK_SIG_END;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	840 data_fields[1].field = NULL;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	841 data_fields[1].field_len = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	842 category = (s->t38_fe.current_tx_data_type == T38_DATA_V21) ? T38_PACKET_CATEGORY_CONTROL_DATA_END : T38_PACKET_CATEGORY_IMAGE_DATA_END;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	843 t38_core_send_data_multi_field(&fe->t38, fe->current_tx_data_type, data_fields, 2, category);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	844 fe->timed_step = T38_TIMED_STEP_HDLC_MODEM_5;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	845 /* We add a bit of extra time here, as with some implementations
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	846 the carrier falling too abruptly causes data loss. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	847 delay = bits_to_us(s, i*8 + fe->hdlc_tx.extra_bits);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	848 if (s->t38_fe.ms_per_tx_chunk)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	849 delay += 100000;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	850 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_OK);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	851 t31_set_at_rx_mode(s, AT_MODE_OFFHOOK_COMMAND);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	852 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	853 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	854 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	855 data_fields[1].field_type = T38_FIELD_HDLC_FCS_OK;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	856 data_fields[1].field = NULL;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	857 data_fields[1].field_len = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	858 category = (s->t38_fe.current_tx_data_type == T38_DATA_V21) ? T38_PACKET_CATEGORY_CONTROL_DATA : T38_PACKET_CATEGORY_IMAGE_DATA;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	859 t38_core_send_data_multi_field(&fe->t38, fe->current_tx_data_type, data_fields, 2, category);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	860 fe->timed_step = T38_TIMED_STEP_HDLC_MODEM_3;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	861 delay = bits_to_us(s, i*8 + fe->hdlc_tx.extra_bits);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	862 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_CONNECT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	863 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	864 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	865 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	866 category = (s->t38_fe.current_tx_data_type == T38_DATA_V21) ? T38_PACKET_CATEGORY_CONTROL_DATA : T38_PACKET_CATEGORY_IMAGE_DATA;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	867 t38_core_send_data(&fe->t38, fe->current_tx_data_type, T38_FIELD_HDLC_DATA, &s->hdlc_tx.buf[s->hdlc_tx.ptr], i, category);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	868 fe->timed_step = T38_TIMED_STEP_HDLC_MODEM_4;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	869 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	870 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	871 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	872 i = fe->octets_per_data_packet;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	873 category = (s->t38_fe.current_tx_data_type == T38_DATA_V21) ? T38_PACKET_CATEGORY_CONTROL_DATA : T38_PACKET_CATEGORY_IMAGE_DATA;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	874 t38_core_send_data(&fe->t38, fe->current_tx_data_type, T38_FIELD_HDLC_DATA, &s->hdlc_tx.buf[s->hdlc_tx.ptr], i, category);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	875 s->hdlc_tx.ptr += i;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	876 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	877 delay = bits_to_us(s, i*8);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	878 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	879 case T38_TIMED_STEP_HDLC_MODEM_4:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	880 /* End of HDLC frame */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	881 previous = fe->current_tx_data_type;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	882 s->hdlc_tx.ptr = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	883 s->hdlc_tx.len = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	884 if (s->hdlc_tx.final)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	885 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	886 /* End of transmission */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	887 s->hdlc_tx.len = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	888 s->hdlc_tx.final = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	889 category = (s->t38_fe.current_tx_data_type == T38_DATA_V21) ? T38_PACKET_CATEGORY_CONTROL_DATA : T38_PACKET_CATEGORY_IMAGE_DATA;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	890 t38_core_send_data(&fe->t38, previous, T38_FIELD_HDLC_FCS_OK, NULL, 0, category);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	891 fe->timed_step = T38_TIMED_STEP_HDLC_MODEM_5;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	892 /* We add a bit of extra time here, as with some implementations
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	893 the carrier falling too abruptly causes data loss. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	894 delay = bits_to_us(s, fe->hdlc_tx.extra_bits);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	895 if (s->t38_fe.ms_per_tx_chunk)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	896 delay += 100000;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	897 front_end_status(s, T30_FRONT_END_SEND_STEP_COMPLETE);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	898 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	899 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	900 /* Finish the current frame off, and prepare for the next one. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	901 category = (s->t38_fe.current_tx_data_type == T38_DATA_V21) ? T38_PACKET_CATEGORY_CONTROL_DATA : T38_PACKET_CATEGORY_IMAGE_DATA;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	902 t38_core_send_data(&fe->t38, previous, T38_FIELD_HDLC_FCS_OK, NULL, 0, category);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	903 fe->timed_step = T38_TIMED_STEP_HDLC_MODEM_3;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	904 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_CONNECT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	905 /* We should now wait enough time for everything to clear through an analogue modem at the far end. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	906 delay = bits_to_us(s, fe->hdlc_tx.extra_bits);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	907 if (s->hdlc_tx.len == 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	908 span_log(&s->logging, SPAN_LOG_FLOW, "No new frame or end transmission condition.\n");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	909 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	910 case T38_TIMED_STEP_HDLC_MODEM_5:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	911 /* Note that some boxes do not like us sending a T38_FIELD_HDLC_SIG_END at this point.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	912 A T38_IND_NO_SIGNAL should always be OK. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	913 category = (s->t38_fe.current_tx_data_type == T38_DATA_V21) ? T38_PACKET_CATEGORY_CONTROL_DATA_END : T38_PACKET_CATEGORY_IMAGE_DATA_END;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	914 t38_core_send_data(&fe->t38, fe->current_tx_data_type, T38_FIELD_HDLC_SIG_END, NULL, 0, category);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	915 delay = t38_core_send_indicator(&fe->t38, T38_IND_NO_SIGNAL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	916 fe->timed_step = T38_TIMED_STEP_NONE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	917 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_OK);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	918 t31_set_at_rx_mode(s, AT_MODE_OFFHOOK_COMMAND);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	919 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	920 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	921 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	922 return delay;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	923 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	924 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	925
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	926 static int stream_ced(t31_state_t *s)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	927 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	928 t31_t38_front_end_state_t *fe;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	929 int delay;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	930
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	931 fe = &s->t38_fe;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	932 for (delay = 0; delay == 0; )
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	933 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	934 switch (fe->timed_step)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	935 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	936 case T38_TIMED_STEP_CED:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	937 /* It seems common practice to start with a no signal indicator, though
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	938 this is not a specified requirement. Since we should be sending 200ms
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	939 of silence, starting the delay with a no signal indication makes sense.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	940 We do need a 200ms delay, as that is a specification requirement. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	941 fe->timed_step = T38_TIMED_STEP_CED_2;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	942 delay = t38_core_send_indicator(&fe->t38, T38_IND_NO_SIGNAL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	943 delay = 200000;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	944 fe->next_tx_samples = fe->samples;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	945 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	946 case T38_TIMED_STEP_CED_2:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	947 /* Initial 200ms delay over. Send the CED indicator */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	948 fe->timed_step = T38_TIMED_STEP_CED_3;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	949 delay = t38_core_send_indicator(&fe->t38, T38_IND_CED);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	950 fe->current_tx_data_type = T38_DATA_NONE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	951 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	952 case T38_TIMED_STEP_CED_3:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	953 /* End of CED */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	954 fe->timed_step = T38_TIMED_STEP_NONE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	955 front_end_status(s, T30_FRONT_END_SEND_STEP_COMPLETE);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	956 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	957 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	958 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	959 return delay;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	960 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	961 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	962
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	963 static int stream_cng(t31_state_t *s)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	964 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	965 t31_t38_front_end_state_t *fe;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	966 int delay;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	967
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	968 fe = &s->t38_fe;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	969 for (delay = 0; delay == 0; )
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	970 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	971 switch (fe->timed_step)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	972 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	973 case T38_TIMED_STEP_CNG:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	974 /* It seems common practice to start with a no signal indicator, though
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	975 this is not a specified requirement of the T.38 spec. Since we should
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	976 be sending 200ms of silence, according to T.30, starting that delay with
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	977 a no signal indication makes sense. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	978 fe->timed_step = T38_TIMED_STEP_CNG_2;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	979 delay = t38_core_send_indicator(&fe->t38, T38_IND_NO_SIGNAL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	980 delay = 200000;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	981 fe->next_tx_samples = fe->samples;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	982 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	983 case T38_TIMED_STEP_CNG_2:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	984 /* Initial short delay over. Send the CNG indicator. CNG persists until something
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	985 coming the other way interrupts it, or a long timeout controlled by the T.30 engine
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	986 expires. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	987 fe->timed_step = T38_TIMED_STEP_NONE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	988 delay = t38_core_send_indicator(&fe->t38, T38_IND_CNG);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	989 fe->current_tx_data_type = T38_DATA_NONE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	990 return delay;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	991 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	992 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	993 return delay;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	994 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	995 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	996
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	997 SPAN_DECLARE(int) t31_t38_send_timeout(t31_state_t *s, int samples)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	998 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	999 t31_t38_front_end_state_t *fe;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1000 int delay;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1001
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1002 fe = &s->t38_fe;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1003 if (fe->current_rx_type == T30_MODEM_DONE \|\| fe->current_tx_type == T30_MODEM_DONE)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1004 return TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1005
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1006 fe->samples += samples;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1007 if (fe->timeout_rx_samples && fe->samples > fe->timeout_rx_samples)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1008 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1009 span_log(&s->logging, SPAN_LOG_FLOW, "Timeout mid-receive\n");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1010 fe->timeout_rx_samples = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1011 front_end_status(s, T30_FRONT_END_RECEIVE_COMPLETE);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1012 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1013 if (fe->timed_step == T38_TIMED_STEP_NONE)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1014 return FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1015 /* Wait until the right time comes along, unless we are working in "no delays" mode, while talking to an
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1016 IAF terminal. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1017 if (fe->ms_per_tx_chunk && fe->samples < fe->next_tx_samples)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1018 return FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1019 /* Its time to send something */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1020 delay = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1021 switch (fe->timed_step & 0xFFF0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1022 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1023 case T38_TIMED_STEP_NON_ECM_MODEM:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1024 delay = stream_non_ecm(s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1025 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1026 case T38_TIMED_STEP_HDLC_MODEM:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1027 delay = stream_hdlc(s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1028 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1029 //case T38_TIMED_STEP_FAKE_HDLC_MODEM:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1030 // delay = stream_fake_hdlc(s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1031 // break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1032 case T38_TIMED_STEP_CED:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1033 delay = stream_ced(s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1034 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1035 case T38_TIMED_STEP_CNG:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1036 delay = stream_cng(s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1037 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1038 case T38_TIMED_STEP_PAUSE:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1039 /* End of timed pause */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1040 fe->timed_step = T38_TIMED_STEP_NONE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1041 front_end_status(s, T30_FRONT_END_SEND_STEP_COMPLETE);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1042 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1043 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1044 fe->next_tx_samples += us_to_samples(delay);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1045 return FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1046 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1047 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1048
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1049 static int t31_modem_control_handler(at_state_t s, void user_data, int op, const char *num)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1050 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1051 t31_state_t *t;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1052
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1053 t = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1054 switch (op)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1055 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1056 case AT_MODEM_CONTROL_CALL:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1057 t->call_samples = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1058 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1059 case AT_MODEM_CONTROL_ANSWER:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1060 t->call_samples = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1061 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1062 case AT_MODEM_CONTROL_ONHOOK:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1063 if (t->tx.holding)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1064 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1065 t->tx.holding = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1066 /* Tell the application to release further data */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1067 at_modem_control(&t->at_state, AT_MODEM_CONTROL_CTS, (void *) 1);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1068 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1069 if (t->at_state.rx_signal_present)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1070 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1071 t->at_state.rx_data[t->at_state.rx_data_bytes++] = DLE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1072 t->at_state.rx_data[t->at_state.rx_data_bytes++] = ETX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1073 t->at_state.at_tx_handler(&t->at_state,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1074 t->at_state.at_tx_user_data,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1075 t->at_state.rx_data,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1076 t->at_state.rx_data_bytes);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1077 t->at_state.rx_data_bytes = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1078 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1079 restart_modem(t, FAX_MODEM_SILENCE_TX);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1080 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1081 case AT_MODEM_CONTROL_RESTART:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1082 restart_modem(t, (int) (intptr_t) num);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1083 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1084 case AT_MODEM_CONTROL_DTE_TIMEOUT:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1085 if (num)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1086 t->dte_data_timeout = t->call_samples + ms_to_samples((intptr_t) num);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1087 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1088 t->dte_data_timeout = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1089 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1090 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1091 return t->modem_control_handler(t, t->modem_control_user_data, op, num);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1092 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1093 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1094
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1095 static void non_ecm_rx_status(void *user_data, int status)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1096 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1097 t31_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1098
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1099 s = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1100 switch (status)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1101 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1102 case SIG_STATUS_TRAINING_IN_PROGRESS:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1103 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1104 case SIG_STATUS_TRAINING_FAILED:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1105 s->at_state.rx_trained = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1106 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1107 case SIG_STATUS_TRAINING_SUCCEEDED:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1108 /* The modem is now trained */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1109 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_CONNECT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1110 s->at_state.rx_signal_present = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1111 s->at_state.rx_trained = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1112 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1113 case SIG_STATUS_CARRIER_UP:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1114 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1115 case SIG_STATUS_CARRIER_DOWN:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1116 if (s->at_state.rx_signal_present)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1117 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1118 s->at_state.rx_data[s->at_state.rx_data_bytes++] = DLE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1119 s->at_state.rx_data[s->at_state.rx_data_bytes++] = ETX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1120 s->at_state.at_tx_handler(&s->at_state,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1121 s->at_state.at_tx_user_data,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1122 s->at_state.rx_data,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1123 s->at_state.rx_data_bytes);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1124 s->at_state.rx_data_bytes = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1125 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_NO_CARRIER);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1126 t31_set_at_rx_mode(s, AT_MODE_OFFHOOK_COMMAND);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1127 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1128 s->at_state.rx_signal_present = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1129 s->at_state.rx_trained = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1130 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1131 default:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1132 if (s->at_state.p.result_code_format)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1133 span_log(&s->logging, SPAN_LOG_FLOW, "Eh!\n");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1134 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1135 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1136 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1137 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1138
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1139 static void non_ecm_put_bit(void *user_data, int bit)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1140 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1141 t31_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1142
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1143 if (bit < 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1144 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1145 non_ecm_rx_status(user_data, bit);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1146 return;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1147 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1148 s = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1149 s->audio.current_byte = (s->audio.current_byte >> 1) \| (bit << 7);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1150 if (++s->audio.bit_no >= 8)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1151 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1152 if (s->audio.current_byte == DLE)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1153 s->at_state.rx_data[s->at_state.rx_data_bytes++] = DLE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1154 s->at_state.rx_data[s->at_state.rx_data_bytes++] = (uint8_t) s->audio.current_byte;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1155 if (s->at_state.rx_data_bytes >= 250)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1156 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1157 s->at_state.at_tx_handler(&s->at_state,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1158 s->at_state.at_tx_user_data,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1159 s->at_state.rx_data,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1160 s->at_state.rx_data_bytes);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1161 s->at_state.rx_data_bytes = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1162 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1163 s->audio.bit_no = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1164 s->audio.current_byte = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1165 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1166 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1167 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1168
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1169 static void non_ecm_put_chunk(void *user_data, const uint8_t buf[], int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1170 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1171 t31_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1172 int i;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1173
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1174 s = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1175 /* Ignore any fractional bytes which may have accumulated */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1176 for (i = 0; i < len; i++)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1177 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1178 if (buf[i] == DLE)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1179 s->at_state.rx_data[s->at_state.rx_data_bytes++] = DLE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1180 s->at_state.rx_data[s->at_state.rx_data_bytes++] = buf[i];
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1181 if (s->at_state.rx_data_bytes >= 250)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1182 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1183 s->at_state.at_tx_handler(&s->at_state,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1184 s->at_state.at_tx_user_data,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1185 s->at_state.rx_data,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1186 s->at_state.rx_data_bytes);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1187 s->at_state.rx_data_bytes = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1188 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1189 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1190 s->audio.bit_no = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1191 s->audio.current_byte = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1192 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1193 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1194
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1195 static int non_ecm_get_bit(void *user_data)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1196 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1197 t31_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1198 int bit;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1199
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1200 s = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1201 if (s->audio.bit_no <= 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1202 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1203 if (s->tx.out_bytes != s->tx.in_bytes)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1204 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1205 /* There is real data available to send */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1206 s->audio.current_byte = s->tx.data[s->tx.out_bytes++];
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1207 if (s->tx.out_bytes > T31_TX_BUF_LEN - 1)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1208 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1209 s->tx.out_bytes = T31_TX_BUF_LEN - 1;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1210 span_log(&s->logging, SPAN_LOG_FLOW, "End of transmit buffer reached!\n");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1211 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1212 if (s->tx.holding)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1213 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1214 /* See if the buffer is approaching empty. It might be time to
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1215 release flow control. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1216 if (s->tx.out_bytes > T31_TX_BUF_LOW_TIDE)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1217 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1218 s->tx.holding = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1219 /* Tell the application to release further data */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1220 at_modem_control(&s->at_state, AT_MODEM_CONTROL_CTS, (void *) 1);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1221 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1222 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1223 s->tx.data_started = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1224 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1225 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1226 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1227 if (s->tx.final)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1228 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1229 s->tx.final = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1230 /* This will put the modem into its shutdown sequence. When
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1231 it has finally shut down, an OK response will be sent. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1232 return SIG_STATUS_END_OF_DATA;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1233 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1234 /* Fill with 0xFF bytes at the start of transmission, or 0x00 if we are in
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1235 the middle of transmission. This follows T.31 and T.30 practice. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1236 s->audio.current_byte = (s->tx.data_started) ? 0x00 : 0xFF;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1237 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1238 s->audio.bit_no = 8;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1239 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1240 s->audio.bit_no--;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1241 bit = s->audio.current_byte & 1;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1242 s->audio.current_byte >>= 1;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1243 return bit;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1244 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1245 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1246
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1247 static int non_ecm_get_chunk(void *user_data, uint8_t buf[], int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1248 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1249 t31_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1250 int i;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1251
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1252 s = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1253 for (i = 0; i < len; i++)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1254 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1255 if (s->tx.out_bytes != s->tx.in_bytes)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1256 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1257 /* There is real data available to send */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1258 buf[i] = s->tx.data[s->tx.out_bytes++];
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1259 if (s->tx.out_bytes > T31_TX_BUF_LEN - 1)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1260 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1261 s->tx.out_bytes = T31_TX_BUF_LEN - 1;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1262 span_log(&s->logging, SPAN_LOG_FLOW, "End of transmit buffer reached!\n");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1263 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1264 if (s->tx.holding)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1265 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1266 /* See if the buffer is approaching empty. It might be time to release flow control. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1267 if (s->tx.out_bytes > T31_TX_BUF_LOW_TIDE)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1268 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1269 s->tx.holding = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1270 /* Tell the application to release further data */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1271 at_modem_control(&s->at_state, AT_MODEM_CONTROL_CTS, (void *) 1);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1272 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1273 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1274 s->tx.data_started = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1275 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1276 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1277 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1278 if (s->tx.final)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1279 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1280 s->tx.final = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1281 /* This will put the modem into its shutdown sequence. When
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1282 it has finally shut down, an OK response will be sent. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1283 //return SIG_STATUS_END_OF_DATA;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1284 return i;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1285 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1286 /* Fill with 0xFF bytes at the start of transmission, or 0x00 if we are in
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1287 the middle of transmission. This follows T.31 and T.30 practice. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1288 buf[i] = (s->tx.data_started) ? 0x00 : 0xFF;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1289 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1290 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1291 s->audio.bit_no = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1292 s->audio.current_byte = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1293 return len;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1294 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1295 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1296
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1297 static void tone_detected(void *user_data, int tone, int level, int delay)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1298 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1299 t31_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1300
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1301 s = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1302 span_log(&s->logging, SPAN_LOG_FLOW, "%s detected (%ddBm0)\n", modem_connect_tone_to_str(tone), level);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1303 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1304 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1305
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1306 static void hdlc_tx_underflow(void *user_data)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1307 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1308 t31_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1309
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1310 s = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1311 if (s->hdlc_tx.final)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1312 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1313 s->hdlc_tx.final = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1314 /* Schedule an orderly shutdown of the modem */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1315 hdlc_tx_frame(&(s->audio.modems.hdlc_tx), NULL, 0);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1316 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1317 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1318 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1319 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_CONNECT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1320 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1321 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1322 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1323
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1324 static void hdlc_rx_status(void *user_data, int status)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1325 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1326 t31_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1327 uint8_t buf[2];
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1328
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1329 s = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1330 switch (status)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1331 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1332 case SIG_STATUS_TRAINING_IN_PROGRESS:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1333 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1334 case SIG_STATUS_TRAINING_FAILED:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1335 s->at_state.rx_trained = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1336 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1337 case SIG_STATUS_TRAINING_SUCCEEDED:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1338 /* The modem is now trained */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1339 s->at_state.rx_signal_present = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1340 s->at_state.rx_trained = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1341 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1342 case SIG_STATUS_CARRIER_UP:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1343 if (s->modem == FAX_MODEM_CNG_TONE \|\| s->modem == FAX_MODEM_NOCNG_TONE \|\| s->modem == FAX_MODEM_V21_RX)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1344 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1345 s->at_state.rx_signal_present = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1346 s->rx_frame_received = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1347 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1348 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1349 case SIG_STATUS_CARRIER_DOWN:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1350 if (s->rx_frame_received)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1351 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1352 if (s->at_state.dte_is_waiting)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1353 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1354 if (s->at_state.ok_is_pending)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1355 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1356 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_OK);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1357 s->at_state.ok_is_pending = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1358 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1359 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1360 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1361 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_NO_CARRIER);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1362 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1363 s->at_state.dte_is_waiting = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1364 t31_set_at_rx_mode(s, AT_MODE_OFFHOOK_COMMAND);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1365 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1366 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1367 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1368 buf[0] = AT_RESPONSE_CODE_NO_CARRIER;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1369 queue_write_msg(s->rx_queue, buf, 1);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1370 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1371 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1372 s->at_state.rx_signal_present = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1373 s->at_state.rx_trained = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1374 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1375 case SIG_STATUS_FRAMING_OK:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1376 if (s->modem == FAX_MODEM_CNG_TONE \|\| s->modem == FAX_MODEM_NOCNG_TONE)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1377 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1378 /* Once we get any valid HDLC the CNG tone stops, and we drop
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1379 to the V.21 receive modem on its own. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1380 s->modem = FAX_MODEM_V21_RX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1381 s->at_state.transmit = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1382 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1383 if (s->modem == FAX_MODEM_V17_RX \|\| s->modem == FAX_MODEM_V27TER_RX \|\| s->modem == FAX_MODEM_V29_RX)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1384 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1385 /* V.21 has been detected while expecting a different carrier.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1386 If +FAR=0 then result +FCERROR and return to command-mode.
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1387 If +FAR=1 then report +FRH:3 and CONNECT, switching to
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1388 V.21 receive mode. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1389 if (s->at_state.p.adaptive_receive)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1390 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1391 s->at_state.rx_signal_present = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1392 s->rx_frame_received = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1393 s->modem = FAX_MODEM_V21_RX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1394 s->at_state.transmit = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1395 s->at_state.dte_is_waiting = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1396 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_FRH3);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1397 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_CONNECT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1398 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1399 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1400 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1401 s->modem = FAX_MODEM_SILENCE_TX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1402 t31_set_at_rx_mode(s, AT_MODE_OFFHOOK_COMMAND);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1403 s->rx_frame_received = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1404 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_FCERROR);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1405 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1406 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1407 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1408 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1409 if (!s->rx_frame_received)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1410 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1411 if (s->at_state.dte_is_waiting)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1412 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1413 /* Report CONNECT as soon as possible to avoid a timeout. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1414 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_CONNECT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1415 s->rx_frame_received = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1416 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1417 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1418 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1419 buf[0] = AT_RESPONSE_CODE_CONNECT;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1420 queue_write_msg(s->rx_queue, buf, 1);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1421 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1422 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1423 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1424 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1425 case SIG_STATUS_ABORT:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1426 /* Just ignore these */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1427 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1428 default:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1429 span_log(&s->logging, SPAN_LOG_WARNING, "Unexpected HDLC rx status - %d!\n", status);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1430 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1431 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1432 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1433 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1434
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1435 static void hdlc_accept_frame(void user_data, const uint8_t msg, int len, int ok)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1436 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1437 t31_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1438 uint8_t buf[256];
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1439 int i;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1440
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1441 if (len < 0)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1442 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1443 hdlc_rx_status(user_data, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1444 return;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1445 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1446 s = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1447 if (!s->rx_frame_received)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1448 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1449 if (s->at_state.dte_is_waiting)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1450 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1451 /* Report CONNECT as soon as possible to avoid a timeout. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1452 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_CONNECT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1453 s->rx_frame_received = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1454 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1455 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1456 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1457 buf[0] = AT_RESPONSE_CODE_CONNECT;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1458 queue_write_msg(s->rx_queue, buf, 1);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1459 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1460 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1461 /* If OK is pending then we just ignore whatever comes in */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1462 if (!s->at_state.ok_is_pending)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1463 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1464 if (s->at_state.dte_is_waiting)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1465 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1466 /* Send straight away */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1467 /* It is safe to look at the two bytes beyond the length of the message,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1468 and expect to find the FCS there. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1469 for (i = 0; i < len + 2; i++)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1470 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1471 if (msg[i] == DLE)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1472 s->at_state.rx_data[s->at_state.rx_data_bytes++] = DLE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1473 s->at_state.rx_data[s->at_state.rx_data_bytes++] = msg[i];
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1474 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1475 s->at_state.rx_data[s->at_state.rx_data_bytes++] = DLE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1476 s->at_state.rx_data[s->at_state.rx_data_bytes++] = ETX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1477 s->at_state.at_tx_handler(&s->at_state, s->at_state.at_tx_user_data, s->at_state.rx_data, s->at_state.rx_data_bytes);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1478 s->at_state.rx_data_bytes = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1479 if (msg[1] == 0x13 && ok)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1480 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1481 /* This is the last frame. We don't send OK until the carrier drops to avoid
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1482 redetecting it later. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1483 s->at_state.ok_is_pending = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1484 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1485 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1486 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1487 at_put_response_code(&s->at_state, (ok) ? AT_RESPONSE_CODE_OK : AT_RESPONSE_CODE_ERROR);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1488 s->at_state.dte_is_waiting = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1489 s->rx_frame_received = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1490 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1491 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1492 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1493 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1494 /* Queue it */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1495 buf[0] = (ok) ? AT_RESPONSE_CODE_OK : AT_RESPONSE_CODE_ERROR;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1496 /* It is safe to look at the two bytes beyond the length of the message,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1497 and expect to find the FCS there. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1498 memcpy(buf + 1, msg, len + 2);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1499 queue_write_msg(s->rx_queue, buf, len + 3);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1500 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1501 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1502 t31_set_at_rx_mode(s, AT_MODE_OFFHOOK_COMMAND);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1503 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1504 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1505
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1506 static void t31_v21_rx(t31_state_t *s)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1507 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1508 s->at_state.ok_is_pending = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1509 s->hdlc_tx.final = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1510 s->hdlc_tx.len = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1511 s->dled = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1512 hdlc_rx_init(&(s->audio.modems.hdlc_rx), FALSE, TRUE, HDLC_FRAMING_OK_THRESHOLD, hdlc_accept_frame, s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1513 fsk_rx_init(&(s->audio.modems.v21_rx), &preset_fsk_specs[FSK_V21CH2], FSK_FRAME_MODE_SYNC, (put_bit_func_t) hdlc_rx_put_bit, &(s->audio.modems.hdlc_rx));
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1514 fsk_rx_signal_cutoff(&(s->audio.modems.v21_rx), -39.09f);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1515 s->at_state.transmit = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1516 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1517 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1518
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1519 static int restart_modem(t31_state_t *s, int new_modem)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1520 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1521 int use_hdlc;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1522 fax_modems_state_t *t;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1523
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1524 t = &s->audio.modems;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1525 span_log(&s->logging, SPAN_LOG_FLOW, "Restart modem %d\n", new_modem);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1526 if (s->modem == new_modem)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1527 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1528 queue_flush(s->rx_queue);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1529 s->modem = new_modem;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1530 s->tx.final = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1531 s->at_state.rx_signal_present = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1532 s->at_state.rx_trained = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1533 s->rx_frame_received = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1534 set_rx_handler(s, (span_rx_handler_t ) &span_dummy_rx, (span_rx_fillin_handler_t ) &span_dummy_rx_fillin, NULL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1535 use_hdlc = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1536 switch (s->modem)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1537 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1538 case FAX_MODEM_CNG_TONE:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1539 if (s->t38_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1540 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1541 s->t38_fe.next_tx_samples = s->t38_fe.samples;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1542 s->t38_fe.timed_step = T38_TIMED_STEP_CNG;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1543 s->t38_fe.current_tx_data_type = T38_DATA_NONE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1544 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1545 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1546 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1547 modem_connect_tones_tx_init(&t->connect_tx, MODEM_CONNECT_TONES_FAX_CNG);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1548 /* CNG is special, since we need to receive V.21 HDLC messages while sending the
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1549 tone. Everything else in FAX processing sends only one way at a time. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1550 /* Do V.21/HDLC receive in parallel. The other end may send its
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1551 first message at any time. The CNG tone will continue until
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1552 we get a valid preamble. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1553 set_rx_handler(s, (span_rx_handler_t ) &cng_rx, (span_rx_fillin_handler_t ) &span_dummy_rx_fillin, s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1554 t31_v21_rx(s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1555 set_tx_handler(s, (span_tx_handler_t *) &modem_connect_tones_tx, &t->connect_tx);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1556 set_next_tx_handler(s, (span_tx_handler_t *) NULL, NULL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1557 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1558 s->at_state.transmit = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1559 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1560 case FAX_MODEM_NOCNG_TONE:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1561 if (s->t38_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1562 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1563 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1564 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1565 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1566 set_rx_handler(s, (span_rx_handler_t ) &cng_rx, (span_rx_fillin_handler_t ) &span_dummy_rx_fillin, s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1567 t31_v21_rx(s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1568 silence_gen_set(&t->silence_gen, 0);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1569 set_tx_handler(s, (span_tx_handler_t *) &silence_gen, &t->silence_gen);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1570 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1571 s->at_state.transmit = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1572 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1573 case FAX_MODEM_CED_TONE:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1574 if (s->t38_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1575 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1576 s->t38_fe.next_tx_samples = s->t38_fe.samples;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1577 s->t38_fe.timed_step = T38_TIMED_STEP_CED;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1578 s->t38_fe.current_tx_data_type = T38_DATA_NONE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1579 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1580 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1581 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1582 modem_connect_tones_tx_init(&t->connect_tx, MODEM_CONNECT_TONES_FAX_CED);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1583 set_tx_handler(s, (span_tx_handler_t *) &modem_connect_tones_tx, &t->connect_tx);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1584 set_next_tx_handler(s, (span_tx_handler_t *) NULL, NULL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1585 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1586 s->at_state.transmit = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1587 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1588 case FAX_MODEM_V21_TX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1589 if (s->t38_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1590 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1591 s->t38_fe.next_tx_indicator = T38_IND_V21_PREAMBLE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1592 s->t38_fe.current_tx_data_type = T38_DATA_V21;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1593 use_hdlc = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1594 s->t38_fe.timed_step = (use_hdlc) ? T38_TIMED_STEP_HDLC_MODEM : T38_TIMED_STEP_NON_ECM_MODEM;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1595 set_octets_per_data_packet(s, 300);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1596 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1597 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1598 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1599 hdlc_tx_init(&t->hdlc_tx, FALSE, 2, FALSE, hdlc_tx_underflow, s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1600 /* The spec says 1s +-15% of preamble. So, the minimum is 32 octets. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1601 hdlc_tx_flags(&t->hdlc_tx, 32);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1602 fsk_tx_init(&t->v21_tx, &preset_fsk_specs[FSK_V21CH2], (get_bit_func_t) hdlc_tx_get_bit, &t->hdlc_tx);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1603 set_tx_handler(s, (span_tx_handler_t *) &fsk_tx, &t->v21_tx);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1604 set_next_tx_handler(s, (span_tx_handler_t *) NULL, NULL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1605 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1606 s->hdlc_tx.final = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1607 s->hdlc_tx.len = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1608 s->dled = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1609 s->at_state.transmit = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1610 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1611 case FAX_MODEM_V21_RX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1612 if (s->t38_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1613 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1614 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1615 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1616 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1617 set_rx_handler(s, (span_rx_handler_t ) &fsk_rx, (span_rx_fillin_handler_t ) &fsk_rx_fillin, &t->v21_rx);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1618 t31_v21_rx(s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1619 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1620 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1621 case FAX_MODEM_V17_TX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1622 if (s->t38_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1623 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1624 switch (s->bit_rate)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1625 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1626 case 7200:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1627 s->t38_fe.next_tx_indicator = (s->short_train) ? T38_IND_V17_7200_SHORT_TRAINING : T38_IND_V17_7200_LONG_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1628 s->t38_fe.current_tx_data_type = T38_DATA_V17_7200;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1629 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1630 case 9600:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1631 s->t38_fe.next_tx_indicator = (s->short_train) ? T38_IND_V17_9600_SHORT_TRAINING : T38_IND_V17_9600_LONG_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1632 s->t38_fe.current_tx_data_type = T38_DATA_V17_9600;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1633 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1634 case 12000:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1635 s->t38_fe.next_tx_indicator = (s->short_train) ? T38_IND_V17_12000_SHORT_TRAINING : T38_IND_V17_12000_LONG_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1636 s->t38_fe.current_tx_data_type = T38_DATA_V17_12000;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1637 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1638 case 14400:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1639 s->t38_fe.next_tx_indicator = (s->short_train) ? T38_IND_V17_14400_SHORT_TRAINING : T38_IND_V17_14400_LONG_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1640 s->t38_fe.current_tx_data_type = T38_DATA_V17_14400;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1641 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1642 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1643 set_octets_per_data_packet(s, s->bit_rate);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1644 s->t38_fe.timed_step = (use_hdlc) ? T38_TIMED_STEP_HDLC_MODEM : T38_TIMED_STEP_NON_ECM_MODEM;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1645 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1646 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1647 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1648 v17_tx_restart(&t->v17_tx, s->bit_rate, FALSE, s->short_train);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1649 set_tx_handler(s, (span_tx_handler_t *) &v17_tx, &t->v17_tx);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1650 set_next_tx_handler(s, (span_tx_handler_t *) NULL, NULL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1651 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1652 s->tx.out_bytes = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1653 s->tx.data_started = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1654 s->at_state.transmit = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1655 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1656 case FAX_MODEM_V17_RX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1657 if (!s->t38_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1658 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1659 set_rx_handler(s, (span_rx_handler_t ) &v17_v21_rx, (span_rx_fillin_handler_t ) &v17_v21_rx_fillin, s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1660 v17_rx_restart(&t->v17_rx, s->bit_rate, s->short_train);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1661 /* Allow for +FCERROR/+FRH:3 */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1662 t31_v21_rx(s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1663 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1664 s->at_state.transmit = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1665 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1666 case FAX_MODEM_V27TER_TX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1667 if (s->t38_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1668 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1669 switch (s->bit_rate)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1670 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1671 case 2400:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1672 s->t38_fe.next_tx_indicator = T38_IND_V27TER_2400_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1673 s->t38_fe.current_tx_data_type = T38_DATA_V27TER_2400;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1674 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1675 case 4800:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1676 s->t38_fe.next_tx_indicator = T38_IND_V27TER_4800_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1677 s->t38_fe.current_tx_data_type = T38_DATA_V27TER_4800;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1678 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1679 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1680 set_octets_per_data_packet(s, s->bit_rate);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1681 s->t38_fe.timed_step = (use_hdlc) ? T38_TIMED_STEP_HDLC_MODEM : T38_TIMED_STEP_NON_ECM_MODEM;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1682 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1683 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1684 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1685 v27ter_tx_restart(&t->v27ter_tx, s->bit_rate, FALSE);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1686 set_tx_handler(s, (span_tx_handler_t *) &v27ter_tx, &t->v27ter_tx);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1687 set_next_tx_handler(s, (span_tx_handler_t *) NULL, NULL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1688 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1689 s->tx.out_bytes = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1690 s->tx.data_started = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1691 s->at_state.transmit = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1692 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1693 case FAX_MODEM_V27TER_RX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1694 if (!s->t38_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1695 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1696 set_rx_handler(s, (span_rx_handler_t ) &v27ter_v21_rx, (span_rx_fillin_handler_t ) &v27ter_v21_rx_fillin, s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1697 v27ter_rx_restart(&t->v27ter_rx, s->bit_rate, FALSE);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1698 /* Allow for +FCERROR/+FRH:3 */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1699 t31_v21_rx(s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1700 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1701 s->at_state.transmit = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1702 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1703 case FAX_MODEM_V29_TX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1704 if (s->t38_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1705 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1706 switch (s->bit_rate)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1707 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1708 case 7200:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1709 s->t38_fe.next_tx_indicator = T38_IND_V29_7200_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1710 s->t38_fe.current_tx_data_type = T38_DATA_V29_7200;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1711 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1712 case 9600:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1713 s->t38_fe.next_tx_indicator = T38_IND_V29_9600_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1714 s->t38_fe.current_tx_data_type = T38_DATA_V29_9600;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1715 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1716 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1717 set_octets_per_data_packet(s, s->bit_rate);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1718 s->t38_fe.timed_step = (use_hdlc) ? T38_TIMED_STEP_HDLC_MODEM : T38_TIMED_STEP_NON_ECM_MODEM;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1719 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1720 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1721 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1722 v29_tx_restart(&t->v29_tx, s->bit_rate, FALSE);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1723 set_tx_handler(s, (span_tx_handler_t *) &v29_tx, &t->v29_tx);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1724 set_next_tx_handler(s, (span_tx_handler_t *) NULL, NULL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1725 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1726 s->tx.out_bytes = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1727 s->tx.data_started = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1728 s->at_state.transmit = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1729 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1730 case FAX_MODEM_V29_RX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1731 if (!s->t38_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1732 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1733 set_rx_handler(s, (span_rx_handler_t ) &v29_v21_rx, (span_rx_fillin_handler_t ) &v29_v21_rx_fillin, s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1734 v29_rx_restart(&t->v29_rx, s->bit_rate, FALSE);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1735 /* Allow for +FCERROR/+FRH:3 */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1736 t31_v21_rx(s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1737 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1738 s->at_state.transmit = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1739 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1740 case FAX_MODEM_SILENCE_TX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1741 if (s->t38_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1742 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1743 t38_core_send_indicator(&s->t38_fe.t38, T38_IND_NO_SIGNAL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1744 s->t38_fe.next_tx_samples = s->t38_fe.samples + ms_to_samples(700);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1745 s->t38_fe.timed_step = T38_TIMED_STEP_PAUSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1746 s->t38_fe.current_tx_data_type = T38_DATA_NONE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1747 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1748 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1749 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1750 silence_gen_set(&t->silence_gen, 0);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1751 set_tx_handler(s, (span_tx_handler_t *) &silence_gen, &t->silence_gen);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1752 set_next_tx_handler(s, (span_tx_handler_t *) NULL, NULL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1753 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1754 s->at_state.transmit = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1755 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1756 case FAX_MODEM_SILENCE_RX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1757 if (!s->t38_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1758 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1759 set_rx_handler(s, (span_rx_handler_t ) &silence_rx, (span_rx_fillin_handler_t ) &span_dummy_rx_fillin, s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1760 silence_gen_set(&t->silence_gen, 0);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1761 set_tx_handler(s, (span_tx_handler_t *) &silence_gen, &t->silence_gen);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1762 set_next_tx_handler(s, (span_tx_handler_t *) NULL, NULL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1763 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1764 s->at_state.transmit = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1765 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1766 case FAX_MODEM_FLUSH:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1767 /* Send 200ms of silence to "push" the last audio out */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1768 if (s->t38_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1769 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1770 t38_core_send_indicator(&s->t38_fe.t38, T38_IND_NO_SIGNAL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1771 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1772 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1773 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1774 s->modem = FAX_MODEM_SILENCE_TX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1775 silence_gen_alter(&t->silence_gen, ms_to_samples(200));
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1776 set_tx_handler(s, (span_tx_handler_t *) &silence_gen, &t->silence_gen);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1777 set_next_tx_handler(s, (span_tx_handler_t *) NULL, NULL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1778 s->at_state.transmit = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1779 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1780 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1781 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1782 s->audio.bit_no = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1783 s->audio.current_byte = 0xFF;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1784 s->tx.in_bytes = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1785 s->tx.out_bytes = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1786 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1787 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1788 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1789
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1790 static __inline__ void dle_unstuff_hdlc(t31_state_t s, const char stuffed, int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1791 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1792 int i;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1793
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1794 for (i = 0; i < len; i++)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1795 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1796 if (s->dled)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1797 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1798 s->dled = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1799 if (stuffed[i] == ETX)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1800 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1801 s->hdlc_tx.final = (s->hdlc_tx.buf[1] & 0x10);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1802 if (s->t38_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1803 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1804 send_hdlc(s, s->hdlc_tx.buf, s->hdlc_tx.len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1805 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1806 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1807 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1808 hdlc_tx_frame(&(s->audio.modems.hdlc_tx), s->hdlc_tx.buf, s->hdlc_tx.len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1809 s->hdlc_tx.len = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1810 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1811 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1812 else if (stuffed[i] == SUB)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1813 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1814 s->hdlc_tx.buf[s->hdlc_tx.len++] = DLE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1815 s->hdlc_tx.buf[s->hdlc_tx.len++] = DLE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1816 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1817 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1818 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1819 s->hdlc_tx.buf[s->hdlc_tx.len++] = stuffed[i];
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1820 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1821 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1822 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1823 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1824 if (stuffed[i] == DLE)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1825 s->dled = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1826 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1827 s->hdlc_tx.buf[s->hdlc_tx.len++] = stuffed[i];
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1828 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1829 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1830 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1831 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1832
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1833 static __inline__ void dle_unstuff(t31_state_t s, const char stuffed, int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1834 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1835 int i;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1836
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1837 for (i = 0; i < len; i++)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1838 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1839 if (s->dled)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1840 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1841 s->dled = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1842 if (stuffed[i] == ETX)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1843 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1844 s->tx.final = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1845 t31_set_at_rx_mode(s, AT_MODE_OFFHOOK_COMMAND);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1846 return;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1847 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1848 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1849 else if (stuffed[i] == DLE)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1850 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1851 s->dled = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1852 continue;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1853 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1854 s->tx.data[s->tx.in_bytes++] = stuffed[i];
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1855 if (s->tx.in_bytes > T31_TX_BUF_LEN - 1)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1856 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1857 /* Oops. We hit the end of the buffer. Give up. Loose stuff. :-( */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1858 span_log(&s->logging, SPAN_LOG_FLOW, "No room in buffer for new data!\n");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1859 return;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1860 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1861 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1862 if (!s->tx.holding)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1863 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1864 /* See if the buffer is approaching full. We might need to apply flow control. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1865 if (s->tx.in_bytes > T31_TX_BUF_HIGH_TIDE)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1866 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1867 s->tx.holding = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1868 /* Tell the application to hold further data */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1869 at_modem_control(&s->at_state, AT_MODEM_CONTROL_CTS, (void *) 0);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1870 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1871 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1872 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1873 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1874
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1875 static int process_class1_cmd(at_state_t t, void user_data, int direction, int operation, int val)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1876 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1877 int new_modem;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1878 int new_transmit;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1879 int i;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1880 int len;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1881 int immediate_response;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1882 t31_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1883 uint8_t msg[256];
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1884
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1885 s = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1886 new_transmit = direction;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1887 immediate_response = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1888 switch (operation)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1889 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1890 case 'S':
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1891 s->at_state.transmit = new_transmit;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1892 if (new_transmit)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1893 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1894 /* Send a specified period of silence, to space transmissions. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1895 restart_modem(s, FAX_MODEM_SILENCE_TX);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1896 if (s->t38_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1897 s->t38_fe.next_tx_samples = s->t38_fe.samples + ms_to_samples(val*10);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1898 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1899 silence_gen_alter(&(s->audio.modems.silence_gen), ms_to_samples(val*10));
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1900 s->at_state.transmit = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1901 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1902 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1903 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1904 /* Wait until we have received a specified period of silence. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1905 queue_flush(s->rx_queue);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1906 s->silence_awaited = ms_to_samples(val*10);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1907 t31_set_at_rx_mode(s, AT_MODE_DELIVERY);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1908 if (s->t38_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1909 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1910 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_OK);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1911 t31_set_at_rx_mode(s, AT_MODE_OFFHOOK_COMMAND);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1912 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1913 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1914 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1915 restart_modem(s, FAX_MODEM_SILENCE_RX);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1916 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1917 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1918 immediate_response = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1919 span_log(&s->logging, SPAN_LOG_FLOW, "Silence %dms\n", val*10);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1920 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1921 case 'H':
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1922 switch (val)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1923 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1924 case 3:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1925 new_modem = (new_transmit) ? FAX_MODEM_V21_TX : FAX_MODEM_V21_RX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1926 s->short_train = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1927 s->bit_rate = 300;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1928 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1929 default:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1930 return -1;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1931 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1932 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC\n");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1933 if (new_modem != s->modem)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1934 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1935 restart_modem(s, new_modem);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1936 immediate_response = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1937 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1938 s->at_state.transmit = new_transmit;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1939 if (new_transmit)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1940 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1941 t31_set_at_rx_mode(s, AT_MODE_HDLC);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1942 if (!s->t38_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1943 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_CONNECT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1944 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1945 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1946 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1947 /* Send straight away, if there is something queued. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1948 t31_set_at_rx_mode(s, AT_MODE_DELIVERY);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1949 s->rx_frame_received = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1950 do
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1951 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1952 if (!queue_empty(s->rx_queue))
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1953 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1954 len = queue_read_msg(s->rx_queue, msg, 256);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1955 if (len > 1)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1956 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1957 if (msg[0] == AT_RESPONSE_CODE_OK)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1958 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_CONNECT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1959 for (i = 1; i < len; i++)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1960 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1961 if (msg[i] == DLE)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1962 s->at_state.rx_data[s->at_state.rx_data_bytes++] = DLE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1963 s->at_state.rx_data[s->at_state.rx_data_bytes++] = msg[i];
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1964 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1965 s->at_state.rx_data[s->at_state.rx_data_bytes++] = DLE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1966 s->at_state.rx_data[s->at_state.rx_data_bytes++] = ETX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1967 s->at_state.at_tx_handler(&s->at_state, s->at_state.at_tx_user_data, s->at_state.rx_data, s->at_state.rx_data_bytes);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1968 s->at_state.rx_data_bytes = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1969 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1970 at_put_response_code(&s->at_state, msg[0]);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1971 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1972 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1973 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1974 s->at_state.dte_is_waiting = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1975 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1976 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1977 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1978 while (msg[0] == AT_RESPONSE_CODE_CONNECT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1979 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1980 immediate_response = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1981 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1982 default:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1983 switch (val)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1984 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1985 case 24:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1986 s->t38_fe.next_tx_indicator = T38_IND_V27TER_2400_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1987 s->t38_fe.current_tx_data_type = T38_DATA_V27TER_2400;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1988 new_modem = (new_transmit) ? FAX_MODEM_V27TER_TX : FAX_MODEM_V27TER_RX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1989 s->short_train = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1990 s->bit_rate = 2400;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1991 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1992 case 48:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1993 s->t38_fe.next_tx_indicator = T38_IND_V27TER_4800_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1994 s->t38_fe.current_tx_data_type = T38_DATA_V27TER_4800;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1995 new_modem = (new_transmit) ? FAX_MODEM_V27TER_TX : FAX_MODEM_V27TER_RX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1996 s->short_train = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1997 s->bit_rate = 4800;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1998 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	1999 case 72:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2000 s->t38_fe.next_tx_indicator = T38_IND_V29_7200_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2001 s->t38_fe.current_tx_data_type = T38_DATA_V29_7200;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2002 new_modem = (new_transmit) ? FAX_MODEM_V29_TX : FAX_MODEM_V29_RX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2003 s->short_train = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2004 s->bit_rate = 7200;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2005 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2006 case 96:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2007 s->t38_fe.next_tx_indicator = T38_IND_V29_9600_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2008 s->t38_fe.current_tx_data_type = T38_DATA_V29_9600;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2009 new_modem = (new_transmit) ? FAX_MODEM_V29_TX : FAX_MODEM_V29_RX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2010 s->short_train = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2011 s->bit_rate = 9600;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2012 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2013 case 73:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2014 s->t38_fe.next_tx_indicator = T38_IND_V17_7200_LONG_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2015 s->t38_fe.current_tx_data_type = T38_DATA_V17_7200;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2016 new_modem = (new_transmit) ? FAX_MODEM_V17_TX : FAX_MODEM_V17_RX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2017 s->short_train = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2018 s->bit_rate = 7200;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2019 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2020 case 74:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2021 s->t38_fe.next_tx_indicator = T38_IND_V17_7200_SHORT_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2022 s->t38_fe.current_tx_data_type = T38_DATA_V17_7200;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2023 new_modem = (new_transmit) ? FAX_MODEM_V17_TX : FAX_MODEM_V17_RX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2024 s->short_train = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2025 s->bit_rate = 7200;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2026 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2027 case 97:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2028 s->t38_fe.next_tx_indicator = T38_IND_V17_9600_LONG_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2029 s->t38_fe.current_tx_data_type = T38_DATA_V17_9600;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2030 new_modem = (new_transmit) ? FAX_MODEM_V17_TX : FAX_MODEM_V17_RX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2031 s->short_train = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2032 s->bit_rate = 9600;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2033 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2034 case 98:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2035 s->t38_fe.next_tx_indicator = T38_IND_V17_9600_SHORT_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2036 s->t38_fe.current_tx_data_type = T38_DATA_V17_9600;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2037 new_modem = (new_transmit) ? FAX_MODEM_V17_TX : FAX_MODEM_V17_RX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2038 s->short_train = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2039 s->bit_rate = 9600;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2040 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2041 case 121:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2042 s->t38_fe.next_tx_indicator = T38_IND_V17_12000_LONG_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2043 s->t38_fe.current_tx_data_type = T38_DATA_V17_12000;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2044 new_modem = (new_transmit) ? FAX_MODEM_V17_TX : FAX_MODEM_V17_RX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2045 s->short_train = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2046 s->bit_rate = 12000;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2047 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2048 case 122:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2049 s->t38_fe.next_tx_indicator = T38_IND_V17_12000_SHORT_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2050 s->t38_fe.current_tx_data_type = T38_DATA_V17_12000;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2051 new_modem = (new_transmit) ? FAX_MODEM_V17_TX : FAX_MODEM_V17_RX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2052 s->short_train = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2053 s->bit_rate = 12000;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2054 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2055 case 145:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2056 s->t38_fe.next_tx_indicator = T38_IND_V17_14400_LONG_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2057 s->t38_fe.current_tx_data_type = T38_DATA_V17_14400;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2058 new_modem = (new_transmit) ? FAX_MODEM_V17_TX : FAX_MODEM_V17_RX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2059 s->short_train = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2060 s->bit_rate = 14400;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2061 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2062 case 146:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2063 s->t38_fe.next_tx_indicator = T38_IND_V17_14400_SHORT_TRAINING;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2064 s->t38_fe.current_tx_data_type = T38_DATA_V17_14400;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2065 new_modem = (new_transmit) ? FAX_MODEM_V17_TX : FAX_MODEM_V17_RX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2066 s->short_train = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2067 s->bit_rate = 14400;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2068 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2069 default:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2070 return -1;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2071 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2072 span_log(&s->logging, SPAN_LOG_FLOW, "Short training = %d, bit rate = %d\n", s->short_train, s->bit_rate);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2073 if (new_transmit)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2074 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2075 t31_set_at_rx_mode(s, AT_MODE_STUFFED);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2076 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_CONNECT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2077 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2078 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2079 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2080 t31_set_at_rx_mode(s, AT_MODE_DELIVERY);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2081 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2082 restart_modem(s, new_modem);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2083 immediate_response = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2084 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2085 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2086 return immediate_response;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2087 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2088 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2089
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2090 SPAN_DECLARE(void) t31_call_event(t31_state_t *s, int event)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2091 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2092 span_log(&s->logging, SPAN_LOG_FLOW, "Call event %d received\n", event);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2093 at_call_event(&s->at_state, event);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2094 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2095 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2096
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2097 SPAN_DECLARE(int) t31_at_rx(t31_state_t s, const char t, int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2098 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2099 if (s->dte_data_timeout)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2100 s->dte_data_timeout = s->call_samples + ms_to_samples(5000);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2101 switch (s->at_state.at_rx_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2102 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2103 case AT_MODE_ONHOOK_COMMAND:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2104 case AT_MODE_OFFHOOK_COMMAND:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2105 at_interpreter(&s->at_state, t, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2106 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2107 case AT_MODE_DELIVERY:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2108 /* Data from the DTE in this state returns us to command mode */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2109 if (len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2110 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2111 if (s->at_state.rx_signal_present)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2112 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2113 s->at_state.rx_data[s->at_state.rx_data_bytes++] = DLE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2114 s->at_state.rx_data[s->at_state.rx_data_bytes++] = ETX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2115 s->at_state.at_tx_handler(&s->at_state, s->at_state.at_tx_user_data, s->at_state.rx_data, s->at_state.rx_data_bytes);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2116 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2117 s->at_state.rx_data_bytes = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2118 s->at_state.transmit = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2119 s->modem = FAX_MODEM_SILENCE_TX;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2120 set_rx_handler(s, (span_rx_handler_t ) &span_dummy_rx, (span_rx_fillin_handler_t ) &span_dummy_rx_fillin, NULL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2121 t31_set_at_rx_mode(s, AT_MODE_OFFHOOK_COMMAND);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2122 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_OK);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2123 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2124 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2125 case AT_MODE_HDLC:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2126 dle_unstuff_hdlc(s, t, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2127 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2128 case AT_MODE_STUFFED:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2129 if (s->tx.out_bytes)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2130 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2131 /* Make room for new data in existing data buffer. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2132 s->tx.in_bytes = &(s->tx.data[s->tx.in_bytes]) - &(s->tx.data[s->tx.out_bytes]);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2133 memmove(&(s->tx.data[0]), &(s->tx.data[s->tx.out_bytes]), s->tx.in_bytes);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2134 s->tx.out_bytes = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2135 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2136 dle_unstuff(s, t, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2137 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2138 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2139 return len;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2140 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2141 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2142
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2143 static void set_rx_handler(t31_state_t *s,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2144 span_rx_handler_t *rx_handler,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2145 span_rx_fillin_handler_t *fillin_handler,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2146 void *user_data)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2147 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2148 s->audio.modems.rx_handler = rx_handler;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2149 s->audio.modems.rx_fillin_handler = fillin_handler;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2150 s->audio.modems.rx_user_data = user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2151 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2152 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2153
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2154 static void set_tx_handler(t31_state_t s, span_tx_handler_t handler, void *user_data)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2155 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2156 s->audio.modems.tx_handler = handler;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2157 s->audio.modems.tx_user_data = user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2158 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2159 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2160
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2161 static void set_next_tx_handler(t31_state_t s, span_tx_handler_t handler, void *user_data)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2162 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2163 s->audio.modems.next_tx_handler = handler;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2164 s->audio.modems.next_tx_user_data = user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2165 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2166 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2167
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2168 static int silence_rx(void *user_data, const int16_t amp[], int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2169 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2170 t31_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2171
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2172 /* Searching for a specified minimum period of silence. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2173 s = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2174 if (s->silence_awaited && s->audio.silence_heard >= s->silence_awaited)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2175 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2176 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_OK);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2177 t31_set_at_rx_mode(s, AT_MODE_OFFHOOK_COMMAND);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2178 s->audio.silence_heard = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2179 s->silence_awaited = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2180 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2181 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2182 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2183 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2184
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2185 static int cng_rx(void *user_data, const int16_t amp[], int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2186 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2187 t31_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2188
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2189 s = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2190 if (s->call_samples > ms_to_samples(s->at_state.p.s_regs[7]*1000))
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2191 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2192 /* After calling, S7 has elapsed... no carrier found. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2193 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_NO_CARRIER);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2194 restart_modem(s, FAX_MODEM_SILENCE_TX);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2195 at_modem_control(&s->at_state, AT_MODEM_CONTROL_HANGUP, NULL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2196 t31_set_at_rx_mode(s, AT_MODE_ONHOOK_COMMAND);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2197 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2198 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2199 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2200 fsk_rx(&(s->audio.modems.v21_rx), amp, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2201 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2202 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2203 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2204 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2205
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2206 static int v17_v21_rx(void *user_data, const int16_t amp[], int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2207 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2208 t31_state_t *t;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2209 fax_modems_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2210
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2211 t = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2212 s = &t->audio.modems;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2213 v17_rx(&s->v17_rx, amp, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2214 if (t->at_state.rx_trained)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2215 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2216 /* The fast modem has trained, so we no longer need to run the slow
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2217 one in parallel. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2218 span_log(&t->logging, SPAN_LOG_FLOW, "Switching from V.17 + V.21 to V.17 (%.2fdBm0)\n", v17_rx_signal_power(&s->v17_rx));
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2219 set_rx_handler(t, (span_rx_handler_t ) &v17_rx, (span_rx_fillin_handler_t ) &v17_rx_fillin, &s->v17_rx);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2220 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2221 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2222 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2223 fsk_rx(&s->v21_rx, amp, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2224 if (t->rx_frame_received)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2225 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2226 /* We have received something, and the fast modem has not trained. We must
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2227 be receiving valid V.21 */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2228 span_log(&t->logging, SPAN_LOG_FLOW, "Switching from V.17 + V.21 to V.21 (%.2fdBm0)\n", fsk_rx_signal_power(&s->v21_rx));
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2229 set_rx_handler(t, (span_rx_handler_t ) &fsk_rx, (span_rx_fillin_handler_t ) &fsk_rx_fillin, &s->v21_rx);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2230 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2231 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2232 return len;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2233 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2234 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2235
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2236 static int v17_v21_rx_fillin(void *user_data, int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2237 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2238 t31_state_t *t;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2239 fax_modems_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2240
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2241 t = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2242 s = &t->audio.modems;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2243 v17_rx_fillin(&s->v17_rx, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2244 fsk_rx_fillin(&s->v21_rx, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2245 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2246 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2247 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2248
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2249 static int v27ter_v21_rx(void *user_data, const int16_t amp[], int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2250 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2251 t31_state_t *t;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2252 fax_modems_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2253
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2254 t = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2255 s = &t->audio.modems;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2256 v27ter_rx(&s->v27ter_rx, amp, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2257 if (t->at_state.rx_trained)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2258 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2259 /* The fast modem has trained, so we no longer need to run the slow
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2260 one in parallel. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2261 span_log(&t->logging, SPAN_LOG_FLOW, "Switching from V.27ter + V.21 to V.27ter (%.2fdBm0)\n", v27ter_rx_signal_power(&s->v27ter_rx));
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2262 set_rx_handler(t, (span_rx_handler_t ) &v27ter_rx, (span_rx_fillin_handler_t ) &v27ter_rx_fillin, &s->v27ter_rx);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2263 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2264 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2265 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2266 fsk_rx(&s->v21_rx, amp, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2267 if (t->rx_frame_received)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2268 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2269 /* We have received something, and the fast modem has not trained. We must
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2270 be receiving valid V.21 */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2271 span_log(&t->logging, SPAN_LOG_FLOW, "Switching from V.27ter + V.21 to V.21 (%.2fdBm0)\n", fsk_rx_signal_power(&s->v21_rx));
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2272 set_rx_handler(t, (span_rx_handler_t ) &fsk_rx, (span_rx_fillin_handler_t ) &fsk_rx_fillin, &s->v21_rx);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2273 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2274 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2275 return len;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2276 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2277 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2278
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2279 static int v27ter_v21_rx_fillin(void *user_data, int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2280 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2281 t31_state_t *t;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2282 fax_modems_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2283
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2284 t = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2285 s = &t->audio.modems;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2286 v27ter_rx_fillin(&s->v27ter_rx, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2287 fsk_rx_fillin(&s->v21_rx, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2288 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2289 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2290 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2291
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2292 static int v29_v21_rx(void *user_data, const int16_t amp[], int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2293 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2294 t31_state_t *t;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2295 fax_modems_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2296
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2297 t = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2298 s = &t->audio.modems;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2299 v29_rx(&s->v29_rx, amp, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2300 if (t->at_state.rx_trained)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2301 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2302 /* The fast modem has trained, so we no longer need to run the slow
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2303 one in parallel. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2304 span_log(&s->logging, SPAN_LOG_FLOW, "Switching from V.29 + V.21 to V.29 (%.2fdBm0)\n", v29_rx_signal_power(&s->v29_rx));
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2305 set_rx_handler(t, (span_rx_handler_t ) &v29_rx, (span_rx_fillin_handler_t ) &v29_rx_fillin, &s->v29_rx);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2306 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2307 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2308 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2309 fsk_rx(&s->v21_rx, amp, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2310 if (t->rx_frame_received)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2311 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2312 /* We have received something, and the fast modem has not trained. We must
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2313 be receiving valid V.21 */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2314 span_log(&t->logging, SPAN_LOG_FLOW, "Switching from V.29 + V.21 to V.21 (%.2fdBm0)\n", fsk_rx_signal_power(&s->v21_rx));
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2315 set_rx_handler(t, (span_rx_handler_t ) &fsk_rx, (span_rx_fillin_handler_t ) &fsk_rx_fillin, &s->v21_rx);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2316 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2317 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2318 return len;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2319 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2320 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2321
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2322 static int v29_v21_rx_fillin(void *user_data, int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2323 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2324 t31_state_t *t;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2325 fax_modems_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2326
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2327 t = (t31_state_t *) user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2328 s = &t->audio.modems;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2329 v29_rx_fillin(&s->v29_rx, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2330 fsk_rx_fillin(&s->v21_rx, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2331 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2332 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2333 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2334
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2335 SPAN_DECLARE(int) t31_rx(t31_state_t *s, int16_t amp[], int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2336 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2337 int i;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2338 int32_t power;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2339
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2340 /* Monitor for received silence. Maximum needed detection is AT+FRS=255 (25510ms). /
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2341 /* We could probably only run this loop if (s->modem == FAX_MODEM_SILENCE_RX), however,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2342 the spec says "when silence has been present on the line for the amount of
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2343 time specified". That means some of the silence may have occurred before
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2344 the AT+FRS=n command. This condition, however, is not likely to ever be the
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2345 case. (AT+FRS=n will usually be issued before the remote goes silent.) */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2346 for (i = 0; i < len; i++)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2347 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2348 /* Clean up any DC influence. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2349 power = power_meter_update(&(s->audio.rx_power), amp[i] - s->audio.last_sample);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2350 s->audio.last_sample = amp[i];
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2351 if (power > s->audio.silence_threshold_power)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2352 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2353 s->audio.silence_heard = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2354 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2355 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2356 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2357 if (s->audio.silence_heard <= ms_to_samples(255*10))
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2358 s->audio.silence_heard++;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2359 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2360 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2361
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2362 /* Time is determined by counting the samples in audio packets coming in. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2363 s->call_samples += len;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2364
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2365 /* In HDLC transmit mode, if 5 seconds elapse without data from the DTE
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2366 we must treat this as an error. We return the result ERROR, and change
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2367 to command-mode. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2368 if (s->dte_data_timeout && s->call_samples > s->dte_data_timeout)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2369 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2370 t31_set_at_rx_mode(s, AT_MODE_OFFHOOK_COMMAND);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2371 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_ERROR);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2372 restart_modem(s, FAX_MODEM_SILENCE_TX);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2373 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2374
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2375 if (!s->at_state.transmit \|\| s->modem == FAX_MODEM_CNG_TONE)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2376 s->audio.modems.rx_handler(s->audio.modems.rx_user_data, amp, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2377 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2378 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2379 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2380
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2381 SPAN_DECLARE(int) t31_rx_fillin(t31_state_t *s, int len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2382 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2383 /* To mitigate the effect of lost packets on a packet network we should
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2384 try to sustain the status quo. If there is no receive modem running, keep
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2385 things that way. If there is a receive modem running, try to sustain its
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2386 operation, without causing a phase hop, or letting its adaptive functions
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2387 diverge. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2388 /* Time is determined by counting the samples in audio packets coming in. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2389 s->call_samples += len;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2390
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2391 /* In HDLC transmit mode, if 5 seconds elapse without data from the DTE
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2392 we must treat this as an error. We return the result ERROR, and change
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2393 to command-mode. */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2394 if (s->dte_data_timeout && s->call_samples > s->dte_data_timeout)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2395 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2396 t31_set_at_rx_mode(s, AT_MODE_OFFHOOK_COMMAND);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2397 at_put_response_code(&s->at_state, AT_RESPONSE_CODE_ERROR);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2398 restart_modem(s, FAX_MODEM_SILENCE_TX);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2399 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2400 /* Call the fillin function of the current modem (if there is one). */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2401 switch (s->modem)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2402 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2403 case FAX_MODEM_V21_RX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2404 len = fsk_rx_fillin(&s->audio.modems.v21_rx, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2405 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2406 case FAX_MODEM_V27TER_RX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2407 /* TODO: what about FSK in the early stages */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2408 len = v27ter_rx_fillin(&s->audio.modems.v27ter_rx, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2409 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2410 case FAX_MODEM_V29_RX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2411 /* TODO: what about FSK in the early stages */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2412 len = v29_rx_fillin(&s->audio.modems.v29_rx, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2413 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2414 case FAX_MODEM_V17_RX:
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2415 /* TODO: what about FSK in the early stages */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2416 len = v17_rx_fillin(&s->audio.modems.v17_rx, len);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2417 break;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2418 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2419 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2420 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2421 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2422
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2423 static int set_next_tx_type(t31_state_t *s)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2424 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2425 if (s->audio.next_tx_handler)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2426 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2427 set_tx_handler(s, s->audio.next_tx_handler, s->audio.next_tx_user_data);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2428 set_next_tx_handler(s, (span_tx_handler_t *) NULL, NULL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2429 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2430 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2431 /* There is nothing else to change to, so use zero length silence */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2432 silence_gen_alter(&(s->audio.modems.silence_gen), 0);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2433 set_tx_handler(s, (span_tx_handler_t *) &silence_gen, &s->audio.modems.silence_gen);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2434 set_next_tx_handler(s, (span_tx_handler_t *) NULL, NULL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2435 return -1;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2436 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2437 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2438
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2439 SPAN_DECLARE(int) t31_tx(t31_state_t *s, int16_t amp[], int max_len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2440 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2441 int len;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2442
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2443 len = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2444 if (s->at_state.transmit)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2445 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2446 if ((len = s->audio.modems.tx_handler(s->audio.modems.tx_user_data, amp, max_len)) < max_len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2447 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2448 /* Allow for one change of tx handler within a block */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2449 set_next_tx_type(s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2450 if ((len += s->audio.modems.tx_handler(s->audio.modems.tx_user_data, amp + len, max_len - len)) < max_len)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2451 front_end_status(s, T30_FRONT_END_SEND_STEP_COMPLETE);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2452 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2453 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2454 if (s->audio.modems.transmit_on_idle)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2455 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2456 /* Pad to the requested length with silence */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2457 memset(amp + len, 0, (max_len - len)*sizeof(int16_t));
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2458 len = max_len;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2459 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2460 return len;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2461 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2462 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2463
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2464 SPAN_DECLARE(void) t31_set_transmit_on_idle(t31_state_t *s, int transmit_on_idle)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2465 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2466 s->audio.modems.transmit_on_idle = transmit_on_idle;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2467 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2468 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2469
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2470 SPAN_DECLARE(void) t31_set_tep_mode(t31_state_t *s, int use_tep)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2471 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2472 s->audio.modems.use_tep = use_tep;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2473 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2474 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2475
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2476 SPAN_DECLARE(void) t31_set_t38_config(t31_state_t *s, int without_pacing)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2477 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2478 if (without_pacing)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2479 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2480 /* Continuous streaming mode, as used for TPKT over TCP transport */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2481 /* Inhibit indicator packets */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2482 t38_set_redundancy_control(&s->t38_fe.t38, T38_PACKET_CATEGORY_INDICATOR, 0);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2483 t38_set_redundancy_control(&s->t38_fe.t38, T38_PACKET_CATEGORY_CONTROL_DATA, 1);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2484 t38_set_redundancy_control(&s->t38_fe.t38, T38_PACKET_CATEGORY_CONTROL_DATA_END, 1);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2485 t38_set_redundancy_control(&s->t38_fe.t38, T38_PACKET_CATEGORY_IMAGE_DATA, 1);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2486 t38_set_redundancy_control(&s->t38_fe.t38, T38_PACKET_CATEGORY_IMAGE_DATA_END, 1);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2487 s->t38_fe.ms_per_tx_chunk = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2488 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2489 else
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2490 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2491 /* Paced streaming mode, as used for UDP transports */
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2492 t38_set_redundancy_control(&s->t38_fe.t38, T38_PACKET_CATEGORY_INDICATOR, INDICATOR_TX_COUNT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2493 t38_set_redundancy_control(&s->t38_fe.t38, T38_PACKET_CATEGORY_CONTROL_DATA, DATA_TX_COUNT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2494 t38_set_redundancy_control(&s->t38_fe.t38, T38_PACKET_CATEGORY_CONTROL_DATA_END, DATA_END_TX_COUNT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2495 t38_set_redundancy_control(&s->t38_fe.t38, T38_PACKET_CATEGORY_IMAGE_DATA, DATA_TX_COUNT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2496 t38_set_redundancy_control(&s->t38_fe.t38, T38_PACKET_CATEGORY_IMAGE_DATA_END, DATA_END_TX_COUNT);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2497 s->t38_fe.ms_per_tx_chunk = MS_PER_TX_CHUNK;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2498 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2499 set_octets_per_data_packet(s, 300);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2500 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2501 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2502
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2503 SPAN_DECLARE(void) t31_set_mode(t31_state_t *s, int t38_mode)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2504 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2505 s->t38_mode = t38_mode;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2506 span_log(&s->logging, SPAN_LOG_FLOW, "Mode set to %d\n", s->t38_mode);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2507 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2508 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2509
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2510 SPAN_DECLARE(logging_state_t ) t31_get_logging_state(t31_state_t s)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2511 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2512 return &s->logging;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2513 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2514 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2515
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2516 SPAN_DECLARE(t38_core_state_t ) t31_get_t38_core_state(t31_state_t s)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2517 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2518 return &s->t38_fe.t38;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2519 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2520 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2521
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2522 static int t31_t38_fe_init(t31_state_t *t,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2523 t38_tx_packet_handler_t *tx_packet_handler,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2524 void *tx_packet_user_data)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2525 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2526 t31_t38_front_end_state_t *s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2527
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2528 s = &t->t38_fe;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2529
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2530 t38_core_init(&s->t38,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2531 process_rx_indicator,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2532 process_rx_data,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2533 process_rx_missing,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2534 (void *) t,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2535 tx_packet_handler,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2536 tx_packet_user_data);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2537 s->t38.fastest_image_data_rate = 14400;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2538
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2539 s->timed_step = T38_TIMED_STEP_NONE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2540 //s->iaf = T30_IAF_MODE_T37 \| T30_IAF_MODE_T38;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2541 s->iaf = T30_IAF_MODE_T38;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2542
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2543 s->current_tx_data_type = T38_DATA_NONE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2544 s->next_tx_samples = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2545 s->chunking_modes = T38_CHUNKING_ALLOW_TEP_TIME;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2546
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2547 t->hdlc_tx.ptr = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2548
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2549 hdlc_tx_init(&s->hdlc_tx_term,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2550 FALSE,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2551 1,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2552 FALSE,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2553 NULL,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2554 NULL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2555 hdlc_rx_init(&s->hdlc_rx_term,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2556 FALSE,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2557 TRUE,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2558 2,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2559 NULL,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2560 NULL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2561 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2562 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2563 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2564
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2565 SPAN_DECLARE(t31_state_t ) t31_init(t31_state_t s,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2566 at_tx_handler_t *at_tx_handler,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2567 void *at_tx_user_data,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2568 t31_modem_control_handler_t *modem_control_handler,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2569 void *modem_control_user_data,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2570 t38_tx_packet_handler_t *tx_t38_packet_handler,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2571 void *tx_t38_packet_user_data)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2572 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2573 int alloced;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2574
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2575 if (at_tx_handler == NULL \|\| modem_control_handler == NULL)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2576 return NULL;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2577
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2578 alloced = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2579 if (s == NULL)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2580 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2581 if ((s = (t31_state_t ) malloc(sizeof (s))) == NULL)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2582 return NULL;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2583 alloced = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2584 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2585 memset(s, 0, sizeof(*s));
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2586 span_log_init(&s->logging, SPAN_LOG_NONE, NULL);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2587 span_log_set_protocol(&s->logging, "T.31");
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2588
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2589 s->modem_control_handler = modem_control_handler;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2590 s->modem_control_user_data = modem_control_user_data;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2591 fax_modems_init(&s->audio.modems,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2592 FALSE,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2593 hdlc_accept_frame,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2594 hdlc_tx_underflow,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2595 non_ecm_put_bit,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2596 non_ecm_get_bit,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2597 tone_detected,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2598 (void *) s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2599 power_meter_init(&(s->audio.rx_power), 4);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2600 s->audio.last_sample = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2601 s->audio.silence_threshold_power = power_meter_level_dbm0(-36);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2602 s->at_state.rx_signal_present = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2603 s->at_state.rx_trained = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2604
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2605 s->at_state.do_hangup = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2606 s->at_state.line_ptr = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2607 s->audio.silence_heard = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2608 s->silence_awaited = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2609 s->call_samples = 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2610 s->modem = FAX_MODEM_NONE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2611 s->at_state.transmit = TRUE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2612
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2613 if ((s->rx_queue = queue_init(NULL, 4096, QUEUE_WRITE_ATOMIC \| QUEUE_READ_ATOMIC)) == NULL)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2614 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2615 if (alloced)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2616 free(s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2617 return NULL;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2618 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2619 at_init(&s->at_state, at_tx_handler, at_tx_user_data, t31_modem_control_handler, s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2620 at_set_class1_handler(&s->at_state, process_class1_cmd, s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2621 s->at_state.dte_inactivity_timeout = DEFAULT_DTE_TIMEOUT;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2622 if (tx_t38_packet_handler)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2623 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2624 t31_t38_fe_init(s,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2625 tx_t38_packet_handler,
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2626 tx_t38_packet_user_data);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2627 t31_set_t38_config(s, FALSE);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2628 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2629 s->t38_mode = FALSE;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2630 return s;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2631 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2632 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2633
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2634 SPAN_DECLARE(int) t31_release(t31_state_t *s)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2635 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2636 at_reset_call_info(&s->at_state);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2637 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2638 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2639 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2640
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2641 SPAN_DECLARE(int) t31_free(t31_state_t *s)
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2642 {
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2643 t31_release(s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2644 free(s);
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2645 return 0;
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2646 }
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2647 /- End of function --------------------------------------------------------/
26cd8f1ef0b1 import spandsp-0.0.6pre17 Peter Meerwald <pmeerw@cosy.sbg.ac.at> parents: diff changeset	2648 /- End of file ------------------------------------------------------------/

Mercurial > hg > audiostuff

annotate spandsp-0.0.6pre17/src/t31.c @ 6:22a74b01a099 default tip