comparison spandsp-0.0.6pre17/src/t30.c @ 4:26cd8f1ef0b1

import spandsp-0.0.6pre17
author Peter Meerwald <pmeerw@cosy.sbg.ac.at>
date Fri, 25 Jun 2010 15:50:58 +0200
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3:c6c5a16ce2f2 4:26cd8f1ef0b1
1 /*
2 * SpanDSP - a series of DSP components for telephony
3 *
4 * t30.c - ITU T.30 FAX transfer processing
5 *
6 * Written by Steve Underwood <steveu@coppice.org>
7 *
8 * Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009 Steve Underwood
9 *
10 * All rights reserved.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU Lesser General Public License version 2.1,
14 * as published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU Lesser General Public License for more details.
20 *
21 * You should have received a copy of the GNU Lesser General Public
22 * License along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * $Id: t30.c,v 1.305.4.4 2009/12/23 14:23:49 steveu Exp $
26 */
27
28 /*! \file */
29
30 #if defined(HAVE_CONFIG_H)
31 #include "config.h"
32 #endif
33
34 #include <stdlib.h>
35 #include <stdio.h>
36 #include <inttypes.h>
37 #include <string.h>
38 #include <fcntl.h>
39 #include <time.h>
40 #if defined(HAVE_TGMATH_H)
41 #include <tgmath.h>
42 #endif
43 #if defined(HAVE_MATH_H)
44 #include <math.h>
45 #endif
46 #include "floating_fudge.h"
47 #include <tiffio.h>
48
49 #include "spandsp/telephony.h"
50 #include "spandsp/logging.h"
51 #include "spandsp/bit_operations.h"
52 #include "spandsp/queue.h"
53 #include "spandsp/power_meter.h"
54 #include "spandsp/complex.h"
55 #include "spandsp/tone_generate.h"
56 #include "spandsp/async.h"
57 #include "spandsp/hdlc.h"
58 #include "spandsp/fsk.h"
59 #include "spandsp/v29rx.h"
60 #include "spandsp/v29tx.h"
61 #include "spandsp/v27ter_rx.h"
62 #include "spandsp/v27ter_tx.h"
63 #include "spandsp/t4_rx.h"
64 #include "spandsp/t4_tx.h"
65 #include "spandsp/t30_fcf.h"
66 #include "spandsp/t35.h"
67 #include "spandsp/t30.h"
68 #include "spandsp/t30_api.h"
69 #include "spandsp/t30_logging.h"
70
71 #include "spandsp/private/logging.h"
72 #include "spandsp/private/t4_rx.h"
73 #include "spandsp/private/t4_tx.h"
74 #include "spandsp/private/t30.h"
75 #include "spandsp/private/t30_dis_dtc_dcs_bits.h"
76
77 #include "t30_local.h"
78
79 /*! The maximum permitted number of retries of a single command allowed. */
80 #define MAX_COMMAND_TRIES 3
81
82 /*! The maximum permitted number of retries of a single response request allowed. This
83 is not specified in T.30. However, if you don't apply some limit a messed up FAX
84 terminal could keep you retrying all day. Its a backstop protection. */
85 #define MAX_RESPONSE_TRIES 6
86
87 /* T.30 defines the following call phases:
88 Phase A: Call set-up.
89 Exchange of CNG, CED and the called terminal identification.
90 Phase B: Pre-message procedure for identifying and selecting the required facilities.
91 Capabilities negotiation, and training, up the the confirmation to receive.
92 Phase C: Message transmission (includes phasing and synchronization where appropriate).
93 Transfer of the message at high speed.
94 Phase D: Post-message procedure, including end-of-message and confirmation and multi-document procedures.
95 End of message and acknowledgement.
96 Phase E: Call release
97 Final call disconnect. */
98 enum
99 {
100 T30_PHASE_IDLE = 0, /* Freshly initialised */
101 T30_PHASE_A_CED, /* Doing the CED (answer) sequence */
102 T30_PHASE_A_CNG, /* Doing the CNG (caller) sequence */
103 T30_PHASE_B_RX, /* Receiving pre-message control messages */
104 T30_PHASE_B_TX, /* Transmitting pre-message control messages */
105 T30_PHASE_C_NON_ECM_RX, /* Receiving a document message in non-ECM mode */
106 T30_PHASE_C_NON_ECM_TX, /* Transmitting a document message in non-ECM mode */
107 T30_PHASE_C_ECM_RX, /* Receiving a document message in ECM (HDLC) mode */
108 T30_PHASE_C_ECM_TX, /* Transmitting a document message in ECM (HDLC) mode */
109 T30_PHASE_D_RX, /* Receiving post-message control messages */
110 T30_PHASE_D_TX, /* Transmitting post-message control messages */
111 T30_PHASE_E, /* In phase E */
112 T30_PHASE_CALL_FINISHED /* Call completely finished */
113 };
114
115 static const char *phase_names[] =
116 {
117 "T30_PHASE_IDLE",
118 "T30_PHASE_A_CED",
119 "T30_PHASE_A_CNG",
120 "T30_PHASE_B_RX",
121 "T30_PHASE_B_TX",
122 "T30_PHASE_C_NON_ECM_RX",
123 "T30_PHASE_C_NON_ECM_TX",
124 "T30_PHASE_C_ECM_RX",
125 "T30_PHASE_C_ECM_TX",
126 "T30_PHASE_D_RX",
127 "T30_PHASE_D_TX",
128 "T30_PHASE_E",
129 "T30_PHASE_CALL_FINISHED"
130 };
131
132 /* These state names are modelled after places in the T.30 flow charts. */
133 enum
134 {
135 T30_STATE_ANSWERING = 1,
136 T30_STATE_B,
137 T30_STATE_C,
138 T30_STATE_D,
139 T30_STATE_D_TCF,
140 T30_STATE_D_POST_TCF,
141 T30_STATE_F_TCF,
142 T30_STATE_F_CFR,
143 T30_STATE_F_FTT,
144 T30_STATE_F_DOC_NON_ECM,
145 T30_STATE_F_POST_DOC_NON_ECM,
146 T30_STATE_F_DOC_ECM,
147 T30_STATE_F_POST_DOC_ECM,
148 T30_STATE_F_POST_RCP_MCF,
149 T30_STATE_F_POST_RCP_PPR,
150 T30_STATE_F_POST_RCP_RNR,
151 T30_STATE_R,
152 T30_STATE_T,
153 T30_STATE_I,
154 T30_STATE_II,
155 T30_STATE_II_Q,
156 T30_STATE_III_Q_MCF,
157 T30_STATE_III_Q_RTP,
158 T30_STATE_III_Q_RTN,
159 T30_STATE_IV,
160 T30_STATE_IV_PPS_NULL,
161 T30_STATE_IV_PPS_Q,
162 T30_STATE_IV_PPS_RNR,
163 T30_STATE_IV_CTC,
164 T30_STATE_IV_EOR,
165 T30_STATE_IV_EOR_RNR,
166 T30_STATE_CALL_FINISHED
167 };
168
169 enum
170 {
171 T30_MIN_SCAN_20MS = 0,
172 T30_MIN_SCAN_5MS = 1,
173 T30_MIN_SCAN_10MS = 2,
174 T30_MIN_SCAN_40MS = 4,
175 T30_MIN_SCAN_0MS = 7,
176 };
177
178 enum
179 {
180 T30_MODE_SEND_DOC = 1,
181 T30_MODE_RECEIVE_DOC
182 };
183
184 /*! These are internal assessments of received image quality, used to determine whether we
185 continue, retrain, or abandon the call. */
186 enum
187 {
188 T30_COPY_QUALITY_PERFECT = 0,
189 T30_COPY_QUALITY_GOOD,
190 T30_COPY_QUALITY_POOR,
191 T30_COPY_QUALITY_BAD
192 };
193
194 enum
195 {
196 DISBIT1 = 0x01,
197 DISBIT2 = 0x02,
198 DISBIT3 = 0x04,
199 DISBIT4 = 0x08,
200 DISBIT5 = 0x10,
201 DISBIT6 = 0x20,
202 DISBIT7 = 0x40,
203 DISBIT8 = 0x80
204 };
205
206 /*! There are high level indications of what is happening at any instant, to guide the cleanup
207 process if the call is abandoned. */
208 enum
209 {
210 OPERATION_IN_PROGRESS_NONE = 0,
211 OPERATION_IN_PROGRESS_T4_RX,
212 OPERATION_IN_PROGRESS_T4_TX
213 };
214
215 /* All timers specified in milliseconds */
216
217 /*! Time-out T0 defines the amount of time an automatic calling terminal waits for the called terminal
218 to answer the call.
219 T0 begins after the dialling of the number is completed and is reset:
220 a) when T0 times out; or
221 b) when timer T1 is started; or
222 c) if the terminal is capable of detecting any condition which indicates that the call will not be
223 successful, when such a condition is detected.
224 The recommended value of T0 is 60+-5s. However, when it is anticipated that a long call set-up
225 time may be encountered, an alternative value of up to 120s may be used.
226 NOTE - National regulations may require the use of other values for T0. */
227 #define DEFAULT_TIMER_T0 60000
228
229 /*! Time-out T1 defines the amount of time two terminals will continue to attempt to identify each
230 other. T1 is 35+-5s, begins upon entering phase B, and is reset upon detecting a valid signal or
231 when T1 times out.
232 For operating methods 3 and 4 (see 3.1), the calling terminal starts time-out T1 upon reception of
233 the V.21 modulation scheme.
234 For operating method 4 bis a (see 3.1), the calling terminal starts time-out T1 upon starting
235 transmission using the V.21 modulation scheme.
236 Annex A says T1 is also the timeout to be used for the receipt of the first HDLC frame after the
237 start of high speed flags in ECM mode. This seems a strange reuse of the T1 name, so we distinguish
238 it here by calling it T1A. */
239 #define DEFAULT_TIMER_T1 35000
240 #define DEFAULT_TIMER_T1A 35000
241
242 /*! Time-out T2 makes use of the tight control between commands and responses to detect the loss of
243 command/response synchronization. T2 is 6+-1s, and begins when initiating a command search
244 (e.g., the first entrance into the "command received" subroutine, reference flow diagram in section 5.2).
245 T2 is reset when an HDLC flag is received or when T2 times out. */
246 #define DEFAULT_TIMER_T2 7000
247
248 /*! Once HDLC flags begin, T2 is reset, and a 3s timer begins. This timer is unnamed in T.30. Here we
249 term it T2A. No tolerance is specified for this timer. T2A specifies the maximum time to wait for the
250 end of a frame, after the initial flag has been seen. */
251 #define DEFAULT_TIMER_T2A 3000
252
253 /*! If the HDLC carrier falls during reception, we need to apply a minimum time before continuing. If we
254 don't, there are circumstances where we could continue and reply before the incoming signals have
255 really finished. E.g. if a bad DCS is received in a DCS-TCF sequence, we need wait for the TCF
256 carrier to pass, before continuing. This timer is specified as 200ms, but no tolerance is specified.
257 It is unnamed in T.30. Here we term it T2B */
258 #define DEFAULT_TIMER_T2B 200
259
260 /*! Time-out T3 defines the amount of time a terminal will attempt to alert the local operator in
261 response to a procedural interrupt. Failing to achieve operator intervention, the terminal will
262 discontinue this attempt and shall issue other commands or responses. T3 is 10+-5s, begins on the
263 first detection of a procedural interrupt command/response signal (i.e., PIN/PIP or PRI-Q) and is
264 reset when T3 times out or when the operator initiates a line request. */
265 #define DEFAULT_TIMER_T3 15000
266
267 /*! Time-out T4 defines the amount of time a terminal will wait for flags to begin, when waiting for a
268 response from a remote terminal. T2 is 3s +-15%, and begins when initiating a response search
269 (e.g., the first entrance into the "response received" subroutine, reference flow diagram in section 5.2).
270 T4 is reset when an HDLC flag is received or when T4 times out.
271 NOTE - For manual FAX units, the value of timer T4 may be either 3.0s +-15% or 4.5s +-15%.
272 If the value of 4.5s is used, then after detection of a valid response to the first DIS, it may
273 be reduced to 3.0s +-15%. T4 = 3.0s +-15% for automatic units. */
274 #define DEFAULT_TIMER_T4 3450
275
276 /*! Once HDLC flags begin, T4 is reset, and a 3s timer begins. This timer is unnamed in T.30. Here we
277 term it T4A. No tolerance is specified for this timer. T4A specifies the maximum time to wait for the
278 end of a frame, after the initial flag has been seen. Note that a different timer is used for the fast
279 HDLC in ECM mode, to provide time for physical paper handling. */
280 #define DEFAULT_TIMER_T4A 3000
281
282 /*! If the HDLC carrier falls during reception, we need to apply a minimum time before continuing. if we
283 don't, there are circumstances where we could continue and reply before the incoming signals have
284 really finished. E.g. if a bad DCS is received in a DCS-TCF sequence, we need wait for the TCF
285 carrier to pass, before continuing. This timer is specified as 200ms, but no tolerance is specified.
286 It is unnamed in T.30. Here we term it T4B */
287 #define DEFAULT_TIMER_T4B 200
288
289 /*! Time-out T5 is defined for the optional T.4 error correction mode. Time-out T5 defines the amount
290 of time waiting for clearance of the busy condition of the receiving terminal. T5 is 60+-5s and
291 begins on the first detection of the RNR response. T5 is reset when T5 times out or the MCF or PIP
292 response is received or when the ERR or PIN response is received in the flow control process after
293 transmitting the EOR command. If the timer T5 has expired, the DCN command is transmitted for
294 call release. */
295 #define DEFAULT_TIMER_T5 65000
296
297 /*! (Annex C - ISDN) Time-out T6 defines the amount of time two terminals will continue to attempt to
298 identify each other. T6 is 5+-0.5s. The timeout begins upon entering Phase B, and is reset upon
299 detecting a valid signal, or when T6 times out. */
300 #define DEFAULT_TIMER_T6 5000
301
302 /*! (Annex C - ISDN) Time-out T7 is used to detect loss of command/response synchronization. T7 is 6+-1s.
303 The timeout begins when initiating a command search (e.g., the first entrance into the "command received"
304 subroutine - see flow diagram in C.5) and is reset upon detecting a valid signal or when T7 times out. */
305 #define DEFAULT_TIMER_T7 7000
306
307 /*! (Annex C - ISDN) Time-out T8 defines the amount of time waiting for clearance of the busy condition
308 of the receiving terminal. T8 is 10+-1s. The timeout begins on the first detection of the combination
309 of no outstanding corrections and the RNR response. T8 is reset when T8 times out or MCF response is
310 received. If the timer T8 expires, a DCN command is transmitted for call release. */
311 #define DEFAULT_TIMER_T8 10000
312
313 /*! Final time we allow for things to flush through the system, before we disconnect, in milliseconds.
314 200ms should be fine for a PSTN call. For a T.38 call something longer is desirable. */
315 #define FINAL_FLUSH_TIME 1000
316
317 /*! The number of PPRs received before CTC or EOR is sent in ECM mode. T.30 defines this as 4,
318 but it could be varied, and the Japanese spec, for example, does make this value a
319 variable. */
320 #define PPR_LIMIT_BEFORE_CTC_OR_EOR 4
321
322 /* HDLC message header byte values */
323 #define ADDRESS_FIELD 0xFF
324 #define CONTROL_FIELD_NON_FINAL_FRAME 0x03
325 #define CONTROL_FIELD_FINAL_FRAME 0x13
326
327 enum
328 {
329 TIMER_IS_IDLE = 0,
330 TIMER_IS_T2,
331 TIMER_IS_T1A,
332 TIMER_IS_T2A,
333 TIMER_IS_T2B,
334 TIMER_IS_T2C,
335 TIMER_IS_T4,
336 TIMER_IS_T4A,
337 TIMER_IS_T4B,
338 TIMER_IS_T4C
339 };
340
341 /* Start points in the fallback table for different capabilities */
342 /*! The starting point in the modem fallback sequence if V.17 is allowed */
343 #define T30_V17_FALLBACK_START 0
344 /*! The starting point in the modem fallback sequence if V.17 is not allowed */
345 #define T30_V29_FALLBACK_START 3
346 /*! The starting point in the modem fallback sequence if V.29 is not allowed */
347 #define T30_V27TER_FALLBACK_START 6
348
349 static const struct
350 {
351 int bit_rate;
352 int modem_type;
353 int which;
354 uint8_t dcs_code;
355 } fallback_sequence[] =
356 {
357 {14400, T30_MODEM_V17, T30_SUPPORT_V17, DISBIT6},
358 {12000, T30_MODEM_V17, T30_SUPPORT_V17, (DISBIT6 | DISBIT4)},
359 { 9600, T30_MODEM_V17, T30_SUPPORT_V17, (DISBIT6 | DISBIT3)},
360 { 9600, T30_MODEM_V29, T30_SUPPORT_V29, DISBIT3},
361 { 7200, T30_MODEM_V17, T30_SUPPORT_V17, (DISBIT6 | DISBIT4 | DISBIT3)},
362 { 7200, T30_MODEM_V29, T30_SUPPORT_V29, (DISBIT4 | DISBIT3)},
363 { 4800, T30_MODEM_V27TER, T30_SUPPORT_V27TER, DISBIT4},
364 { 2400, T30_MODEM_V27TER, T30_SUPPORT_V27TER, 0},
365 { 0, 0, 0, 0}
366 };
367
368 static void queue_phase(t30_state_t *s, int phase);
369 static void set_phase(t30_state_t *s, int phase);
370 static void set_state(t30_state_t *s, int state);
371 static void send_simple_frame(t30_state_t *s, int type);
372 static void send_frame(t30_state_t *s, const uint8_t *fr, int frlen);
373 static void send_dcn(t30_state_t *s);
374 static void repeat_last_command(t30_state_t *s);
375 static void disconnect(t30_state_t *s);
376 static void decode_20digit_msg(t30_state_t *s, char *msg, const uint8_t *pkt, int len);
377 static void decode_url_msg(t30_state_t *s, char *msg, const uint8_t *pkt, int len);
378 static int set_min_scan_time_code(t30_state_t *s);
379 static int send_cfr_sequence(t30_state_t *s, int start);
380 static void timer_t2_start(t30_state_t *s);
381 static void timer_t2a_start(t30_state_t *s);
382 static void timer_t2b_start(t30_state_t *s);
383 static void timer_t4_start(t30_state_t *s);
384 static void timer_t4a_start(t30_state_t *s);
385 static void timer_t4b_start(t30_state_t *s);
386 static void timer_t2_t4_stop(t30_state_t *s);
387
388 /*! Test a specified bit within a DIS, DTC or DCS frame */
389 #define test_ctrl_bit(s,bit) ((s)[3 + ((bit - 1)/8)] & (1 << ((bit - 1)%8)))
390 /*! Set a specified bit within a DIS, DTC or DCS frame */
391 #define set_ctrl_bit(s,bit) (s)[3 + ((bit - 1)/8)] |= (1 << ((bit - 1)%8))
392 /*! Set a specified block of bits within a DIS, DTC or DCS frame */
393 #define set_ctrl_bits(s,val,bit) (s)[3 + ((bit - 1)/8)] |= ((val) << ((bit - 1)%8))
394 /*! Clear a specified bit within a DIS, DTC or DCS frame */
395 #define clr_ctrl_bit(s,bit) (s)[3 + ((bit - 1)/8)] &= ~(1 << ((bit - 1)%8))
396
397 static int terminate_operation_in_progress(t30_state_t *s)
398 {
399 /* Make sure any FAX in progress is tidied up. If the tidying up has
400 already happened, repeating it here is harmless. */
401 switch (s->operation_in_progress)
402 {
403 case OPERATION_IN_PROGRESS_T4_TX:
404 t4_tx_release(&s->t4);
405 break;
406 case OPERATION_IN_PROGRESS_T4_RX:
407 t4_rx_release(&s->t4);
408 break;
409 }
410 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
411 return 0;
412 }
413 /*- End of function --------------------------------------------------------*/
414
415 static int tx_start_page(t30_state_t *s)
416 {
417 if (t4_tx_start_page(&s->t4))
418 {
419 terminate_operation_in_progress(s);
420 return -1;
421 }
422 s->ecm_block = 0;
423 s->error_correcting_mode_retries = 0;
424 span_log(&s->logging, SPAN_LOG_FLOW, "Starting page %d of transfer\n", s->tx_page_number + 1);
425 return 0;
426 }
427 /*- End of function --------------------------------------------------------*/
428
429 static int tx_end_page(t30_state_t *s)
430 {
431 s->retries = 0;
432 if (t4_tx_end_page(&s->t4) == 0)
433 {
434 s->tx_page_number++;
435 s->ecm_block = 0;
436 }
437 return 0;
438 }
439 /*- End of function --------------------------------------------------------*/
440
441 static int rx_start_page(t30_state_t *s)
442 {
443 int i;
444
445 t4_rx_set_image_width(&s->t4, s->image_width);
446 t4_rx_set_sub_address(&s->t4, s->rx_info.sub_address);
447 t4_rx_set_dcs(&s->t4, s->rx_dcs_string);
448 t4_rx_set_far_ident(&s->t4, s->rx_info.ident);
449 t4_rx_set_vendor(&s->t4, s->vendor);
450 t4_rx_set_model(&s->t4, s->model);
451
452 t4_rx_set_rx_encoding(&s->t4, s->line_encoding);
453 t4_rx_set_x_resolution(&s->t4, s->x_resolution);
454 t4_rx_set_y_resolution(&s->t4, s->y_resolution);
455
456 if (t4_rx_start_page(&s->t4))
457 return -1;
458 /* Clear the buffer */
459 for (i = 0; i < 256; i++)
460 s->ecm_len[i] = -1;
461 s->ecm_block = 0;
462 s->ecm_frames = -1;
463 s->ecm_frames_this_tx_burst = 0;
464 s->error_correcting_mode_retries = 0;
465 return 0;
466 }
467 /*- End of function --------------------------------------------------------*/
468
469 static int rx_end_page(t30_state_t *s)
470 {
471 if (t4_rx_end_page(&s->t4) == 0)
472 {
473 s->rx_page_number++;
474 s->ecm_block = 0;
475 }
476 return 0;
477 }
478 /*- End of function --------------------------------------------------------*/
479
480 static int copy_quality(t30_state_t *s)
481 {
482 t4_stats_t stats;
483 int quality;
484
485 t4_get_transfer_statistics(&s->t4, &stats);
486 /* There is no specification for judging copy quality. However, we need to classify
487 it at three levels, to control what we do next: OK; tolerable, but retrain;
488 intolerable. */
489 /* Based on the thresholds used in the TSB85 tests, we consider:
490 <5% bad rows is OK
491 <15% bad rows to be tolerable, but retrain
492 >15% bad rows to be intolerable
493 */
494 span_log(&s->logging, SPAN_LOG_FLOW, "Page no = %d\n", stats.pages_transferred + 1);
495 span_log(&s->logging, SPAN_LOG_FLOW, "Image size = %d x %d pixels\n", stats.width, stats.length);
496 span_log(&s->logging, SPAN_LOG_FLOW, "Image resolution = %d/m x %d/m\n", stats.x_resolution, stats.y_resolution);
497 span_log(&s->logging, SPAN_LOG_FLOW, "Bad rows = %d\n", stats.bad_rows);
498 span_log(&s->logging, SPAN_LOG_FLOW, "Longest bad row run = %d\n", stats.longest_bad_row_run);
499 /* Don't treat a page as perfect because it has zero bad rows out of zero total rows. A zero row
500 page has got to be some kind of total page failure. */
501 if (stats.bad_rows == 0 && stats.length != 0)
502 {
503 span_log(&s->logging, SPAN_LOG_FLOW, "Page quality is perfect\n");
504 quality = T30_COPY_QUALITY_PERFECT;
505 }
506 else if (stats.bad_rows*20 < stats.length)
507 {
508 span_log(&s->logging, SPAN_LOG_FLOW, "Page quality is good\n");
509 quality = T30_COPY_QUALITY_GOOD;
510 }
511 else if (stats.bad_rows*20 < stats.length*3)
512 {
513 span_log(&s->logging, SPAN_LOG_FLOW, "Page quality is poor\n");
514 quality = T30_COPY_QUALITY_POOR;
515 }
516 else
517 {
518 span_log(&s->logging, SPAN_LOG_FLOW, "Page quality is bad\n");
519 quality = T30_COPY_QUALITY_BAD;
520 }
521 return quality;
522 }
523 /*- End of function --------------------------------------------------------*/
524
525 static void release_resources(t30_state_t *s)
526 {
527 if (s->tx_info.nsf)
528 {
529 free(s->tx_info.nsf);
530 s->tx_info.nsf = NULL;
531 }
532 s->tx_info.nsf_len = 0;
533 if (s->tx_info.nsc)
534 {
535 free(s->tx_info.nsc);
536 s->tx_info.nsc = NULL;
537 }
538 s->tx_info.nsc_len = 0;
539 if (s->tx_info.nss)
540 {
541 free(s->tx_info.nss);
542 s->tx_info.nss = NULL;
543 }
544 s->tx_info.nss_len = 0;
545 if (s->tx_info.tsa)
546 {
547 free(s->tx_info.tsa);
548 s->tx_info.tsa = NULL;
549 }
550 if (s->tx_info.ira)
551 {
552 free(s->tx_info.ira);
553 s->tx_info.ira = NULL;
554 }
555 if (s->tx_info.cia)
556 {
557 free(s->tx_info.cia);
558 s->tx_info.cia = NULL;
559 }
560 if (s->tx_info.isp)
561 {
562 free(s->tx_info.isp);
563 s->tx_info.isp = NULL;
564 }
565 if (s->tx_info.csa)
566 {
567 free(s->tx_info.csa);
568 s->tx_info.csa = NULL;
569 }
570
571 if (s->rx_info.nsf)
572 {
573 free(s->rx_info.nsf);
574 s->rx_info.nsf = NULL;
575 }
576 s->rx_info.nsf_len = 0;
577 if (s->rx_info.nsc)
578 {
579 free(s->rx_info.nsc);
580 s->rx_info.nsc = NULL;
581 }
582 s->rx_info.nsc_len = 0;
583 if (s->rx_info.nss)
584 {
585 free(s->rx_info.nss);
586 s->rx_info.nss = NULL;
587 }
588 s->rx_info.nss_len = 0;
589 if (s->rx_info.tsa)
590 {
591 free(s->rx_info.tsa);
592 s->rx_info.tsa = NULL;
593 }
594 if (s->rx_info.ira)
595 {
596 free(s->rx_info.ira);
597 s->rx_info.ira = NULL;
598 }
599 if (s->rx_info.cia)
600 {
601 free(s->rx_info.cia);
602 s->rx_info.cia = NULL;
603 }
604 if (s->rx_info.isp)
605 {
606 free(s->rx_info.isp);
607 s->rx_info.isp = NULL;
608 }
609 if (s->rx_info.csa)
610 {
611 free(s->rx_info.csa);
612 s->rx_info.csa = NULL;
613 }
614 }
615 /*- End of function --------------------------------------------------------*/
616
617 static uint8_t check_next_tx_step(t30_state_t *s)
618 {
619 int res;
620 int more;
621
622 res = t4_tx_next_page_has_different_format(&s->t4);
623 if (res == 0)
624 {
625 span_log(&s->logging, SPAN_LOG_FLOW, "More pages to come with the same format\n");
626 return (s->local_interrupt_pending) ? T30_PRI_MPS : T30_MPS;
627 }
628 if (res > 0)
629 {
630 span_log(&s->logging, SPAN_LOG_FLOW, "More pages to come with a different format\n");
631 s->tx_start_page = t4_tx_get_current_page_in_file(&s->t4) + 1;
632 return (s->local_interrupt_pending) ? T30_PRI_EOM : T30_EOM;
633 }
634 /* Call a user handler, if one is set, to check if another document is to be sent.
635 If so, we send an EOM, rather than an EOP. Then we will renegotiate, and the new
636 document will begin. */
637 if (s->document_handler)
638 more = s->document_handler(s, s->document_user_data, 0);
639 else
640 more = FALSE;
641 if (more)
642 {
643 //if (test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_MULTIPLE_SELECTIVE_POLLING_CAPABLE))
644 // return T30_EOS;
645 return (s->local_interrupt_pending) ? T30_PRI_EOM : T30_EOM;
646 }
647 return (s->local_interrupt_pending) ? T30_PRI_EOP : T30_EOP;
648 }
649 /*- End of function --------------------------------------------------------*/
650
651 static int get_partial_ecm_page(t30_state_t *s)
652 {
653 int i;
654 int len;
655
656 s->ppr_count = 0;
657 s->ecm_progress = 0;
658 /* Fill our partial page buffer with a partial page. Use the negotiated preferred frame size
659 as the basis for the size of the frames produced. */
660 /* We fill the buffer with complete HDLC frames, ready to send out. */
661 /* The frames are all marked as not being final frames. When sent, the are followed by a partial
662 page signal, which is marked as the final frame. */
663 for (i = 3; i < 32 + 3; i++)
664 s->ecm_frame_map[i] = 0xFF;
665 for (i = 0; i < 256; i++)
666 {
667 s->ecm_len[i] = -1;
668 s->ecm_data[i][0] = ADDRESS_FIELD;
669 s->ecm_data[i][1] = CONTROL_FIELD_NON_FINAL_FRAME;
670 s->ecm_data[i][2] = T4_FCD;
671 /* These frames contain a frame sequence number within the partial page (one octet) followed
672 by some image data. */
673 s->ecm_data[i][3] = (uint8_t) i;
674 if ((len = t4_tx_get_chunk(&s->t4, &s->ecm_data[i][4], s->octets_per_ecm_frame)) < s->octets_per_ecm_frame)
675 {
676 /* The image is not big enough to fill the entire buffer */
677 /* We need to pad to a full frame, as most receivers expect that. */
678 if (len > 0)
679 {
680 memset(&s->ecm_data[i][4 + len], 0, s->octets_per_ecm_frame - len);
681 s->ecm_len[i++] = (int16_t) (s->octets_per_ecm_frame + 4);
682 }
683 s->ecm_frames = i;
684 span_log(&s->logging, SPAN_LOG_FLOW, "Partial page buffer contains %d frames (%d per frame)\n", i, s->octets_per_ecm_frame);
685 s->ecm_at_page_end = TRUE;
686 return i;
687 }
688 s->ecm_len[i] = (int16_t) (4 + len);
689 }
690 /* We filled the entire buffer */
691 s->ecm_frames = 256;
692 span_log(&s->logging, SPAN_LOG_FLOW, "Partial page buffer full (%d per frame)\n", s->octets_per_ecm_frame);
693 s->ecm_at_page_end = ((t4_tx_check_bit(&s->t4) & 2) != 0);
694 return 256;
695 }
696 /*- End of function --------------------------------------------------------*/
697
698 static int t30_ecm_commit_partial_page(t30_state_t *s)
699 {
700 int i;
701 int image_ended;
702
703 span_log(&s->logging, SPAN_LOG_FLOW, "Commiting partial page - block %d, %d frames\n", s->ecm_block, s->ecm_frames);
704 image_ended = FALSE;
705 for (i = 0; i < s->ecm_frames; i++)
706 {
707 if (t4_rx_put_chunk(&s->t4, s->ecm_data[i], s->ecm_len[i]))
708 {
709 /* This is the end of the document */
710 /* Clear the buffer */
711 for (i = 0; i < 256; i++)
712 s->ecm_len[i] = -1;
713 s->ecm_frames = -1;
714 image_ended = TRUE;
715 break;
716 }
717 }
718 /* Clear the buffer */
719 for (i = 0; i < 256; i++)
720 s->ecm_len[i] = -1;
721 s->ecm_block++;
722 s->ecm_frames = -1;
723 return (image_ended) ? -1 : 0;
724 }
725 /*- End of function --------------------------------------------------------*/
726
727 static int send_next_ecm_frame(t30_state_t *s)
728 {
729 int i;
730 uint8_t frame[3];
731
732 if (s->ecm_current_tx_frame < s->ecm_frames)
733 {
734 /* Search for the next frame, within the current partial page, which has
735 not been tagged as transferred OK. */
736 for (i = s->ecm_current_tx_frame; i < s->ecm_frames; i++)
737 {
738 if (s->ecm_len[i] >= 0)
739 {
740 send_frame(s, s->ecm_data[i], s->ecm_len[i]);
741 s->ecm_current_tx_frame = i + 1;
742 s->ecm_frames_this_tx_burst++;
743 return 0;
744 }
745 }
746 s->ecm_current_tx_frame = s->ecm_frames;
747 }
748 if (s->ecm_current_tx_frame <= s->ecm_frames + 3)
749 {
750 /* We have sent all the FCD frames. Send some RCP frames. Three seems to be
751 a popular number, to minimise the risk of a bit error stopping the receiving
752 end from recognising the RCP. */
753 s->ecm_current_tx_frame++;
754 /* The RCP frame is an odd man out, as its a simple 1 byte control
755 frame, but is specified to not have the final bit set. It doesn't
756 seem to have the DIS received bit set, either. */
757 frame[0] = ADDRESS_FIELD;
758 frame[1] = CONTROL_FIELD_NON_FINAL_FRAME;
759 frame[2] = T4_RCP;
760 send_frame(s, frame, 3);
761 /* In case we are just after a CTC/CTR exchange, which kicked us back to long training */
762 s->short_train = TRUE;
763 return 0;
764 }
765 return -1;
766 }
767 /*- End of function --------------------------------------------------------*/
768
769 static void send_rr(t30_state_t *s)
770 {
771 if (s->current_status != T30_ERR_TX_T5EXP)
772 send_simple_frame(s, T30_RR);
773 else
774 send_dcn(s);
775 }
776 /*- End of function --------------------------------------------------------*/
777
778 static int send_first_ecm_frame(t30_state_t *s)
779 {
780 s->ecm_current_tx_frame = 0;
781 s->ecm_frames_this_tx_burst = 0;
782 return send_next_ecm_frame(s);
783 }
784 /*- End of function --------------------------------------------------------*/
785
786 static void print_frame(t30_state_t *s, const char *io, const uint8_t *msg, int len)
787 {
788 span_log(&s->logging,
789 SPAN_LOG_FLOW,
790 "%s %s with%s final frame tag\n",
791 io,
792 t30_frametype(msg[2]),
793 (msg[1] & 0x10) ? "" : "out");
794 span_log_buf(&s->logging, SPAN_LOG_FLOW, io, msg, len);
795 }
796 /*- End of function --------------------------------------------------------*/
797
798 static void send_frame(t30_state_t *s, const uint8_t *msg, int len)
799 {
800 print_frame(s, "Tx: ", msg, len);
801
802 if (s->real_time_frame_handler)
803 s->real_time_frame_handler(s, s->real_time_frame_user_data, FALSE, msg, len);
804 if (s->send_hdlc_handler)
805 s->send_hdlc_handler(s->send_hdlc_user_data, msg, len);
806 }
807 /*- End of function --------------------------------------------------------*/
808
809 static void send_simple_frame(t30_state_t *s, int type)
810 {
811 uint8_t frame[3];
812
813 /* The simple command/response frames are always final frames */
814 frame[0] = ADDRESS_FIELD;
815 frame[1] = CONTROL_FIELD_FINAL_FRAME;
816 frame[2] = (uint8_t) (type | s->dis_received);
817 send_frame(s, frame, 3);
818 }
819 /*- End of function --------------------------------------------------------*/
820
821 static void send_20digit_msg_frame(t30_state_t *s, int cmd, char *msg)
822 {
823 size_t len;
824 int p;
825 uint8_t frame[23];
826
827 len = strlen(msg);
828 p = 0;
829 frame[p++] = ADDRESS_FIELD;
830 frame[p++] = CONTROL_FIELD_NON_FINAL_FRAME;
831 frame[p++] = (uint8_t) (cmd | s->dis_received);
832 while (len > 0)
833 frame[p++] = msg[--len];
834 while (p < 23)
835 frame[p++] = ' ';
836 send_frame(s, frame, 23);
837 }
838 /*- End of function --------------------------------------------------------*/
839
840 static int send_nsf_frame(t30_state_t *s)
841 {
842 /* Only send if there is an NSF message to send. */
843 if (s->tx_info.nsf && s->tx_info.nsf_len)
844 {
845 span_log(&s->logging, SPAN_LOG_FLOW, "Sending user supplied NSF - %d octets\n", s->tx_info.nsf_len);
846 s->tx_info.nsf[0] = ADDRESS_FIELD;
847 s->tx_info.nsf[1] = CONTROL_FIELD_NON_FINAL_FRAME;
848 s->tx_info.nsf[2] = (uint8_t) (T30_NSF | s->dis_received);
849 send_frame(s, s->tx_info.nsf, s->tx_info.nsf_len + 3);
850 return TRUE;
851 }
852 return FALSE;
853 }
854 /*- End of function --------------------------------------------------------*/
855
856 static int send_nss_frame(t30_state_t *s)
857 {
858 /* Only send if there is an NSF message to send. */
859 if (s->tx_info.nss && s->tx_info.nss_len)
860 {
861 span_log(&s->logging, SPAN_LOG_FLOW, "Sending user supplied NSS - %d octets\n", s->tx_info.nss_len);
862 s->tx_info.nss[0] = ADDRESS_FIELD;
863 s->tx_info.nss[1] = CONTROL_FIELD_NON_FINAL_FRAME;
864 s->tx_info.nss[2] = (uint8_t) (T30_NSS | s->dis_received);
865 send_frame(s, s->tx_info.nss, s->tx_info.nss_len + 3);
866 return TRUE;
867 }
868 return FALSE;
869 }
870 /*- End of function --------------------------------------------------------*/
871
872 static int send_nsc_frame(t30_state_t *s)
873 {
874 /* Only send if there is an NSF message to send. */
875 if (s->tx_info.nsc && s->tx_info.nsc_len)
876 {
877 span_log(&s->logging, SPAN_LOG_FLOW, "Sending user supplied NSC - %d octets\n", s->tx_info.nsc_len);
878 s->tx_info.nsc[0] = ADDRESS_FIELD;
879 s->tx_info.nsc[1] = CONTROL_FIELD_NON_FINAL_FRAME;
880 s->tx_info.nsc[2] = (uint8_t) (T30_NSC | s->dis_received);
881 send_frame(s, s->tx_info.nsc, s->tx_info.nsc_len + 3);
882 return TRUE;
883 }
884 return FALSE;
885 }
886 /*- End of function --------------------------------------------------------*/
887
888 static int send_ident_frame(t30_state_t *s, uint8_t cmd)
889 {
890 if (s->tx_info.ident[0])
891 {
892 span_log(&s->logging, SPAN_LOG_FLOW, "Sending ident '%s'\n", s->tx_info.ident);
893 /* 'cmd' should be T30_TSI, T30_CIG or T30_CSI */
894 send_20digit_msg_frame(s, cmd, s->tx_info.ident);
895 return TRUE;
896 }
897 return FALSE;
898 }
899 /*- End of function --------------------------------------------------------*/
900
901 static int send_psa_frame(t30_state_t *s)
902 {
903 if (test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_POLLED_SUBADDRESSING_CAPABLE) && s->tx_info.polled_sub_address[0])
904 {
905 span_log(&s->logging, SPAN_LOG_FLOW, "Sending polled sub-address '%s'\n", s->tx_info.polled_sub_address);
906 send_20digit_msg_frame(s, T30_PSA, s->tx_info.polled_sub_address);
907 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_POLLED_SUBADDRESSING_CAPABLE);
908 return TRUE;
909 }
910 clr_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_POLLED_SUBADDRESSING_CAPABLE);
911 return FALSE;
912 }
913 /*- End of function --------------------------------------------------------*/
914
915 static int send_sep_frame(t30_state_t *s)
916 {
917 if (test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_SELECTIVE_POLLING_CAPABLE) && s->tx_info.selective_polling_address[0])
918 {
919 span_log(&s->logging, SPAN_LOG_FLOW, "Sending selective polling address '%s'\n", s->tx_info.selective_polling_address);
920 send_20digit_msg_frame(s, T30_SEP, s->tx_info.selective_polling_address);
921 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_SELECTIVE_POLLING_CAPABLE);
922 return TRUE;
923 }
924 clr_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_SELECTIVE_POLLING_CAPABLE);
925 return FALSE;
926 }
927 /*- End of function --------------------------------------------------------*/
928
929 static int send_sid_frame(t30_state_t *s)
930 {
931 /* Only send if there is an ID to send. */
932 if (test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_PASSWORD) && s->tx_info.sender_ident[0])
933 {
934 span_log(&s->logging, SPAN_LOG_FLOW, "Sending sender identification '%s'\n", s->tx_info.sender_ident);
935 send_20digit_msg_frame(s, T30_SID, s->tx_info.sender_ident);
936 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_SENDER_ID_TRANSMISSION);
937 return TRUE;
938 }
939 clr_ctrl_bit(s->dcs_frame, T30_DCS_BIT_SENDER_ID_TRANSMISSION);
940 return FALSE;
941 }
942 /*- End of function --------------------------------------------------------*/
943
944 static int send_pwd_frame(t30_state_t *s)
945 {
946 /* Only send if there is a password to send. */
947 if (test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_PASSWORD) && s->tx_info.password[0])
948 {
949 span_log(&s->logging, SPAN_LOG_FLOW, "Sending password '%s'\n", s->tx_info.password);
950 send_20digit_msg_frame(s, T30_PWD, s->tx_info.password);
951 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_PASSWORD);
952 return TRUE;
953 }
954 clr_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_PASSWORD);
955 return FALSE;
956 }
957 /*- End of function --------------------------------------------------------*/
958
959 static int send_sub_frame(t30_state_t *s)
960 {
961 /* Only send if there is a sub-address to send. */
962 if (test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_SUBADDRESSING_CAPABLE) && s->tx_info.sub_address[0])
963 {
964 span_log(&s->logging, SPAN_LOG_FLOW, "Sending sub-address '%s'\n", s->tx_info.sub_address);
965 send_20digit_msg_frame(s, T30_SUB, s->tx_info.sub_address);
966 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_SUBADDRESS_TRANSMISSION);
967 return TRUE;
968 }
969 clr_ctrl_bit(s->dcs_frame, T30_DCS_BIT_SUBADDRESS_TRANSMISSION);
970 return FALSE;
971 }
972 /*- End of function --------------------------------------------------------*/
973
974 static int send_tsa_frame(t30_state_t *s)
975 {
976 if ((test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T37) || test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T38)) && 0)
977 {
978 span_log(&s->logging, SPAN_LOG_FLOW, "Sending transmitting subscriber internet address '%s'\n", "");
979 return TRUE;
980 }
981 return FALSE;
982 }
983 /*- End of function --------------------------------------------------------*/
984
985 static int send_ira_frame(t30_state_t *s)
986 {
987 if (test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_INTERNET_ROUTING_ADDRESS) && 0)
988 {
989 span_log(&s->logging, SPAN_LOG_FLOW, "Sending internet routing address '%s'\n", "");
990 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_INTERNET_ROUTING_ADDRESS_TRANSMISSION);
991 return TRUE;
992 }
993 clr_ctrl_bit(s->dcs_frame, T30_DCS_BIT_INTERNET_ROUTING_ADDRESS_TRANSMISSION);
994 return FALSE;
995 }
996 /*- End of function --------------------------------------------------------*/
997
998 static int send_cia_frame(t30_state_t *s)
999 {
1000 if ((test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T37) || test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T38)) && 0)
1001 {
1002 span_log(&s->logging, SPAN_LOG_FLOW, "Sending calling subscriber internet address '%s'\n", "");
1003 return TRUE;
1004 }
1005 return FALSE;
1006 }
1007 /*- End of function --------------------------------------------------------*/
1008
1009 static int send_isp_frame(t30_state_t *s)
1010 {
1011 if (test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_INTERNET_SELECTIVE_POLLING_ADDRESS) && 0)
1012 {
1013 span_log(&s->logging, SPAN_LOG_FLOW, "Sending internet selective polling address '%s'\n", "");
1014 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_INTERNET_SELECTIVE_POLLING_ADDRESS);
1015 return TRUE;
1016 }
1017 clr_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_INTERNET_SELECTIVE_POLLING_ADDRESS);
1018 return FALSE;
1019 }
1020 /*- End of function --------------------------------------------------------*/
1021
1022 #if 0
1023 static int send_csa_frame(t30_state_t *s)
1024 {
1025 #if 0
1026 if (("in T.37 mode" || "in T.38 mode") && 0)
1027 {
1028 span_log(&s->logging, SPAN_LOG_FLOW, "Sending called subscriber internet address '%s'\n", "");
1029 return TRUE;
1030 }
1031 #endif
1032 return FALSE;
1033 }
1034 /*- End of function --------------------------------------------------------*/
1035 #endif
1036
1037 static int send_pps_frame(t30_state_t *s)
1038 {
1039 uint8_t frame[7];
1040
1041 frame[0] = ADDRESS_FIELD;
1042 frame[1] = CONTROL_FIELD_FINAL_FRAME;
1043 frame[2] = (uint8_t) (T30_PPS | s->dis_received);
1044 frame[3] = (s->ecm_at_page_end) ? ((uint8_t) (s->next_tx_step | s->dis_received)) : T30_NULL;
1045 frame[4] = (uint8_t) (s->tx_page_number & 0xFF);
1046 frame[5] = (uint8_t) (s->ecm_block & 0xFF);
1047 frame[6] = (uint8_t) ((s->ecm_frames_this_tx_burst == 0) ? 0 : (s->ecm_frames_this_tx_burst - 1));
1048 span_log(&s->logging, SPAN_LOG_FLOW, "Sending PPS + %s\n", t30_frametype(frame[3]));
1049 send_frame(s, frame, 7);
1050 return frame[3] & 0xFE;
1051 }
1052 /*- End of function --------------------------------------------------------*/
1053
1054 static int set_dis_or_dtc(t30_state_t *s)
1055 {
1056 /* Whether we use a DIS or a DTC is determined by whether we have received a DIS.
1057 We just need to edit the prebuilt message. */
1058 s->local_dis_dtc_frame[2] = (uint8_t) (T30_DIS | s->dis_received);
1059 /* If we have a file name to receive into, then we are receive capable */
1060 if (s->rx_file[0])
1061 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_READY_TO_RECEIVE_FAX_DOCUMENT);
1062 else
1063 clr_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_READY_TO_RECEIVE_FAX_DOCUMENT);
1064 /* If we have a file name to transmit, then we are ready to transmit (polling) */
1065 if (s->tx_file[0])
1066 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_READY_TO_TRANSMIT_FAX_DOCUMENT);
1067 else
1068 clr_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_READY_TO_TRANSMIT_FAX_DOCUMENT);
1069 return 0;
1070 }
1071 /*- End of function --------------------------------------------------------*/
1072
1073 int t30_build_dis_or_dtc(t30_state_t *s)
1074 {
1075 int i;
1076
1077 /* Build a skeleton for the DIS and DTC messages. This will be edited for
1078 the dynamically changing capabilities (e.g. can receive) just before
1079 it is sent. It might also be edited if the application changes our
1080 capabilities (e.g. disabling fine mode). Right now we set up all the
1081 unchanging stuff about what we are capable of doing. */
1082 s->local_dis_dtc_frame[0] = ADDRESS_FIELD;
1083 s->local_dis_dtc_frame[1] = CONTROL_FIELD_FINAL_FRAME;
1084 s->local_dis_dtc_frame[2] = (uint8_t) (T30_DIS | s->dis_received);
1085 for (i = 3; i < 19; i++)
1086 s->local_dis_dtc_frame[i] = 0x00;
1087
1088 /* Always say 256 octets per ECM frame preferred, as 64 is never used in the
1089 real world. */
1090 if ((s->iaf & T30_IAF_MODE_T37))
1091 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T37);
1092 if ((s->iaf & T30_IAF_MODE_T38))
1093 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T38);
1094 /* No 3G mobile */
1095 /* No V.8 */
1096 /* 256 octets preferred - don't bother making this optional, as everything uses 256 */
1097 /* Ready to transmit a fax (polling) will be determined separately, and this message edited. */
1098 /* Ready to receive a fax will be determined separately, and this message edited. */
1099 /* With no modems set we are actually selecting V.27ter fallback at 2400bps */
1100 if ((s->supported_modems & T30_SUPPORT_V27TER))
1101 set_ctrl_bit(s->local_dis_dtc_frame, 12);
1102 if ((s->supported_modems & T30_SUPPORT_V29))
1103 set_ctrl_bit(s->local_dis_dtc_frame, 11);
1104 /* V.17 is only valid when combined with V.29 and V.27ter, so if we enable V.17 we force the others too. */
1105 if ((s->supported_modems & T30_SUPPORT_V17))
1106 s->local_dis_dtc_frame[4] |= (DISBIT6 | DISBIT4 | DISBIT3);
1107 if ((s->supported_resolutions & T30_SUPPORT_FINE_RESOLUTION))
1108 set_ctrl_bit(s->local_dis_dtc_frame, 15);
1109 if ((s->supported_compressions & T30_SUPPORT_T4_2D_COMPRESSION))
1110 set_ctrl_bit(s->local_dis_dtc_frame, 16);
1111 /* 215mm wide is always supported */
1112 if ((s->supported_image_sizes & T30_SUPPORT_303MM_WIDTH))
1113 set_ctrl_bit(s->local_dis_dtc_frame, 18);
1114 else if ((s->supported_image_sizes & T30_SUPPORT_255MM_WIDTH))
1115 set_ctrl_bit(s->local_dis_dtc_frame, 17);
1116 /* A4 is always supported. */
1117 if ((s->supported_image_sizes & T30_SUPPORT_UNLIMITED_LENGTH))
1118 set_ctrl_bit(s->local_dis_dtc_frame, 20);
1119 else if ((s->supported_image_sizes & T30_SUPPORT_B4_LENGTH))
1120 set_ctrl_bit(s->local_dis_dtc_frame, 19);
1121 /* No scan-line padding required, but some may be specified by the application. */
1122 set_ctrl_bits(s->local_dis_dtc_frame, s->local_min_scan_time_code, 21);
1123 if ((s->supported_compressions & T30_SUPPORT_NO_COMPRESSION))
1124 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_UNCOMPRESSED_CAPABLE);
1125 if (s->ecm_allowed)
1126 {
1127 /* ECM allowed */
1128 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_ECM_CAPABLE);
1129 /* Only offer the option of fancy compression schemes, if we are
1130 also offering the ECM option needed to support them. */
1131 if ((s->supported_compressions & T30_SUPPORT_T6_COMPRESSION))
1132 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T6_CAPABLE);
1133 if ((s->supported_compressions & T30_SUPPORT_T43_COMPRESSION))
1134 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T43_CAPABLE);
1135 #if 0
1136 if ((s->supported_compressions & T30_SUPPORT_T45_COMPRESSION))
1137 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T45_CAPABLE);
1138 if ((s->supported_compressions & T30_SUPPORT_T81_COMPRESSION))
1139 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T81_CAPABLE);
1140 if ((s->supported_compressions & T30_SUPPORT_SYCC_T81_COMPRESSION))
1141 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_SYCC_T81_CAPABLE);
1142 if ((s->supported_compressions & T30_SUPPORT_T85_COMPRESSION))
1143 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T85_CAPABLE);
1144 /* No T.85 optional L0. */
1145 //if ((s->supported_compressions & T30_SUPPORT_T85_L0_COMPRESSION))
1146 // set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T85_L0_CAPABLE);
1147 //if ((s->supported_compressions & T30_SUPPORT_T89_COMPRESSION))
1148 // set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T89_CAPABLE);
1149 #endif
1150 }
1151 if ((s->supported_t30_features & T30_SUPPORT_FIELD_NOT_VALID))
1152 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_FNV_CAPABLE);
1153 if ((s->supported_t30_features & T30_SUPPORT_MULTIPLE_SELECTIVE_POLLING))
1154 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_MULTIPLE_SELECTIVE_POLLING_CAPABLE);
1155 if ((s->supported_t30_features & T30_SUPPORT_POLLED_SUB_ADDRESSING))
1156 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_POLLED_SUBADDRESSING_CAPABLE);
1157 /* No plane interleave */
1158 /* No G.726 */
1159 /* No extended voice coding */
1160 if ((s->supported_resolutions & T30_SUPPORT_SUPERFINE_RESOLUTION))
1161 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_200_400_CAPABLE);
1162 if ((s->supported_resolutions & T30_SUPPORT_300_300_RESOLUTION))
1163 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_300_300_CAPABLE);
1164 if ((s->supported_resolutions & (T30_SUPPORT_400_400_RESOLUTION | T30_SUPPORT_R16_RESOLUTION)))
1165 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_400_400_CAPABLE);
1166 /* Metric */
1167 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_METRIC_RESOLUTION_PREFERRED);
1168 /* Superfine minimum scan line time pattern follows fine */
1169 if ((s->supported_t30_features & T30_SUPPORT_SELECTIVE_POLLING))
1170 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_SELECTIVE_POLLING_CAPABLE);
1171 if ((s->supported_t30_features & T30_SUPPORT_SUB_ADDRESSING))
1172 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_SUBADDRESSING_CAPABLE);
1173 if ((s->supported_t30_features & T30_SUPPORT_IDENTIFICATION))
1174 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_PASSWORD);
1175 /* Ready to transmit a data file (polling) */
1176 if (s->tx_file[0])
1177 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_READY_TO_TRANSMIT_DATA_FILE);
1178 /* No Binary file transfer (BFT) */
1179 /* No Document transfer mode (DTM) */
1180 /* No Electronic data interchange (EDI) */
1181 /* No Basic transfer mode (BTM) */
1182 /* No mixed mode (polling) */
1183 /* No character mode */
1184 /* No mixed mode (T.4/Annex E) */
1185 /* No mode 26 (T.505) */
1186 /* No digital network capability */
1187 /* No duplex operation */
1188 /* No JPEG */
1189 /* No full colour */
1190 /* No 12bits/pel */
1191 /* No sub-sampling (1:1:1) */
1192 /* No custom illuminant */
1193 /* No custom gamut range */
1194 if ((s->supported_image_sizes & T30_SUPPORT_US_LETTER_LENGTH))
1195 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_NORTH_AMERICAN_LETTER_CAPABLE);
1196 if ((s->supported_image_sizes & T30_SUPPORT_US_LEGAL_LENGTH))
1197 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_NORTH_AMERICAN_LEGAL_CAPABLE);
1198 /* No HKM key management */
1199 /* No RSA key management */
1200 /* No override */
1201 /* No HFX40 cipher */
1202 /* No alternative cipher number 2 */
1203 /* No alternative cipher number 3 */
1204 /* No HFX40-I hashing */
1205 /* No alternative hashing system number 2 */
1206 /* No alternative hashing system number 3 */
1207 /* No T.44 (mixed raster content) */
1208 /* No page length maximum strip size for T.44 (mixed raster content) */
1209 /* No colour/grey scale 300x300 or 400x400 */
1210 /* No colour/grey scale 100x100 */
1211 /* No simple phase C BFT negotiations */
1212 /* No extended BFT negotiations */
1213 if ((s->supported_t30_features & T30_SUPPORT_INTERNET_SELECTIVE_POLLING_ADDRESS))
1214 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_INTERNET_SELECTIVE_POLLING_ADDRESS);
1215 if ((s->supported_t30_features & T30_SUPPORT_INTERNET_ROUTING_ADDRESS))
1216 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_INTERNET_ROUTING_ADDRESS);
1217 if ((s->supported_resolutions & T30_SUPPORT_600_600_RESOLUTION))
1218 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_600_600_CAPABLE);
1219 if ((s->supported_resolutions & T30_SUPPORT_1200_1200_RESOLUTION))
1220 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_1200_1200_CAPABLE);
1221 if ((s->supported_resolutions & T30_SUPPORT_300_600_RESOLUTION))
1222 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_300_600_CAPABLE);
1223 if ((s->supported_resolutions & T30_SUPPORT_400_800_RESOLUTION))
1224 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_400_800_CAPABLE);
1225 if ((s->supported_resolutions & T30_SUPPORT_600_1200_RESOLUTION))
1226 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_600_1200_CAPABLE);
1227 /* No colour/grey scale 600x600 */
1228 /* No colour/grey scale 1200x1200 */
1229 /* No double sided printing (alternate mode) */
1230 /* No double sided printing (continuous mode) */
1231 /* No black and white mixed raster content profile */
1232 /* No shared data memory */
1233 /* No T.44 colour space */
1234 if ((s->iaf & T30_IAF_MODE_FLOW_CONTROL))
1235 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T38_FLOW_CONTROL_CAPABLE);
1236 /* No k > 4 */
1237 if ((s->iaf & T30_IAF_MODE_CONTINUOUS_FLOW))
1238 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T38_FAX_CAPABLE);
1239 /* No T.89 profile */
1240 s->local_dis_dtc_len = 19;
1241 //t30_decode_dis_dtc_dcs(s, s->local_dis_dtc_frame, s->local_dis_dtc_len);
1242 return 0;
1243 }
1244 /*- End of function --------------------------------------------------------*/
1245
1246 static int prune_dis_dtc(t30_state_t *s)
1247 {
1248 int i;
1249
1250 /* Find the last octet that is really needed, set the extension bits, and trim the message length */
1251 for (i = 18; i >= 6; i--)
1252 {
1253 /* Strip the top bit */
1254 s->local_dis_dtc_frame[i] &= (DISBIT1 | DISBIT2 | DISBIT3 | DISBIT4 | DISBIT5 | DISBIT6 | DISBIT7);
1255 /* Check if there is some real message content here */
1256 if (s->local_dis_dtc_frame[i])
1257 break;
1258 }
1259 s->local_dis_dtc_len = i + 1;
1260 /* Fill in any required extension bits */
1261 s->local_dis_dtc_frame[i] &= ~DISBIT8;
1262 for (i--; i > 4; i--)
1263 s->local_dis_dtc_frame[i] |= DISBIT8;
1264 t30_decode_dis_dtc_dcs(s, s->local_dis_dtc_frame, s->local_dis_dtc_len);
1265 return s->local_dis_dtc_len;
1266 }
1267 /*- End of function --------------------------------------------------------*/
1268
1269 static int build_dcs(t30_state_t *s)
1270 {
1271 int i;
1272 int bad;
1273
1274 /* Make a DCS frame based on local issues and the latest received DIS/DTC frame. Negotiate
1275 the result based on what both parties can do. */
1276 s->dcs_frame[0] = ADDRESS_FIELD;
1277 s->dcs_frame[1] = CONTROL_FIELD_FINAL_FRAME;
1278 s->dcs_frame[2] = (uint8_t) (T30_DCS | s->dis_received);
1279 for (i = 3; i < 19; i++)
1280 s->dcs_frame[i] = 0x00;
1281
1282 #if 0
1283 /* Check for T.37 simple mode. */
1284 if (test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T37))
1285 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_T37);
1286 /* Check for T.38 mode. */
1287 if (test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T38))
1288 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_T38);
1289 #endif
1290
1291 /* Set to required modem rate */
1292 s->dcs_frame[4] |= fallback_sequence[s->current_fallback].dcs_code;
1293
1294 /* Select the compression to use. */
1295 switch (s->line_encoding)
1296 {
1297 #if 0
1298 case T4_COMPRESSION_ITU_T85:
1299 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_T85_MODE);
1300 //set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_T85_L0_MODE);
1301 set_ctrl_bits(s->dcs_frame, T30_MIN_SCAN_0MS, 21);
1302 break;
1303 #endif
1304 case T4_COMPRESSION_ITU_T6:
1305 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_T6_MODE);
1306 set_ctrl_bits(s->dcs_frame, T30_MIN_SCAN_0MS, 21);
1307 break;
1308 case T4_COMPRESSION_ITU_T4_2D:
1309 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_2D_CODING);
1310 set_ctrl_bits(s->dcs_frame, s->min_scan_time_code, 21);
1311 break;
1312 case T4_COMPRESSION_ITU_T4_1D:
1313 set_ctrl_bits(s->dcs_frame, s->min_scan_time_code, 21);
1314 break;
1315 default:
1316 set_ctrl_bits(s->dcs_frame, T30_MIN_SCAN_0MS, 21);
1317 break;
1318 }
1319 /* We have a file to send, so tell the far end to go into receive mode. */
1320 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_RECEIVE_FAX_DOCUMENT);
1321 /* Set the Y resolution bits */
1322 bad = T30_ERR_OK;
1323 switch (s->y_resolution)
1324 {
1325 case T4_Y_RESOLUTION_1200:
1326 switch (s->x_resolution)
1327 {
1328 case T4_X_RESOLUTION_600:
1329 if (!(s->supported_resolutions & T30_SUPPORT_600_1200_RESOLUTION))
1330 bad = T30_ERR_NORESSUPPORT;
1331 else
1332 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_600_1200);
1333 break;
1334 case T4_X_RESOLUTION_1200:
1335 if (!(s->supported_resolutions & T30_SUPPORT_1200_1200_RESOLUTION))
1336 bad = T30_ERR_NORESSUPPORT;
1337 else
1338 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_1200_1200);
1339 break;
1340 default:
1341 bad = T30_ERR_NORESSUPPORT;
1342 break;
1343 }
1344 break;
1345 case T4_Y_RESOLUTION_800:
1346 switch (s->x_resolution)
1347 {
1348 case T4_X_RESOLUTION_R16:
1349 if (!(s->supported_resolutions & T30_SUPPORT_400_800_RESOLUTION))
1350 bad = T30_ERR_NORESSUPPORT;
1351 else
1352 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_400_800);
1353 break;
1354 default:
1355 bad = T30_ERR_NORESSUPPORT;
1356 break;
1357 }
1358 break;
1359 case T4_Y_RESOLUTION_600:
1360 switch (s->x_resolution)
1361 {
1362 case T4_X_RESOLUTION_300:
1363 if (!(s->supported_resolutions & T30_SUPPORT_300_600_RESOLUTION))
1364 bad = T30_ERR_NORESSUPPORT;
1365 else
1366 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_300_600);
1367 break;
1368 case T4_X_RESOLUTION_600:
1369 if (!(s->supported_resolutions & T30_SUPPORT_600_600_RESOLUTION))
1370 bad = T30_ERR_NORESSUPPORT;
1371 else
1372 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_600_600);
1373 break;
1374 default:
1375 bad = T30_ERR_NORESSUPPORT;
1376 break;
1377 }
1378 break;
1379 case T4_Y_RESOLUTION_SUPERFINE:
1380 if (!(s->supported_resolutions & T30_SUPPORT_SUPERFINE_RESOLUTION))
1381 {
1382 bad = T30_ERR_NORESSUPPORT;
1383 }
1384 else
1385 {
1386 switch (s->x_resolution)
1387 {
1388 case T4_X_RESOLUTION_R8:
1389 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_200_400);
1390 break;
1391 case T4_X_RESOLUTION_R16:
1392 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_400_400);
1393 break;
1394 default:
1395 bad = T30_ERR_NORESSUPPORT;
1396 break;
1397 }
1398 }
1399 break;
1400 case T4_Y_RESOLUTION_300:
1401 switch (s->x_resolution)
1402 {
1403 case T4_X_RESOLUTION_300:
1404 if (!(s->supported_resolutions & T30_SUPPORT_300_300_RESOLUTION))
1405 bad = T30_ERR_NORESSUPPORT;
1406 else
1407 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_300_300);
1408 break;
1409 default:
1410 bad = T30_ERR_NORESSUPPORT;
1411 break;
1412 }
1413 break;
1414 case T4_Y_RESOLUTION_FINE:
1415 if (!(s->supported_resolutions & T30_SUPPORT_FINE_RESOLUTION))
1416 {
1417 bad = T30_ERR_NORESSUPPORT;
1418 }
1419 else
1420 {
1421 switch (s->x_resolution)
1422 {
1423 case T4_X_RESOLUTION_R8:
1424 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_200_200);
1425 break;
1426 default:
1427 bad = T30_ERR_NORESSUPPORT;
1428 break;
1429 }
1430 }
1431 break;
1432 default:
1433 case T4_Y_RESOLUTION_STANDARD:
1434 switch (s->x_resolution)
1435 {
1436 case T4_X_RESOLUTION_R8:
1437 /* No bits to set for this */
1438 break;
1439 default:
1440 bad = T30_ERR_NORESSUPPORT;
1441 break;
1442 }
1443 break;
1444 }
1445 if (bad != T30_ERR_OK)
1446 {
1447 s->current_status = bad;
1448 span_log(&s->logging, SPAN_LOG_FLOW, "Image resolution (%d x %d) not acceptable\n", s->x_resolution, s->y_resolution);
1449 return -1;
1450 }
1451 /* Deal with the image width. The X resolution will fall in line with any valid width. */
1452 /* Low (R4) res widths are not supported in recent versions of T.30 */
1453 bad = T30_ERR_OK;
1454 /* The following treats a width field of 11 like 10, which does what note 6 of Table 2/T.30
1455 says we should do with the invalid value 11. */
1456 switch (s->image_width)
1457 {
1458 case T4_WIDTH_R8_A4:
1459 case T4_WIDTH_300_A4:
1460 case T4_WIDTH_R16_A4:
1461 case T4_WIDTH_600_A4:
1462 case T4_WIDTH_1200_A4:
1463 /* No width related bits need to be set. */
1464 break;
1465 case T4_WIDTH_R8_B4:
1466 case T4_WIDTH_300_B4:
1467 case T4_WIDTH_R16_B4:
1468 case T4_WIDTH_600_B4:
1469 case T4_WIDTH_1200_B4:
1470 if ((s->far_dis_dtc_frame[5] & (DISBIT2 | DISBIT1)) < 1)
1471 bad = T30_ERR_NOSIZESUPPORT;
1472 else if (!(s->supported_image_sizes & T30_SUPPORT_255MM_WIDTH))
1473 bad = T30_ERR_NOSIZESUPPORT;
1474 else
1475 set_ctrl_bit(s->dcs_frame, 17);
1476 break;
1477 case T4_WIDTH_R8_A3:
1478 case T4_WIDTH_300_A3:
1479 case T4_WIDTH_R16_A3:
1480 case T4_WIDTH_600_A3:
1481 case T4_WIDTH_1200_A3:
1482 if ((s->far_dis_dtc_frame[5] & (DISBIT2 | DISBIT1)) < 2)
1483 bad = T30_ERR_NOSIZESUPPORT;
1484 else if (!(s->supported_image_sizes & T30_SUPPORT_303MM_WIDTH))
1485 bad = T30_ERR_NOSIZESUPPORT;
1486 else
1487 set_ctrl_bit(s->dcs_frame, 18);
1488 break;
1489 default:
1490 /* T.30 does not support this width */
1491 bad = T30_ERR_NOSIZESUPPORT;
1492 break;
1493 }
1494 if (bad != T30_ERR_OK)
1495 {
1496 s->current_status = bad;
1497 span_log(&s->logging, SPAN_LOG_FLOW, "Image width (%d pixels) not an acceptable FAX image width\n", s->image_width);
1498 return -1;
1499 }
1500 switch (s->image_width)
1501 {
1502 case T4_WIDTH_R8_A4:
1503 case T4_WIDTH_R8_B4:
1504 case T4_WIDTH_R8_A3:
1505 /* These are always OK */
1506 break;
1507 case T4_WIDTH_300_A4:
1508 case T4_WIDTH_300_B4:
1509 case T4_WIDTH_300_A3:
1510 if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_300_300_CAPABLE) && !test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_300_600_CAPABLE))
1511 bad = T30_ERR_NOSIZESUPPORT;
1512 break;
1513 case T4_WIDTH_R16_A4:
1514 case T4_WIDTH_R16_B4:
1515 case T4_WIDTH_R16_A3:
1516 if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_400_400_CAPABLE))
1517 bad = T30_ERR_NOSIZESUPPORT;
1518 break;
1519 case T4_WIDTH_600_A4:
1520 case T4_WIDTH_600_B4:
1521 case T4_WIDTH_600_A3:
1522 if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_600_600_CAPABLE) && !test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_600_1200_CAPABLE))
1523 bad = T30_ERR_NOSIZESUPPORT;
1524 break;
1525 case T4_WIDTH_1200_A4:
1526 case T4_WIDTH_1200_B4:
1527 case T4_WIDTH_1200_A3:
1528 if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_1200_1200_CAPABLE))
1529 bad = T30_ERR_NOSIZESUPPORT;
1530 break;
1531 default:
1532 /* T.30 does not support this width */
1533 bad = T30_ERR_NOSIZESUPPORT;
1534 break;
1535 }
1536 if (bad != T30_ERR_OK)
1537 {
1538 s->current_status = bad;
1539 span_log(&s->logging, SPAN_LOG_FLOW, "Image width (%d pixels) not an acceptable FAX image width\n", s->image_width);
1540 return -1;
1541 }
1542 /* Deal with the image length */
1543 /* If the other end supports unlimited length, then use that. Otherwise, if the other end supports
1544 B4 use that, as its longer than the default A4 length. */
1545 if (test_ctrl_bit(s->far_dis_dtc_frame, 20))
1546 set_ctrl_bit(s->dcs_frame, 20);
1547 else if (test_ctrl_bit(s->far_dis_dtc_frame, 19))
1548 set_ctrl_bit(s->dcs_frame, 19);
1549
1550 if (s->error_correcting_mode)
1551 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_ECM);
1552
1553 if ((s->iaf & T30_IAF_MODE_FLOW_CONTROL) && test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T38_FLOW_CONTROL_CAPABLE))
1554 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_T38_FLOW_CONTROL_CAPABLE);
1555 if ((s->iaf & T30_IAF_MODE_CONTINUOUS_FLOW) && test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T38_FAX_CAPABLE))
1556 {
1557 /* Clear the modem type bits, in accordance with note 77 of Table 2/T.30 */
1558 clr_ctrl_bit(s->local_dis_dtc_frame, 11);
1559 clr_ctrl_bit(s->local_dis_dtc_frame, 12);
1560 clr_ctrl_bit(s->local_dis_dtc_frame, 13);
1561 clr_ctrl_bit(s->local_dis_dtc_frame, 14);
1562 set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_T38_FAX_MODE);
1563 }
1564 s->dcs_len = 19;
1565 //t30_decode_dis_dtc_dcs(s, s->dcs_frame, s->dcs_len);
1566 return 0;
1567 }
1568 /*- End of function --------------------------------------------------------*/
1569
1570 static int prune_dcs(t30_state_t *s)
1571 {
1572 int i;
1573
1574 /* Find the last octet that is really needed, set the extension bits, and trim the message length */
1575 for (i = 18; i >= 6; i--)
1576 {
1577 /* Strip the top bit */
1578 s->dcs_frame[i] &= (DISBIT1 | DISBIT2 | DISBIT3 | DISBIT4 | DISBIT5 | DISBIT6 | DISBIT7);
1579 /* Check if there is some real message content here */
1580 if (s->dcs_frame[i])
1581 break;
1582 }
1583 s->dcs_len = i + 1;
1584 /* Fill in any required extension bits */
1585 s->local_dis_dtc_frame[i] &= ~DISBIT8;
1586 for (i-- ; i > 4; i--)
1587 s->dcs_frame[i] |= DISBIT8;
1588 t30_decode_dis_dtc_dcs(s, s->dcs_frame, s->dcs_len);
1589 return s->dcs_len;
1590 }
1591 /*- End of function --------------------------------------------------------*/
1592
1593 static int step_fallback_entry(t30_state_t *s)
1594 {
1595 int min_row_bits;
1596
1597 while (fallback_sequence[++s->current_fallback].which)
1598 {
1599 if ((fallback_sequence[s->current_fallback].which & s->current_permitted_modems))
1600 break;
1601 }
1602 if (fallback_sequence[s->current_fallback].which == 0)
1603 return -1;
1604 /* TODO: This only sets the minimum row time for future pages. It doesn't fix up the
1605 current page, though it is benign - fallback will only result in an excessive
1606 minimum. */
1607 min_row_bits = set_min_scan_time_code(s);
1608 t4_tx_set_min_row_bits(&s->t4, min_row_bits);
1609 /* We need to rebuild the DCS message we will send. */
1610 build_dcs(s);
1611 return s->current_fallback;
1612 }
1613 /*- End of function --------------------------------------------------------*/
1614
1615 static int find_fallback_entry(int dcs_code)
1616 {
1617 int i;
1618
1619 /* The table is short, and not searched often, so a brain-dead linear scan seems OK */
1620 for (i = 0; fallback_sequence[i].bit_rate; i++)
1621 {
1622 if (fallback_sequence[i].dcs_code == dcs_code)
1623 break;
1624 }
1625 if (fallback_sequence[i].bit_rate == 0)
1626 return -1;
1627 return i;
1628 }
1629 /*- End of function --------------------------------------------------------*/
1630
1631 static void send_dcn(t30_state_t *s)
1632 {
1633 queue_phase(s, T30_PHASE_D_TX);
1634 set_state(s, T30_STATE_C);
1635 send_simple_frame(s, T30_DCN);
1636 }
1637 /*- End of function --------------------------------------------------------*/
1638
1639 static void return_to_phase_b(t30_state_t *s, int with_fallback)
1640 {
1641 /* This is what we do after things like T30_EOM is exchanged. */
1642 #if 0
1643 if (step_fallback_entry(s) < 0)
1644 {
1645 /* We have fallen back as far as we can go. Give up. */
1646 s->current_fallback = 0;
1647 s->current_status = T30_ERR_CANNOT_TRAIN;
1648 send_dcn(s);
1649 }
1650 else
1651 {
1652 if (s->calling_party)
1653 set_state(s, T30_STATE_T);
1654 else
1655 set_state(s, T30_STATE_R);
1656 }
1657 #else
1658 if (s->calling_party)
1659 set_state(s, T30_STATE_T);
1660 else
1661 set_state(s, T30_STATE_R);
1662 #endif
1663 }
1664 /*- End of function --------------------------------------------------------*/
1665
1666 static int send_dis_or_dtc_sequence(t30_state_t *s, int start)
1667 {
1668 /* (NSF) (CSI) DIS */
1669 /* (NSC) (CIG) (PWD) (SEP) (PSA) (CIA) (ISP) DTC */
1670 if (start)
1671 {
1672 set_dis_or_dtc(s);
1673 set_state(s, T30_STATE_R);
1674 s->step = 0;
1675 }
1676 if (!s->dis_received)
1677 {
1678 /* DIS sequence */
1679 switch (s->step)
1680 {
1681 case 0:
1682 s->step++;
1683 if (send_nsf_frame(s))
1684 break;
1685 /* Fall through */
1686 case 1:
1687 s->step++;
1688 if (send_ident_frame(s, T30_CSI))
1689 break;
1690 /* Fall through */
1691 case 2:
1692 s->step++;
1693 prune_dis_dtc(s);
1694 send_frame(s, s->local_dis_dtc_frame, s->local_dis_dtc_len);
1695 break;
1696 case 3:
1697 s->step++;
1698 /* Shut down HDLC transmission. */
1699 if (s->send_hdlc_handler)
1700 s->send_hdlc_handler(s->send_hdlc_user_data, NULL, 0);
1701 break;
1702 default:
1703 return -1;
1704 }
1705 }
1706 else
1707 {
1708 /* DTC sequence */
1709 switch (s->step)
1710 {
1711 case 0:
1712 s->step++;
1713 if (send_nsc_frame(s))
1714 break;
1715 /* Fall through */
1716 case 1:
1717 s->step++;
1718 if (send_ident_frame(s, T30_CIG))
1719 break;
1720 /* Fall through */
1721 case 2:
1722 s->step++;
1723 if (send_pwd_frame(s))
1724 break;
1725 /* Fall through */
1726 case 3:
1727 s->step++;
1728 if (send_sep_frame(s))
1729 break;
1730 /* Fall through */
1731 case 4:
1732 s->step++;
1733 if (send_psa_frame(s))
1734 break;
1735 /* Fall through */
1736 case 5:
1737 s->step++;
1738 if (send_cia_frame(s))
1739 break;
1740 /* Fall through */
1741 case 6:
1742 s->step++;
1743 if (send_isp_frame(s))
1744 break;
1745 /* Fall through */
1746 case 7:
1747 s->step++;
1748 prune_dis_dtc(s);
1749 send_frame(s, s->local_dis_dtc_frame, s->local_dis_dtc_len);
1750 break;
1751 case 8:
1752 s->step++;
1753 /* Shut down HDLC transmission. */
1754 if (s->send_hdlc_handler)
1755 s->send_hdlc_handler(s->send_hdlc_user_data, NULL, 0);
1756 break;
1757 default:
1758 return -1;
1759 }
1760 }
1761 return 0;
1762 }
1763 /*- End of function --------------------------------------------------------*/
1764
1765 static int send_dcs_sequence(t30_state_t *s, int start)
1766 {
1767 /* (NSS) (TSI) (SUB) (SID) (TSA) (IRA) DCS */
1768 /* Schedule training after the messages */
1769 if (start)
1770 {
1771 prune_dcs(s);
1772 set_state(s, T30_STATE_D);
1773 s->step = 0;
1774 }
1775 switch (s->step)
1776 {
1777 case 0:
1778 s->step++;
1779 if (send_nss_frame(s))
1780 break;
1781 /* Fall through */
1782 case 1:
1783 s->step++;
1784 if (send_ident_frame(s, T30_TSI))
1785 break;
1786 /* Fall through */
1787 case 2:
1788 s->step++;
1789 if (send_sub_frame(s))
1790 break;
1791 /* Fall through */
1792 case 3:
1793 s->step++;
1794 if (send_sid_frame(s))
1795 break;
1796 /* Fall through */
1797 case 4:
1798 s->step++;
1799 if (send_tsa_frame(s))
1800 break;
1801 /* Fall through */
1802 case 5:
1803 s->step++;
1804 if (send_ira_frame(s))
1805 break;
1806 /* Fall through */
1807 case 6:
1808 s->step++;
1809 prune_dcs(s);
1810 send_frame(s, s->dcs_frame, s->dcs_len);
1811 break;
1812 case 7:
1813 s->step++;
1814 /* Shut down HDLC transmission. */
1815 if (s->send_hdlc_handler)
1816 s->send_hdlc_handler(s->send_hdlc_user_data, NULL, 0);
1817 break;
1818 default:
1819 return -1;
1820 }
1821 return 0;
1822 }
1823 /*- End of function --------------------------------------------------------*/
1824
1825 static int send_cfr_sequence(t30_state_t *s, int start)
1826 {
1827 /* (CSA) CFR */
1828 /* CFR is usually a simple frame, but can become a sequence with Internet
1829 FAXing. */
1830 send_simple_frame(s, T30_CFR);
1831 return 0;
1832 }
1833 /*- End of function --------------------------------------------------------*/
1834
1835 static void disconnect(t30_state_t *s)
1836 {
1837 span_log(&s->logging, SPAN_LOG_FLOW, "Disconnecting\n");
1838 /* Make sure any FAX in progress is tidied up. If the tidying up has
1839 already happened, repeating it here is harmless. */
1840 switch (s->operation_in_progress)
1841 {
1842 case OPERATION_IN_PROGRESS_T4_TX:
1843 t4_tx_release(&s->t4);
1844 break;
1845 case OPERATION_IN_PROGRESS_T4_RX:
1846 t4_rx_release(&s->t4);
1847 break;
1848 }
1849 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
1850 s->timer_t0_t1 = 0;
1851 s->timer_t2_t4 = 0;
1852 s->timer_t3 = 0;
1853 s->timer_t5 = 0;
1854 set_phase(s, T30_PHASE_E);
1855 set_state(s, T30_STATE_B);
1856 }
1857 /*- End of function --------------------------------------------------------*/
1858
1859 static int set_min_scan_time_code(t30_state_t *s)
1860 {
1861 /* Translation between the codes for the minimum scan times the other end needs,
1862 and the codes for what we say will be used. We need 0 minimum. */
1863 static const uint8_t translate_min_scan_time[3][8] =
1864 {
1865 {T30_MIN_SCAN_20MS, T30_MIN_SCAN_5MS, T30_MIN_SCAN_10MS, T30_MIN_SCAN_20MS, T30_MIN_SCAN_40MS, T30_MIN_SCAN_40MS, T30_MIN_SCAN_10MS, T30_MIN_SCAN_0MS}, /* normal */
1866 {T30_MIN_SCAN_20MS, T30_MIN_SCAN_5MS, T30_MIN_SCAN_10MS, T30_MIN_SCAN_10MS, T30_MIN_SCAN_40MS, T30_MIN_SCAN_20MS, T30_MIN_SCAN_5MS, T30_MIN_SCAN_0MS}, /* fine */
1867 {T30_MIN_SCAN_10MS, T30_MIN_SCAN_5MS, T30_MIN_SCAN_5MS, T30_MIN_SCAN_5MS, T30_MIN_SCAN_20MS, T30_MIN_SCAN_10MS, T30_MIN_SCAN_5MS, T30_MIN_SCAN_0MS} /* superfine, when half fine time is selected */
1868 };
1869 /* Translation between the codes for the minimum scan time we will use, and milliseconds. */
1870 static const int min_scan_times[8] =
1871 {
1872 20, 5, 10, 0, 40, 0, 0, 0
1873 };
1874 int min_bits_field;
1875
1876 /* Set the minimum scan time bits */
1877 if (s->error_correcting_mode)
1878 min_bits_field = T30_MIN_SCAN_0MS;
1879 else
1880 min_bits_field = (s->far_dis_dtc_frame[5] >> 4) & 7;
1881 switch (s->y_resolution)
1882 {
1883 case T4_Y_RESOLUTION_SUPERFINE:
1884 if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_200_400_CAPABLE))
1885 {
1886 s->current_status = T30_ERR_NORESSUPPORT;
1887 span_log(&s->logging, SPAN_LOG_FLOW, "Remote FAX does not support super-fine resolution.\n");
1888 return -1;
1889 }
1890 s->min_scan_time_code = translate_min_scan_time[(test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_MIN_SCAN_TIME_HALVES)) ? 2 : 1][min_bits_field];
1891 break;
1892 case T4_Y_RESOLUTION_FINE:
1893 if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_200_200_CAPABLE))
1894 {
1895 s->current_status = T30_ERR_NORESSUPPORT;
1896 span_log(&s->logging, SPAN_LOG_FLOW, "Remote FAX does not support fine resolution.\n");
1897 return -1;
1898 }
1899 s->min_scan_time_code = translate_min_scan_time[1][min_bits_field];
1900 break;
1901 default:
1902 case T4_Y_RESOLUTION_STANDARD:
1903 s->min_scan_time_code = translate_min_scan_time[0][min_bits_field];
1904 break;
1905 }
1906 if (!s->error_correcting_mode && (s->iaf & T30_IAF_MODE_NO_FILL_BITS))
1907 return 0;
1908 return fallback_sequence[s->current_fallback].bit_rate*min_scan_times[s->min_scan_time_code]/1000;
1909 }
1910 /*- End of function --------------------------------------------------------*/
1911
1912 static int start_sending_document(t30_state_t *s)
1913 {
1914 int min_row_bits;
1915
1916 if (s->tx_file[0] == '\0')
1917 {
1918 /* There is nothing to send */
1919 span_log(&s->logging, SPAN_LOG_FLOW, "No document to send\n");
1920 return -1;
1921 }
1922 span_log(&s->logging, SPAN_LOG_FLOW, "Start sending document\n");
1923 if (t4_tx_init(&s->t4, s->tx_file, s->tx_start_page, s->tx_stop_page) == NULL)
1924 {
1925 span_log(&s->logging, SPAN_LOG_WARNING, "Cannot open source TIFF file '%s'\n", s->tx_file);
1926 s->current_status = T30_ERR_FILEERROR;
1927 return -1;
1928 }
1929 s->operation_in_progress = OPERATION_IN_PROGRESS_T4_TX;
1930 t4_tx_get_pages_in_file(&s->t4);
1931 t4_tx_set_tx_encoding(&s->t4, s->line_encoding);
1932 t4_tx_set_local_ident(&s->t4, s->tx_info.ident);
1933 t4_tx_set_header_info(&s->t4, s->header_info);
1934
1935 s->x_resolution = t4_tx_get_x_resolution(&s->t4);
1936 s->y_resolution = t4_tx_get_y_resolution(&s->t4);
1937 /* The minimum scan time to be used can't be evaluated until we know the Y resolution, and
1938 must be evaluated before the minimum scan row bits can be evaluated. */
1939 if ((min_row_bits = set_min_scan_time_code(s)) < 0)
1940 {
1941 t4_tx_release(&s->t4);
1942 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
1943 return -1;
1944 }
1945 span_log(&s->logging, SPAN_LOG_FLOW, "Minimum bits per row will be %d\n", min_row_bits);
1946 t4_tx_set_min_row_bits(&s->t4, min_row_bits);
1947
1948 if (tx_start_page(s))
1949 return -1;
1950 s->image_width = t4_tx_get_image_width(&s->t4);
1951 if (s->error_correcting_mode)
1952 {
1953 if (get_partial_ecm_page(s) == 0)
1954 span_log(&s->logging, SPAN_LOG_WARNING, "No image data to send\n");
1955 }
1956 return 0;
1957 }
1958 /*- End of function --------------------------------------------------------*/
1959
1960 static int restart_sending_document(t30_state_t *s)
1961 {
1962 t4_tx_restart_page(&s->t4);
1963 s->retries = 0;
1964 s->ecm_block = 0;
1965 send_dcs_sequence(s, TRUE);
1966 return 0;
1967 }
1968 /*- End of function --------------------------------------------------------*/
1969
1970 static int start_receiving_document(t30_state_t *s)
1971 {
1972 if (s->rx_file[0] == '\0')
1973 {
1974 /* There is nothing to receive to */
1975 span_log(&s->logging, SPAN_LOG_FLOW, "No document to receive\n");
1976 return -1;
1977 }
1978 span_log(&s->logging, SPAN_LOG_FLOW, "Start receiving document\n");
1979 queue_phase(s, T30_PHASE_B_TX);
1980 s->ecm_block = 0;
1981 send_dis_or_dtc_sequence(s, TRUE);
1982 return 0;
1983 }
1984 /*- End of function --------------------------------------------------------*/
1985
1986 static void unexpected_non_final_frame(t30_state_t *s, const uint8_t *msg, int len)
1987 {
1988 span_log(&s->logging, SPAN_LOG_FLOW, "Unexpected %s frame in state %d\n", t30_frametype(msg[2]), s->state);
1989 if (s->current_status == T30_ERR_OK)
1990 s->current_status = T30_ERR_UNEXPECTED;
1991 }
1992 /*- End of function --------------------------------------------------------*/
1993
1994 static void unexpected_final_frame(t30_state_t *s, const uint8_t *msg, int len)
1995 {
1996 span_log(&s->logging, SPAN_LOG_FLOW, "Unexpected %s frame in state %d\n", t30_frametype(msg[2]), s->state);
1997 if (s->current_status == T30_ERR_OK)
1998 s->current_status = T30_ERR_UNEXPECTED;
1999 send_dcn(s);
2000 }
2001 /*- End of function --------------------------------------------------------*/
2002
2003 static void unexpected_frame_length(t30_state_t *s, const uint8_t *msg, int len)
2004 {
2005 span_log(&s->logging, SPAN_LOG_FLOW, "Unexpected %s frame length - %d\n", t30_frametype(msg[0]), len);
2006 if (s->current_status == T30_ERR_OK)
2007 s->current_status = T30_ERR_UNEXPECTED;
2008 send_dcn(s);
2009 }
2010 /*- End of function --------------------------------------------------------*/
2011
2012 static int process_rx_dis_dtc(t30_state_t *s, const uint8_t *msg, int len)
2013 {
2014 int new_status;
2015
2016 t30_decode_dis_dtc_dcs(s, msg, len);
2017 if (len < 6)
2018 {
2019 span_log(&s->logging, SPAN_LOG_FLOW, "Short DIS/DTC frame\n");
2020 return -1;
2021 }
2022
2023 if (msg[2] == T30_DIS)
2024 s->dis_received = TRUE;
2025 /* Make a local copy of the message, padded to the maximum possible length with zeros. This allows
2026 us to simply pick out the bits, without worrying about whether they were set from the remote side. */
2027 s->far_dis_dtc_len = (len > T30_MAX_DIS_DTC_DCS_LEN) ? T30_MAX_DIS_DTC_DCS_LEN : len;
2028 memcpy(s->far_dis_dtc_frame, msg, s->far_dis_dtc_len);
2029 if (s->far_dis_dtc_len < T30_MAX_DIS_DTC_DCS_LEN)
2030 memset(s->far_dis_dtc_frame + s->far_dis_dtc_len, 0, T30_MAX_DIS_DTC_DCS_LEN - s->far_dis_dtc_len);
2031 s->error_correcting_mode = (s->ecm_allowed && (s->far_dis_dtc_frame[6] & DISBIT3) != 0);
2032 /* 256 octets per ECM frame */
2033 s->octets_per_ecm_frame = 256;
2034 /* Select the compression to use. */
2035 #if 0
2036 if (s->error_correcting_mode && (s->supported_compressions & T30_SUPPORT_T85_COMPRESSION) && test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T85_CAPABLE))
2037 {
2038 s->line_encoding = T4_COMPRESSION_ITU_T85;
2039 }
2040 else if (s->error_correcting_mode && (s->supported_compressions & T30_SUPPORT_T6_COMPRESSION) && test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T6_CAPABLE))
2041 #else
2042 if (s->error_correcting_mode && (s->supported_compressions & T30_SUPPORT_T6_COMPRESSION) && test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T6_CAPABLE))
2043 #endif
2044 {
2045 s->line_encoding = T4_COMPRESSION_ITU_T6;
2046 }
2047 else if ((s->supported_compressions & T30_SUPPORT_T4_2D_COMPRESSION) && test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_2D_CAPABLE))
2048 {
2049 s->line_encoding = T4_COMPRESSION_ITU_T4_2D;
2050 }
2051 else
2052 {
2053 s->line_encoding = T4_COMPRESSION_ITU_T4_1D;
2054 }
2055 span_log(&s->logging, SPAN_LOG_FLOW, "Selected compression %s (%d)\n", t4_encoding_to_str(s->line_encoding), s->line_encoding);
2056 switch (s->far_dis_dtc_frame[4] & (DISBIT6 | DISBIT5 | DISBIT4 | DISBIT3))
2057 {
2058 case (DISBIT6 | DISBIT4 | DISBIT3):
2059 if ((s->supported_modems & T30_SUPPORT_V17))
2060 {
2061 s->current_permitted_modems = T30_SUPPORT_V17 | T30_SUPPORT_V29 | T30_SUPPORT_V27TER;
2062 s->current_fallback = T30_V17_FALLBACK_START;
2063 break;
2064 }
2065 /* Fall through */
2066 case (DISBIT4 | DISBIT3):
2067 if ((s->supported_modems & T30_SUPPORT_V29))
2068 {
2069 s->current_permitted_modems = T30_SUPPORT_V29 | T30_SUPPORT_V27TER;
2070 s->current_fallback = T30_V29_FALLBACK_START;
2071 break;
2072 }
2073 /* Fall through */
2074 case DISBIT4:
2075 s->current_permitted_modems = T30_SUPPORT_V27TER;
2076 s->current_fallback = T30_V27TER_FALLBACK_START;
2077 break;
2078 case 0:
2079 s->current_permitted_modems = T30_SUPPORT_V27TER;
2080 s->current_fallback = T30_V27TER_FALLBACK_START + 1;
2081 break;
2082 case DISBIT3:
2083 if ((s->supported_modems & T30_SUPPORT_V29))
2084 {
2085 /* TODO: this doesn't allow for skipping the V.27ter modes */
2086 s->current_permitted_modems = T30_SUPPORT_V29;
2087 s->current_fallback = T30_V29_FALLBACK_START;
2088 break;
2089 }
2090 /* Fall through */
2091 default:
2092 span_log(&s->logging, SPAN_LOG_FLOW, "Remote does not support a compatible modem\n");
2093 /* We cannot talk to this machine! */
2094 s->current_status = T30_ERR_INCOMPATIBLE;
2095 return -1;
2096 }
2097 if (s->phase_b_handler)
2098 {
2099 new_status = s->phase_b_handler(s, s->phase_b_user_data, msg[2]);
2100 if (new_status != T30_ERR_OK)
2101 {
2102 span_log(&s->logging, SPAN_LOG_FLOW, "Application rejected DIS/DTC - '%s'\n", t30_completion_code_to_str(new_status));
2103 s->current_status = new_status;
2104 /* TODO: If FNV is allowed, process it here */
2105 send_dcn(s);
2106 return -1;
2107 }
2108 }
2109 queue_phase(s, T30_PHASE_B_TX);
2110 /* Try to send something */
2111 if (s->tx_file[0])
2112 {
2113 span_log(&s->logging, SPAN_LOG_FLOW, "Trying to send file '%s'\n", s->tx_file);
2114 if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_READY_TO_RECEIVE_FAX_DOCUMENT))
2115 {
2116 span_log(&s->logging, SPAN_LOG_FLOW, "%s far end cannot receive\n", t30_frametype(msg[2]));
2117 s->current_status = T30_ERR_RX_INCAPABLE;
2118 send_dcn(s);
2119 }
2120 if (start_sending_document(s))
2121 {
2122 send_dcn(s);
2123 return -1;
2124 }
2125 if (build_dcs(s))
2126 {
2127 span_log(&s->logging, SPAN_LOG_FLOW, "The far end is incompatible\n", s->tx_file);
2128 send_dcn(s);
2129 return -1;
2130 }
2131 s->retries = 0;
2132 send_dcs_sequence(s, TRUE);
2133 return 0;
2134 }
2135 span_log(&s->logging, SPAN_LOG_FLOW, "%s nothing to send\n", t30_frametype(msg[2]));
2136 /* ... then try to receive something */
2137 if (s->rx_file[0])
2138 {
2139 span_log(&s->logging, SPAN_LOG_FLOW, "Trying to receive file '%s'\n", s->rx_file);
2140 if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_READY_TO_TRANSMIT_FAX_DOCUMENT))
2141 {
2142 span_log(&s->logging, SPAN_LOG_FLOW, "%s far end cannot transmit\n", t30_frametype(msg[2]));
2143 s->current_status = T30_ERR_TX_INCAPABLE;
2144 send_dcn(s);
2145 return -1;
2146 }
2147 if (start_receiving_document(s))
2148 {
2149 send_dcn(s);
2150 return -1;
2151 }
2152 if (set_dis_or_dtc(s))
2153 {
2154 s->current_status = T30_ERR_INCOMPATIBLE;
2155 send_dcn(s);
2156 return -1;
2157 }
2158 s->retries = 0;
2159 send_dis_or_dtc_sequence(s, TRUE);
2160 return 0;
2161 }
2162 span_log(&s->logging, SPAN_LOG_FLOW, "%s nothing to receive\n", t30_frametype(msg[2]));
2163 /* There is nothing to do, or nothing we are able to do. */
2164 send_dcn(s);
2165 return -1;
2166 }
2167 /*- End of function --------------------------------------------------------*/
2168
2169 static int process_rx_dcs(t30_state_t *s, const uint8_t *msg, int len)
2170 {
2171 static const int widths[6][4] =
2172 {
2173 { T4_WIDTH_R4_A4, T4_WIDTH_R4_B4, T4_WIDTH_R4_A3, -1}, /* R4 resolution - no longer used in recent versions of T.30 */
2174 { T4_WIDTH_R8_A4, T4_WIDTH_R8_B4, T4_WIDTH_R8_A3, -1}, /* R8 resolution */
2175 { T4_WIDTH_300_A4, T4_WIDTH_300_B4, T4_WIDTH_300_A3, -1}, /* 300/inch resolution */
2176 { T4_WIDTH_R16_A4, T4_WIDTH_R16_B4, T4_WIDTH_R16_A3, -1}, /* R16 resolution */
2177 { T4_WIDTH_600_A4, T4_WIDTH_600_B4, T4_WIDTH_600_A3, -1}, /* 600/inch resolution */
2178 {T4_WIDTH_1200_A4, T4_WIDTH_1200_B4, T4_WIDTH_1200_A3, -1} /* 1200/inch resolution */
2179 };
2180 uint8_t dcs_frame[T30_MAX_DIS_DTC_DCS_LEN];
2181 int i;
2182 int new_status;
2183
2184 t30_decode_dis_dtc_dcs(s, msg, len);
2185
2186 /* Check DCS frame from remote */
2187 if (len < 6)
2188 {
2189 span_log(&s->logging, SPAN_LOG_FLOW, "Short DCS frame\n");
2190 return -1;
2191 }
2192
2193 /* Make an ASCII string format copy of the message, for logging in the
2194 received file. This string does not include the frame header octets. */
2195 sprintf(s->rx_dcs_string, "%02X", bit_reverse8(msg[3]));
2196 for (i = 4; i < len; i++)
2197 sprintf(s->rx_dcs_string + 3*i - 10, " %02X", bit_reverse8(msg[i]));
2198 /* Make a local copy of the message, padded to the maximum possible length with zeros. This allows
2199 us to simply pick out the bits, without worrying about whether they were set from the remote side. */
2200 if (len > T30_MAX_DIS_DTC_DCS_LEN)
2201 {
2202 memcpy(dcs_frame, msg, T30_MAX_DIS_DTC_DCS_LEN);
2203 }
2204 else
2205 {
2206 memcpy(dcs_frame, msg, len);
2207 if (len < T30_MAX_DIS_DTC_DCS_LEN)
2208 memset(dcs_frame + len, 0, T30_MAX_DIS_DTC_DCS_LEN - len);
2209 }
2210
2211 s->octets_per_ecm_frame = test_ctrl_bit(dcs_frame, T30_DCS_BIT_64_OCTET_ECM_FRAMES) ? 256 : 64;
2212
2213 if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_1200_1200))
2214 s->x_resolution = T4_X_RESOLUTION_1200;
2215 else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_600_600) || test_ctrl_bit(dcs_frame, T30_DCS_BIT_600_1200))
2216 s->x_resolution = T4_X_RESOLUTION_600;
2217 else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_400_400) || test_ctrl_bit(dcs_frame, T30_DCS_BIT_400_800))
2218 s->x_resolution = T4_X_RESOLUTION_R16;
2219 else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_300_300) || test_ctrl_bit(dcs_frame, T30_DCS_BIT_300_600))
2220 s->x_resolution = T4_X_RESOLUTION_300;
2221 else
2222 s->x_resolution = T4_X_RESOLUTION_R8;
2223
2224 if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_1200_1200) || test_ctrl_bit(dcs_frame, T30_DCS_BIT_600_1200))
2225 s->y_resolution = T4_Y_RESOLUTION_1200;
2226 else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_400_800))
2227 s->y_resolution = T4_Y_RESOLUTION_800;
2228 else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_600_600) || test_ctrl_bit(dcs_frame, T30_DCS_BIT_300_600))
2229 s->y_resolution = T4_Y_RESOLUTION_600;
2230 else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_200_400) || test_ctrl_bit(dcs_frame, T30_DCS_BIT_400_400))
2231 s->y_resolution = T4_Y_RESOLUTION_SUPERFINE;
2232 else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_300_300))
2233 s->y_resolution = T4_Y_RESOLUTION_300;
2234 else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_200_200))
2235 s->y_resolution = T4_Y_RESOLUTION_FINE;
2236 else
2237 s->y_resolution = T4_Y_RESOLUTION_STANDARD;
2238
2239 if (s->x_resolution == T4_X_RESOLUTION_1200)
2240 i = 5;
2241 else if (s->x_resolution == T4_X_RESOLUTION_600)
2242 i = 4;
2243 else if (s->x_resolution == T4_X_RESOLUTION_R16)
2244 i = 3;
2245 else if (s->x_resolution == T4_X_RESOLUTION_300)
2246 i = 2;
2247 else if (s->x_resolution == T4_X_RESOLUTION_R4)
2248 i = 0;
2249 else
2250 i = 1;
2251
2252 s->image_width = widths[i][dcs_frame[5] & (DISBIT2 | DISBIT1)];
2253
2254 /* Check which compression we will use. */
2255 #if 0
2256 if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_T85_MODE))
2257 s->line_encoding = T4_COMPRESSION_ITU_T85;
2258 else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_T6_MODE))
2259 #else
2260 if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_T6_MODE))
2261 #endif
2262 s->line_encoding = T4_COMPRESSION_ITU_T6;
2263 else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_2D_CODING))
2264 s->line_encoding = T4_COMPRESSION_ITU_T4_2D;
2265 else
2266 s->line_encoding = T4_COMPRESSION_ITU_T4_1D;
2267 span_log(&s->logging, SPAN_LOG_FLOW, "Selected compression %d\n", s->line_encoding);
2268 if (!test_ctrl_bit(dcs_frame, T30_DCS_BIT_RECEIVE_FAX_DOCUMENT))
2269 span_log(&s->logging, SPAN_LOG_PROTOCOL_WARNING, "Remote is not requesting receive in DCS\n");
2270
2271 if ((s->current_fallback = find_fallback_entry(dcs_frame[4] & (DISBIT6 | DISBIT5 | DISBIT4 | DISBIT3))) < 0)
2272 {
2273 span_log(&s->logging, SPAN_LOG_FLOW, "Remote asked for a modem standard we do not support\n");
2274 return -1;
2275 }
2276 s->error_correcting_mode = (test_ctrl_bit(dcs_frame, T30_DCS_BIT_ECM) != 0);
2277
2278 if (s->phase_b_handler)
2279 {
2280 new_status = s->phase_b_handler(s, s->phase_b_user_data, msg[2]);
2281 if (new_status != T30_ERR_OK)
2282 {
2283 span_log(&s->logging, SPAN_LOG_FLOW, "Application rejected DCS - '%s'\n", t30_completion_code_to_str(new_status));
2284 s->current_status = new_status;
2285 /* TODO: If FNV is allowed, process it here */
2286 send_dcn(s);
2287 return -1;
2288 }
2289 }
2290 /* Start document reception */
2291 span_log(&s->logging,
2292 SPAN_LOG_FLOW,
2293 "Get document at %dbps, modem %d\n",
2294 fallback_sequence[s->current_fallback].bit_rate,
2295 fallback_sequence[s->current_fallback].modem_type);
2296 if (s->rx_file[0] == '\0')
2297 {
2298 span_log(&s->logging, SPAN_LOG_FLOW, "No document to receive\n");
2299 s->current_status = T30_ERR_FILEERROR;
2300 send_dcn(s);
2301 return -1;
2302 }
2303 if (!s->in_message)
2304 {
2305 if (t4_rx_init(&s->t4, s->rx_file, s->output_encoding) == NULL)
2306 {
2307 span_log(&s->logging, SPAN_LOG_WARNING, "Cannot open target TIFF file '%s'\n", s->rx_file);
2308 s->current_status = T30_ERR_FILEERROR;
2309 send_dcn(s);
2310 return -1;
2311 }
2312 s->operation_in_progress = OPERATION_IN_PROGRESS_T4_RX;
2313 }
2314 if (!(s->iaf & T30_IAF_MODE_NO_TCF))
2315 {
2316 /* TCF is always sent with long training */
2317 s->short_train = FALSE;
2318 set_state(s, T30_STATE_F_TCF);
2319 queue_phase(s, T30_PHASE_C_NON_ECM_RX);
2320 timer_t2_start(s);
2321 }
2322 return 0;
2323 }
2324 /*- End of function --------------------------------------------------------*/
2325
2326 static int send_deferred_pps_response(t30_state_t *s)
2327 {
2328 queue_phase(s, T30_PHASE_D_TX);
2329 if (s->ecm_first_bad_frame >= s->ecm_frames)
2330 {
2331 /* Everything was OK. We can accept the data and move on. */
2332 t30_ecm_commit_partial_page(s);
2333 switch (s->last_pps_fcf2)
2334 {
2335 case T30_NULL:
2336 /* We can confirm this partial page. */
2337 break;
2338 default:
2339 /* We can confirm the whole page. */
2340 s->next_rx_step = s->last_pps_fcf2;
2341 rx_end_page(s);
2342 if (s->phase_d_handler)
2343 s->phase_d_handler(s, s->phase_d_user_data, s->last_pps_fcf2);
2344 rx_start_page(s);
2345 break;
2346 }
2347 set_state(s, T30_STATE_F_POST_RCP_MCF);
2348 send_simple_frame(s, T30_MCF);
2349 }
2350 else
2351 {
2352 /* We need to send the PPR frame we have created, to try to fill in the missing/bad data. */
2353 set_state(s, T30_STATE_F_POST_RCP_PPR);
2354 s->ecm_frame_map[0] = ADDRESS_FIELD;
2355 s->ecm_frame_map[1] = CONTROL_FIELD_FINAL_FRAME;
2356 s->ecm_frame_map[2] = (uint8_t) (T30_PPR | s->dis_received);
2357 send_frame(s, s->ecm_frame_map, 3 + 32);
2358 }
2359 return 0;
2360 }
2361 /*- End of function --------------------------------------------------------*/
2362
2363 static int process_rx_pps(t30_state_t *s, const uint8_t *msg, int len)
2364 {
2365 int page;
2366 int block;
2367 int frames;
2368 int i;
2369 int j;
2370 int frame_no;
2371
2372 if (len < 7)
2373 {
2374 span_log(&s->logging, SPAN_LOG_FLOW, "Bad PPS message length %d.\n", len);
2375 return -1;
2376 }
2377 s->last_pps_fcf2 = msg[3] & 0xFE;
2378 page = msg[4];
2379 block = msg[5];
2380
2381 /* The frames count is not well specified in T.30. In practice it seems it might be the
2382 number of frames in the current block, or it might be the number of frames in the
2383 current burst of transmission. For a burst of resent frames this would make it smaller
2384 than the actual size of the block. If we only accept the number when it exceeds
2385 previous values, we should get the real number of frames in the block. */
2386 frames = msg[6] + 1;
2387 if (s->ecm_frames < 0)
2388 {
2389 /* First time. Take the number and believe in it. */
2390 s->ecm_frames = frames;
2391 }
2392 else
2393 {
2394 /* If things have gone wrong, the far end might try to send us zero FCD
2395 frames. It can't represent zero in the block count field, so it might
2396 put zero there, or it might simplistically insert (blocks - 1), and put
2397 0xFF there. Beware of this. */
2398 if (frames == 0xFF)
2399 {
2400 /* This is probably zero, erroneously rolled over to the maximum count */
2401 frames = 0;
2402 }
2403 }
2404 span_log(&s->logging, SPAN_LOG_FLOW, "Received PPS + %s - page %d, block %d, %d frames\n", t30_frametype(msg[3]), page, block, frames);
2405 if (page != s->rx_page_number)
2406 {
2407 span_log(&s->logging, SPAN_LOG_FLOW, "ECM rx page mismatch - expected %d, but received %d.\n", s->rx_page_number, page);
2408 }
2409 if (block != s->ecm_block)
2410 {
2411 span_log(&s->logging, SPAN_LOG_FLOW, "ECM rx block mismatch - expected %d, but received %d.\n", s->ecm_block, block);
2412 }
2413 /* Build a bit map of which frames we now have stored OK */
2414 s->ecm_first_bad_frame = 256;
2415 for (i = 0; i < 32; i++)
2416 {
2417 s->ecm_frame_map[i + 3] = 0;
2418 for (j = 0; j < 8; j++)
2419 {
2420 frame_no = (i << 3) + j;
2421 if (s->ecm_len[frame_no] < 0)
2422 {
2423 s->ecm_frame_map[i + 3] |= (1 << j);
2424 if (frame_no < s->ecm_first_bad_frame)
2425 s->ecm_first_bad_frame = frame_no;
2426 if (frame_no < s->ecm_frames)
2427 s->error_correcting_mode_retries++;
2428 }
2429 }
2430 }
2431 /* Are there any bad frames, or does our scan represent things being OK? */
2432 switch (s->last_pps_fcf2)
2433 {
2434 case T30_NULL:
2435 case T30_EOP:
2436 case T30_PRI_EOP:
2437 case T30_EOM:
2438 case T30_PRI_EOM:
2439 case T30_EOS:
2440 case T30_MPS:
2441 case T30_PRI_MPS:
2442 if (s->receiver_not_ready_count > 0)
2443 {
2444 s->receiver_not_ready_count--;
2445 queue_phase(s, T30_PHASE_D_TX);
2446 set_state(s, T30_STATE_F_POST_RCP_RNR);
2447 send_simple_frame(s, T30_RNR);
2448 }
2449 else
2450 {
2451 send_deferred_pps_response(s);
2452 }
2453 break;
2454 default:
2455 unexpected_final_frame(s, msg, len);
2456 break;
2457 }
2458 return 0;
2459 }
2460 /*- End of function --------------------------------------------------------*/
2461
2462 static void process_rx_ppr(t30_state_t *s, const uint8_t *msg, int len)
2463 {
2464 int i;
2465 int j;
2466 int frame_no;
2467 uint8_t frame[4];
2468
2469 if (len != 3 + 32)
2470 {
2471 span_log(&s->logging, SPAN_LOG_FLOW, "Bad length for PPR bits - %d\n", len);
2472 /* TODO: probably should send DCN */
2473 return;
2474 }
2475 /* Check which frames are OK, and mark them as OK. */
2476 for (i = 0; i < 32; i++)
2477 {
2478 for (j = 0; j < 8; j++)
2479 {
2480 frame_no = (i << 3) + j;
2481 /* Tick off the frames they are not complaining about as OK */
2482 if ((msg[i + 3] & (1 << j)) == 0)
2483 {
2484 if (s->ecm_len[frame_no] >= 0)
2485 s->ecm_progress++;
2486 s->ecm_len[frame_no] = -1;
2487 }
2488 else
2489 {
2490 if (frame_no < s->ecm_frames)
2491 {
2492 span_log(&s->logging, SPAN_LOG_FLOW, "Frame %d to be resent\n", frame_no);
2493 s->error_correcting_mode_retries++;
2494 }
2495 #if 0
2496 /* Diagnostic: See if the other end is complaining about something we didn't even send this time. */
2497 if (s->ecm_len[frame_no] < 0)
2498 span_log(&s->logging, SPAN_LOG_FLOW, "PPR contains complaint about frame %d, which was not sent\n", frame_no);
2499 #endif
2500 }
2501 }
2502 }
2503 if (++s->ppr_count >= PPR_LIMIT_BEFORE_CTC_OR_EOR)
2504 {
2505 /* Continue to correct? */
2506 /* Continue only if we have been making progress */
2507 s->ppr_count = 0;
2508 if (s->ecm_progress)
2509 {
2510 s->ecm_progress = 0;
2511 queue_phase(s, T30_PHASE_D_TX);
2512 set_state(s, T30_STATE_IV_CTC);
2513 send_simple_frame(s, T30_CTC);
2514 }
2515 else
2516 {
2517 set_state(s, T30_STATE_IV_EOR);
2518 queue_phase(s, T30_PHASE_D_TX);
2519 frame[0] = ADDRESS_FIELD;
2520 frame[1] = CONTROL_FIELD_FINAL_FRAME;
2521 frame[2] = (uint8_t) (T30_EOR | s->dis_received);
2522 frame[3] = (s->ecm_at_page_end) ? ((uint8_t) (s->next_tx_step | s->dis_received)) : T30_NULL;
2523 span_log(&s->logging, SPAN_LOG_FLOW, "Sending EOR + %s\n", t30_frametype(frame[3]));
2524 send_frame(s, frame, 4);
2525 }
2526 }
2527 else
2528 {
2529 /* Initiate resending of the remainder of the frames. */
2530 set_state(s, T30_STATE_IV);
2531 queue_phase(s, T30_PHASE_C_ECM_TX);
2532 send_first_ecm_frame(s);
2533 }
2534 }
2535 /*- End of function --------------------------------------------------------*/
2536
2537 static void process_rx_fcd(t30_state_t *s, const uint8_t *msg, int len)
2538 {
2539 int frame_no;
2540
2541 /* Facsimile coded data */
2542 switch (s->state)
2543 {
2544 case T30_STATE_F_DOC_ECM:
2545 if (len <= 4 + 256)
2546 {
2547 frame_no = msg[3];
2548 /* Just store the actual image data, and record its length */
2549 span_log(&s->logging, SPAN_LOG_FLOW, "Storing ECM frame %d, length %d\n", frame_no, len - 4);
2550 memcpy(&s->ecm_data[frame_no][0], &msg[4], len - 4);
2551 s->ecm_len[frame_no] = (int16_t) (len - 4);
2552 /* In case we are just after a CTC/CTR exchange, which kicked us back to long training */
2553 s->short_train = TRUE;
2554 }
2555 else
2556 {
2557 unexpected_frame_length(s, msg, len);
2558 }
2559 /* We have received something, so any missing carrier status is out of date */
2560 if (s->current_status == T30_ERR_RX_NOCARRIER)
2561 s->current_status = T30_ERR_OK;
2562 break;
2563 default:
2564 unexpected_non_final_frame(s, msg, len);
2565 break;
2566 }
2567 }
2568 /*- End of function --------------------------------------------------------*/
2569
2570 static void process_rx_rcp(t30_state_t *s, const uint8_t *msg, int len)
2571 {
2572 /* Return to control for partial page. These might come through with or without the final frame tag.
2573 Here we deal with the "no final frame tag" case. */
2574 switch (s->state)
2575 {
2576 case T30_STATE_F_DOC_ECM:
2577 set_state(s, T30_STATE_F_POST_DOC_ECM);
2578 queue_phase(s, T30_PHASE_D_RX);
2579 timer_t2_start(s);
2580 /* We have received something, so any missing carrier status is out of date */
2581 if (s->current_status == T30_ERR_RX_NOCARRIER)
2582 s->current_status = T30_ERR_OK;
2583 break;
2584 case T30_STATE_F_POST_DOC_ECM:
2585 /* Just ignore this. It must be an extra RCP. Several are usually sent, to maximise the chance
2586 of receiving a correct one. */
2587 break;
2588 default:
2589 unexpected_non_final_frame(s, msg, len);
2590 break;
2591 }
2592 }
2593 /*- End of function --------------------------------------------------------*/
2594
2595 static void process_rx_fnv(t30_state_t *s, const uint8_t *msg, int len)
2596 {
2597 logging_state_t *log;
2598 const char *x;
2599
2600 /* Field not valid */
2601 /* TODO: analyse the message, as per 5.3.6.2.13 */
2602 if (!span_log_test(&s->logging, SPAN_LOG_FLOW))
2603 return;
2604 log = &s->logging;
2605
2606 if ((msg[3] & 0x01))
2607 span_log(log, SPAN_LOG_FLOW, " Incorrect password (PWD).\n");
2608 if ((msg[3] & 0x02))
2609 span_log(log, SPAN_LOG_FLOW, " Selective polling reference (SEP) not known.\n");
2610 if ((msg[3] & 0x04))
2611 span_log(log, SPAN_LOG_FLOW, " Sub-address (SUB) not known.\n");
2612 if ((msg[3] & 0x08))
2613 span_log(log, SPAN_LOG_FLOW, " Sender identity (SID) not known.\n");
2614 if ((msg[3] & 0x10))
2615 span_log(log, SPAN_LOG_FLOW, " Secure fax error.\n");
2616 if ((msg[3] & 0x20))
2617 span_log(log, SPAN_LOG_FLOW, " Transmitting subscriber identity (TSI) not accepted.\n");
2618 if ((msg[3] & 0x40))
2619 span_log(log, SPAN_LOG_FLOW, " Polled sub-address (PSA) not known.\n");
2620 if (len > 4 && (msg[3] & DISBIT8))
2621 {
2622 if ((msg[4] & 0x01))
2623 span_log(log, SPAN_LOG_FLOW, " BFT negotiations request not accepted.\n");
2624 if ((msg[4] & 0x02))
2625 span_log(log, SPAN_LOG_FLOW, " Internet routing address (IRA) not known.\n");
2626 if ((msg[4] & 0x04))
2627 span_log(log, SPAN_LOG_FLOW, " Internet selective polling address (ISP) not known.\n");
2628 }
2629 if (len > 5)
2630 {
2631 span_log(log, SPAN_LOG_FLOW, " FNV sequence number %d.\n", msg[5]);
2632 }
2633 if (len > 6)
2634 {
2635 switch (msg[6])
2636 {
2637 case T30_PWD:
2638 x = "Incorrect password (PWD)";
2639 break;
2640 case T30_SEP:
2641 x = "Selective polling reference (SEP) not known";
2642 break;
2643 case T30_SUB:
2644 case T30_SUB | 0x01:
2645 x = "Sub-address (SUB) not known";
2646 break;
2647 case T30_SID:
2648 case T30_SID | 0x01:
2649 x = "Sender identity (SID) not known";
2650 break;
2651 case T30_SPI:
2652 x = "Secure fax error";
2653 break;
2654 case T30_TSI:
2655 case T30_TSI | 0x01:
2656 x = "Transmitting subscriber identity (TSI) not accepted";
2657 break;
2658 case T30_PSA:
2659 x = "Polled sub-address (PSA) not known";
2660 break;
2661 default:
2662 x = "???";
2663 break;
2664 }
2665 span_log(log, SPAN_LOG_FLOW, " FNV diagnostic info type %s.\n", x);
2666 }
2667 if (len > 7)
2668 {
2669 span_log(log, SPAN_LOG_FLOW, " FNV length %d.\n", msg[7]);
2670 }
2671 /* We've decoded it, but we don't yet know how to deal with it, so treat it as unexpected */
2672 unexpected_final_frame(s, msg, len);
2673 }
2674 /*- End of function --------------------------------------------------------*/
2675
2676 static void process_state_answering(t30_state_t *s, const uint8_t *msg, int len)
2677 {
2678 uint8_t fcf;
2679
2680 /* We should be sending the TCF data right now */
2681 fcf = msg[2] & 0xFE;
2682 switch (fcf)
2683 {
2684 case T30_DIS:
2685 /* TODO: This is a fudge to allow for starting up in T.38, where the other end has
2686 seen DIS by analogue modem means, and has immediately sent DIS/DTC. We might have
2687 missed useful info, like TSI, but just accept things and carry on form now. */
2688 span_log(&s->logging, SPAN_LOG_FLOW, "DIS/DTC before DIS\n");
2689 process_rx_dis_dtc(s, msg, len);
2690 break;
2691 case T30_DCS:
2692 /* TODO: This is a fudge to allow for starting up in T.38, where the other end has
2693 seen DIS by analogue modem means, and has immediately sent DCS. We might have
2694 missed useful info, like TSI, but just accept things and carry on form now. */
2695 span_log(&s->logging, SPAN_LOG_FLOW, "DCS before DIS\n");
2696 process_rx_dcs(s, msg, len);
2697 break;
2698 case T30_DCN:
2699 s->current_status = T30_ERR_TX_GOTDCN;
2700 disconnect(s);
2701 break;
2702 default:
2703 /* We don't know what to do with this. */
2704 unexpected_final_frame(s, msg, len);
2705 break;
2706 }
2707 }
2708 /*- End of function --------------------------------------------------------*/
2709
2710 static void process_state_b(t30_state_t *s, const uint8_t *msg, int len)
2711 {
2712 uint8_t fcf;
2713
2714 fcf = msg[2] & 0xFE;
2715 switch (fcf)
2716 {
2717 case T30_DCN:
2718 /* Just ignore any DCN's which appear at this stage. */
2719 break;
2720 case T30_CRP:
2721 repeat_last_command(s);
2722 break;
2723 case T30_FNV:
2724 process_rx_fnv(s, msg, len);
2725 break;
2726 default:
2727 /* We don't know what to do with this. */
2728 unexpected_final_frame(s, msg, len);
2729 break;
2730 }
2731 }
2732 /*- End of function --------------------------------------------------------*/
2733
2734 static void process_state_c(t30_state_t *s, const uint8_t *msg, int len)
2735 {
2736 uint8_t fcf;
2737
2738 fcf = msg[2] & 0xFE;
2739 switch (fcf)
2740 {
2741 case T30_DCN:
2742 /* Just ignore any DCN's which appear at this stage. */
2743 break;
2744 case T30_CRP:
2745 repeat_last_command(s);
2746 break;
2747 case T30_FNV:
2748 process_rx_fnv(s, msg, len);
2749 break;
2750 default:
2751 /* We don't know what to do with this. */
2752 unexpected_final_frame(s, msg, len);
2753 break;
2754 }
2755 }
2756 /*- End of function --------------------------------------------------------*/
2757
2758 static void process_state_d(t30_state_t *s, const uint8_t *msg, int len)
2759 {
2760 uint8_t fcf;
2761
2762 /* We should be sending the DCS sequence right now */
2763 fcf = msg[2] & 0xFE;
2764 switch (fcf)
2765 {
2766 case T30_DCN:
2767 s->current_status = T30_ERR_TX_BADDCS;
2768 disconnect(s);
2769 break;
2770 case T30_CRP:
2771 repeat_last_command(s);
2772 break;
2773 case T30_FNV:
2774 process_rx_fnv(s, msg, len);
2775 break;
2776 default:
2777 /* We don't know what to do with this. */
2778 unexpected_final_frame(s, msg, len);
2779 break;
2780 }
2781 }
2782 /*- End of function --------------------------------------------------------*/
2783
2784 static void process_state_d_tcf(t30_state_t *s, const uint8_t *msg, int len)
2785 {
2786 uint8_t fcf;
2787
2788 /* We should be sending the TCF data right now */
2789 fcf = msg[2] & 0xFE;
2790 switch (fcf)
2791 {
2792 case T30_DCN:
2793 s->current_status = T30_ERR_TX_BADDCS;
2794 disconnect(s);
2795 break;
2796 case T30_CRP:
2797 repeat_last_command(s);
2798 break;
2799 case T30_FNV:
2800 process_rx_fnv(s, msg, len);
2801 break;
2802 default:
2803 /* We don't know what to do with this. */
2804 unexpected_final_frame(s, msg, len);
2805 break;
2806 }
2807 }
2808 /*- End of function --------------------------------------------------------*/
2809
2810 static void process_state_d_post_tcf(t30_state_t *s, const uint8_t *msg, int len)
2811 {
2812 uint8_t fcf;
2813
2814 fcf = msg[2] & 0xFE;
2815 switch (fcf)
2816 {
2817 case T30_CFR:
2818 /* Trainability test succeeded. Send the document. */
2819 span_log(&s->logging, SPAN_LOG_FLOW, "Trainability test succeeded\n");
2820 s->retries = 0;
2821 s->short_train = TRUE;
2822 if (s->error_correcting_mode)
2823 {
2824 set_state(s, T30_STATE_IV);
2825 queue_phase(s, T30_PHASE_C_ECM_TX);
2826 send_first_ecm_frame(s);
2827 }
2828 else
2829 {
2830 set_state(s, T30_STATE_I);
2831 queue_phase(s, T30_PHASE_C_NON_ECM_TX);
2832 }
2833 break;
2834 case T30_FTT:
2835 /* Trainability test failed. Try again. */
2836 span_log(&s->logging, SPAN_LOG_FLOW, "Trainability test failed\n");
2837 s->retries = 0;
2838 s->short_train = FALSE;
2839 if (step_fallback_entry(s) < 0)
2840 {
2841 /* We have fallen back as far as we can go. Give up. */
2842 s->current_fallback = 0;
2843 s->current_status = T30_ERR_CANNOT_TRAIN;
2844 send_dcn(s);
2845 break;
2846 }
2847 queue_phase(s, T30_PHASE_B_TX);
2848 send_dcs_sequence(s, TRUE);
2849 break;
2850 case T30_DIS:
2851 /* It appears they didn't see what we sent - retry the TCF */
2852 if (++s->retries >= MAX_COMMAND_TRIES)
2853 {
2854 span_log(&s->logging, SPAN_LOG_FLOW, "Too many retries. Giving up.\n");
2855 s->current_status = T30_ERR_RETRYDCN;
2856 send_dcn(s);
2857 break;
2858 }
2859 span_log(&s->logging, SPAN_LOG_FLOW, "Retry number %d\n", s->retries);
2860 queue_phase(s, T30_PHASE_B_TX);
2861 /* TODO: should we reassess the new DIS message, and possibly adjust the DCS we use? */
2862 send_dcs_sequence(s, TRUE);
2863 break;
2864 case T30_DCN:
2865 s->current_status = T30_ERR_TX_BADDCS;
2866 disconnect(s);
2867 break;
2868 case T30_CRP:
2869 repeat_last_command(s);
2870 break;
2871 case T30_FNV:
2872 process_rx_fnv(s, msg, len);
2873 break;
2874 default:
2875 /* We don't know what to do with this. */
2876 unexpected_final_frame(s, msg, len);
2877 break;
2878 }
2879 }
2880 /*- End of function --------------------------------------------------------*/
2881
2882 static void process_state_f_tcf(t30_state_t *s, const uint8_t *msg, int len)
2883 {
2884 uint8_t fcf;
2885
2886 /* We should be receiving TCF right now, not HDLC messages */
2887 fcf = msg[2] & 0xFE;
2888 switch (fcf)
2889 {
2890 case T30_CRP:
2891 repeat_last_command(s);
2892 break;
2893 case T30_FNV:
2894 process_rx_fnv(s, msg, len);
2895 break;
2896 default:
2897 /* We don't know what to do with this. */
2898 unexpected_final_frame(s, msg, len);
2899 break;
2900 }
2901 }
2902 /*- End of function --------------------------------------------------------*/
2903
2904 static void process_state_f_cfr(t30_state_t *s, const uint8_t *msg, int len)
2905 {
2906 uint8_t fcf;
2907
2908 /* We're waiting for a response to the CFR we sent */
2909 fcf = msg[2] & 0xFE;
2910 switch (fcf)
2911 {
2912 case T30_DCS:
2913 /* If we received another DCS, they must have missed our CFR */
2914 process_rx_dcs(s, msg, len);
2915 break;
2916 case T30_CRP:
2917 repeat_last_command(s);
2918 break;
2919 case T30_FNV:
2920 process_rx_fnv(s, msg, len);
2921 break;
2922 default:
2923 /* We don't know what to do with this. */
2924 unexpected_final_frame(s, msg, len);
2925 break;
2926 }
2927 }
2928 /*- End of function --------------------------------------------------------*/
2929
2930 static void process_state_f_ftt(t30_state_t *s, const uint8_t *msg, int len)
2931 {
2932 uint8_t fcf;
2933
2934 /* We're waiting for a response to the FTT we sent */
2935 fcf = msg[2] & 0xFE;
2936 switch (fcf)
2937 {
2938 case T30_DCS:
2939 process_rx_dcs(s, msg, len);
2940 break;
2941 case T30_CRP:
2942 repeat_last_command(s);
2943 break;
2944 case T30_FNV:
2945 process_rx_fnv(s, msg, len);
2946 break;
2947 default:
2948 /* We don't know what to do with this. */
2949 unexpected_final_frame(s, msg, len);
2950 break;
2951 }
2952 }
2953 /*- End of function --------------------------------------------------------*/
2954
2955 static void process_state_f_doc_non_ecm(t30_state_t *s, const uint8_t *msg, int len)
2956 {
2957 uint8_t fcf;
2958
2959 /* If we are getting HDLC messages, and we have not moved to the _POST_DOC_NON_ECM
2960 state, it looks like either:
2961 - we didn't see the image data carrier properly, or
2962 - they didn't see our T30_CFR, and are repeating the DCS/TCF sequence.
2963 - they didn't see out T30_MCF, and are repeating the end of page message. */
2964 fcf = msg[2] & 0xFE;
2965 switch (fcf)
2966 {
2967 case T30_DIS:
2968 process_rx_dis_dtc(s, msg, len);
2969 break;
2970 case T30_DCS:
2971 process_rx_dcs(s, msg, len);
2972 break;
2973 case T30_MPS:
2974 /* Treat this as a bad quality page. */
2975 if (s->phase_d_handler)
2976 s->phase_d_handler(s, s->phase_d_user_data, fcf);
2977 s->next_rx_step = msg[2] & 0xFE;
2978 queue_phase(s, T30_PHASE_D_TX);
2979 set_state(s, T30_STATE_III_Q_RTN);
2980 send_simple_frame(s, T30_RTN);
2981 break;
2982 case T30_PRI_MPS:
2983 /* Treat this as a bad quality page. */
2984 if (s->phase_d_handler)
2985 {
2986 s->phase_d_handler(s, s->phase_d_user_data, fcf);
2987 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
2988 }
2989 s->next_rx_step = msg[2] & 0xFE;
2990 set_state(s, T30_STATE_III_Q_RTN);
2991 break;
2992 case T30_EOM:
2993 case T30_EOS:
2994 /* Treat this as a bad quality page. */
2995 if (s->phase_d_handler)
2996 s->phase_d_handler(s, s->phase_d_user_data, fcf);
2997 s->next_rx_step = msg[2] & 0xFE;
2998 /* Return to phase B */
2999 queue_phase(s, T30_PHASE_B_TX);
3000 set_state(s, T30_STATE_III_Q_RTN);
3001 send_simple_frame(s, T30_RTN);
3002 break;
3003 case T30_PRI_EOM:
3004 /* Treat this as a bad quality page. */
3005 if (s->phase_d_handler)
3006 {
3007 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3008 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
3009 }
3010 s->next_rx_step = T30_PRI_EOM;
3011 set_state(s, T30_STATE_III_Q_RTN);
3012 break;
3013 case T30_EOP:
3014 /* Treat this as a bad quality page. */
3015 if (s->phase_d_handler)
3016 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3017 s->next_rx_step = msg[2] & 0xFE;
3018 queue_phase(s, T30_PHASE_D_TX);
3019 set_state(s, T30_STATE_III_Q_RTN);
3020 send_simple_frame(s, T30_RTN);
3021 break;
3022 case T30_PRI_EOP:
3023 /* Treat this as a bad quality page. */
3024 if (s->phase_d_handler)
3025 {
3026 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3027 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
3028 }
3029 s->next_rx_step = msg[2] & 0xFE;
3030 set_state(s, T30_STATE_III_Q_RTN);
3031 break;
3032 case T30_DCN:
3033 s->current_status = T30_ERR_RX_DCNDATA;
3034 disconnect(s);
3035 break;
3036 case T30_CRP:
3037 repeat_last_command(s);
3038 break;
3039 case T30_FNV:
3040 process_rx_fnv(s, msg, len);
3041 break;
3042 default:
3043 /* We don't know what to do with this. */
3044 s->current_status = T30_ERR_RX_INVALCMD;
3045 unexpected_final_frame(s, msg, len);
3046 break;
3047 }
3048 }
3049 /*- End of function --------------------------------------------------------*/
3050
3051 static void process_state_f_post_doc_non_ecm(t30_state_t *s, const uint8_t *msg, int len)
3052 {
3053 uint8_t fcf;
3054
3055 fcf = msg[2] & 0xFE;
3056 switch (fcf)
3057 {
3058 case T30_MPS:
3059 if (s->phase_d_handler)
3060 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3061 s->next_rx_step = fcf;
3062 queue_phase(s, T30_PHASE_D_TX);
3063 switch (copy_quality(s))
3064 {
3065 case T30_COPY_QUALITY_PERFECT:
3066 case T30_COPY_QUALITY_GOOD:
3067 rx_end_page(s);
3068 rx_start_page(s);
3069 set_state(s, T30_STATE_III_Q_MCF);
3070 send_simple_frame(s, T30_MCF);
3071 break;
3072 case T30_COPY_QUALITY_POOR:
3073 rx_end_page(s);
3074 rx_start_page(s);
3075 set_state(s, T30_STATE_III_Q_RTP);
3076 send_simple_frame(s, T30_RTP);
3077 break;
3078 case T30_COPY_QUALITY_BAD:
3079 rx_start_page(s);
3080 set_state(s, T30_STATE_III_Q_RTN);
3081 send_simple_frame(s, T30_RTN);
3082 break;
3083 }
3084 break;
3085 case T30_PRI_MPS:
3086 if (s->phase_d_handler)
3087 {
3088 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3089 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
3090 }
3091 s->next_rx_step = fcf;
3092 switch (copy_quality(s))
3093 {
3094 case T30_COPY_QUALITY_PERFECT:
3095 case T30_COPY_QUALITY_GOOD:
3096 rx_end_page(s);
3097 t4_rx_release(&s->t4);
3098 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
3099 s->in_message = FALSE;
3100 set_state(s, T30_STATE_III_Q_MCF);
3101 break;
3102 case T30_COPY_QUALITY_POOR:
3103 rx_end_page(s);
3104 t4_rx_release(&s->t4);
3105 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
3106 s->in_message = FALSE;
3107 set_state(s, T30_STATE_III_Q_RTP);
3108 break;
3109 case T30_COPY_QUALITY_BAD:
3110 set_state(s, T30_STATE_III_Q_RTN);
3111 break;
3112 }
3113 break;
3114 case T30_EOM:
3115 case T30_EOS:
3116 if (s->phase_d_handler)
3117 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3118 s->next_rx_step = fcf;
3119 /* Return to phase B */
3120 queue_phase(s, T30_PHASE_B_TX);
3121 switch (copy_quality(s))
3122 {
3123 case T30_COPY_QUALITY_PERFECT:
3124 case T30_COPY_QUALITY_GOOD:
3125 rx_end_page(s);
3126 rx_start_page(s);
3127 set_state(s, T30_STATE_III_Q_MCF);
3128 send_simple_frame(s, T30_MCF);
3129 break;
3130 case T30_COPY_QUALITY_POOR:
3131 rx_end_page(s);
3132 rx_start_page(s);
3133 set_state(s, T30_STATE_III_Q_RTP);
3134 send_simple_frame(s, T30_RTP);
3135 break;
3136 case T30_COPY_QUALITY_BAD:
3137 rx_start_page(s);
3138 set_state(s, T30_STATE_III_Q_RTN);
3139 send_simple_frame(s, T30_RTN);
3140 break;
3141 }
3142 break;
3143 case T30_PRI_EOM:
3144 if (s->phase_d_handler)
3145 {
3146 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3147 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
3148 }
3149 s->next_rx_step = fcf;
3150 switch (copy_quality(s))
3151 {
3152 case T30_COPY_QUALITY_PERFECT:
3153 case T30_COPY_QUALITY_GOOD:
3154 rx_end_page(s);
3155 t4_rx_release(&s->t4);
3156 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
3157 s->in_message = FALSE;
3158 set_state(s, T30_STATE_III_Q_MCF);
3159 break;
3160 case T30_COPY_QUALITY_POOR:
3161 rx_end_page(s);
3162 t4_rx_release(&s->t4);
3163 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
3164 s->in_message = FALSE;
3165 set_state(s, T30_STATE_III_Q_RTP);
3166 break;
3167 case T30_COPY_QUALITY_BAD:
3168 set_state(s, T30_STATE_III_Q_RTN);
3169 break;
3170 }
3171 break;
3172 case T30_EOP:
3173 if (s->phase_d_handler)
3174 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3175 s->next_rx_step = fcf;
3176 queue_phase(s, T30_PHASE_D_TX);
3177 switch (copy_quality(s))
3178 {
3179 case T30_COPY_QUALITY_PERFECT:
3180 case T30_COPY_QUALITY_GOOD:
3181 rx_end_page(s);
3182 t4_rx_release(&s->t4);
3183 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
3184 s->in_message = FALSE;
3185 set_state(s, T30_STATE_III_Q_MCF);
3186 send_simple_frame(s, T30_MCF);
3187 break;
3188 case T30_COPY_QUALITY_POOR:
3189 rx_end_page(s);
3190 t4_rx_release(&s->t4);
3191 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
3192 s->in_message = FALSE;
3193 set_state(s, T30_STATE_III_Q_RTP);
3194 send_simple_frame(s, T30_RTP);
3195 break;
3196 case T30_COPY_QUALITY_BAD:
3197 set_state(s, T30_STATE_III_Q_RTN);
3198 send_simple_frame(s, T30_RTN);
3199 break;
3200 }
3201 break;
3202 case T30_PRI_EOP:
3203 if (s->phase_d_handler)
3204 {
3205 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3206 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
3207 }
3208 s->next_rx_step = fcf;
3209 switch (copy_quality(s))
3210 {
3211 case T30_COPY_QUALITY_PERFECT:
3212 case T30_COPY_QUALITY_GOOD:
3213 rx_end_page(s);
3214 t4_rx_release(&s->t4);
3215 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
3216 s->in_message = FALSE;
3217 set_state(s, T30_STATE_III_Q_MCF);
3218 break;
3219 case T30_COPY_QUALITY_POOR:
3220 rx_end_page(s);
3221 t4_rx_release(&s->t4);
3222 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
3223 s->in_message = FALSE;
3224 set_state(s, T30_STATE_III_Q_RTP);
3225 break;
3226 case T30_COPY_QUALITY_BAD:
3227 set_state(s, T30_STATE_III_Q_RTN);
3228 break;
3229 }
3230 break;
3231 case T30_DCN:
3232 s->current_status = T30_ERR_RX_DCNFAX;
3233 disconnect(s);
3234 break;
3235 case T30_CRP:
3236 repeat_last_command(s);
3237 break;
3238 case T30_FNV:
3239 process_rx_fnv(s, msg, len);
3240 break;
3241 default:
3242 /* We don't know what to do with this. */
3243 s->current_status = T30_ERR_RX_INVALCMD;
3244 unexpected_final_frame(s, msg, len);
3245 break;
3246 }
3247 }
3248 /*- End of function --------------------------------------------------------*/
3249
3250 static void process_state_f_doc_and_post_doc_ecm(t30_state_t *s, const uint8_t *msg, int len)
3251 {
3252 uint8_t fcf;
3253 uint8_t fcf2;
3254
3255 /* This actually handles 2 states - _DOC_ECM and _POST_DOC_ECM - as they are very similar */
3256 fcf = msg[2] & 0xFE;
3257 switch (fcf)
3258 {
3259 case T30_DIS:
3260 process_rx_dis_dtc(s, msg, len);
3261 break;
3262 case T30_DCS:
3263 process_rx_dcs(s, msg, len);
3264 break;
3265 case T4_RCP:
3266 /* Return to control for partial page. These might come through with or without the final frame tag.
3267 Here we deal with the "final frame tag" case. */
3268 if (s->state == T30_STATE_F_DOC_ECM)
3269 {
3270 /* Return to control for partial page */
3271 set_state(s, T30_STATE_F_POST_DOC_ECM);
3272 queue_phase(s, T30_PHASE_D_RX);
3273 timer_t2_start(s);
3274 /* We have received something, so any missing carrier status is out of date */
3275 if (s->current_status == T30_ERR_RX_NOCARRIER)
3276 s->current_status = T30_ERR_OK;
3277 }
3278 else
3279 {
3280 /* Just ignore this. It must be an extra RCP. Several are usually sent, to maximise the chance
3281 of receiving a correct one. */
3282 }
3283 break;
3284 case T30_EOR:
3285 if (len != 4)
3286 {
3287 unexpected_frame_length(s, msg, len);
3288 break;
3289 }
3290 fcf2 = msg[3] & 0xFE;
3291 span_log(&s->logging, SPAN_LOG_FLOW, "Received EOR + %s\n", t30_frametype(msg[3]));
3292 switch (fcf2)
3293 {
3294 case T30_PRI_EOP:
3295 case T30_PRI_EOM:
3296 case T30_PRI_MPS:
3297 /* TODO: Alert operator */
3298 /* Fall through */
3299 case T30_NULL:
3300 case T30_EOP:
3301 case T30_EOM:
3302 case T30_EOS:
3303 case T30_MPS:
3304 s->next_rx_step = fcf2;
3305 queue_phase(s, T30_PHASE_D_TX);
3306 set_state(s, T30_STATE_F_DOC_ECM);
3307 send_simple_frame(s, T30_ERR);
3308 break;
3309 default:
3310 unexpected_final_frame(s, msg, len);
3311 break;
3312 }
3313 break;
3314 case T30_PPS:
3315 process_rx_pps(s, msg, len);
3316 break;
3317 case T30_CTC:
3318 /* T.30 says we change back to long training here */
3319 s->short_train = FALSE;
3320 queue_phase(s, T30_PHASE_D_TX);
3321 set_state(s, T30_STATE_F_DOC_ECM);
3322 send_simple_frame(s, T30_CTR);
3323 break;
3324 case T30_RR:
3325 break;
3326 case T30_DCN:
3327 s->current_status = T30_ERR_RX_DCNDATA;
3328 disconnect(s);
3329 break;
3330 case T30_CRP:
3331 repeat_last_command(s);
3332 break;
3333 case T30_FNV:
3334 process_rx_fnv(s, msg, len);
3335 break;
3336 default:
3337 /* We don't know what to do with this. */
3338 s->current_status = T30_ERR_RX_INVALCMD;
3339 unexpected_final_frame(s, msg, len);
3340 break;
3341 }
3342 }
3343 /*- End of function --------------------------------------------------------*/
3344
3345 static void process_state_f_post_rcp_mcf(t30_state_t *s, const uint8_t *msg, int len)
3346 {
3347 uint8_t fcf;
3348
3349 fcf = msg[2] & 0xFE;
3350 switch (fcf)
3351 {
3352 case T30_CRP:
3353 repeat_last_command(s);
3354 break;
3355 case T30_FNV:
3356 process_rx_fnv(s, msg, len);
3357 break;
3358 case T30_DCN:
3359 disconnect(s);
3360 break;
3361 default:
3362 /* We don't know what to do with this. */
3363 unexpected_final_frame(s, msg, len);
3364 break;
3365 }
3366 }
3367 /*- End of function --------------------------------------------------------*/
3368
3369 static void process_state_f_post_rcp_ppr(t30_state_t *s, const uint8_t *msg, int len)
3370 {
3371 uint8_t fcf;
3372
3373 fcf = msg[2] & 0xFE;
3374 switch (fcf)
3375 {
3376 case T30_CRP:
3377 repeat_last_command(s);
3378 break;
3379 case T30_FNV:
3380 process_rx_fnv(s, msg, len);
3381 break;
3382 default:
3383 /* We don't know what to do with this. */
3384 unexpected_final_frame(s, msg, len);
3385 break;
3386 }
3387 }
3388 /*- End of function --------------------------------------------------------*/
3389
3390 static void process_state_f_post_rcp_rnr(t30_state_t *s, const uint8_t *msg, int len)
3391 {
3392 uint8_t fcf;
3393
3394 fcf = msg[2] & 0xFE;
3395 switch (fcf)
3396 {
3397 case T30_RR:
3398 if (s->receiver_not_ready_count > 0)
3399 {
3400 s->receiver_not_ready_count--;
3401 queue_phase(s, T30_PHASE_D_TX);
3402 set_state(s, T30_STATE_F_POST_RCP_RNR);
3403 send_simple_frame(s, T30_RNR);
3404 }
3405 else
3406 {
3407 send_deferred_pps_response(s);
3408 }
3409 break;
3410 case T30_CRP:
3411 repeat_last_command(s);
3412 break;
3413 case T30_FNV:
3414 process_rx_fnv(s, msg, len);
3415 break;
3416 default:
3417 /* We don't know what to do with this. */
3418 unexpected_final_frame(s, msg, len);
3419 break;
3420 }
3421 }
3422 /*- End of function --------------------------------------------------------*/
3423
3424 static void process_state_r(t30_state_t *s, const uint8_t *msg, int len)
3425 {
3426 uint8_t fcf;
3427
3428 fcf = msg[2] & 0xFE;
3429 switch (fcf)
3430 {
3431 case T30_DIS:
3432 process_rx_dis_dtc(s, msg, len);
3433 break;
3434 case T30_DCS:
3435 process_rx_dcs(s, msg, len);
3436 break;
3437 case T30_DCN:
3438 /* Received a DCN while waiting for a DIS */
3439 s->current_status = T30_ERR_TX_GOTDCN;
3440 disconnect(s);
3441 break;
3442 case T30_CRP:
3443 repeat_last_command(s);
3444 break;
3445 case T30_FNV:
3446 process_rx_fnv(s, msg, len);
3447 break;
3448 default:
3449 /* We don't know what to do with this. */
3450 unexpected_final_frame(s, msg, len);
3451 break;
3452 }
3453 }
3454 /*- End of function --------------------------------------------------------*/
3455
3456 static void process_state_t(t30_state_t *s, const uint8_t *msg, int len)
3457 {
3458 uint8_t fcf;
3459
3460 fcf = msg[2] & 0xFE;
3461 switch (fcf)
3462 {
3463 case T30_DIS:
3464 process_rx_dis_dtc(s, msg, len);
3465 break;
3466 case T30_DCN:
3467 s->current_status = T30_ERR_RX_DCNWHY;
3468 disconnect(s);
3469 break;
3470 case T30_CRP:
3471 repeat_last_command(s);
3472 break;
3473 case T30_FNV:
3474 process_rx_fnv(s, msg, len);
3475 break;
3476 default:
3477 /* We don't know what to do with this. */
3478 unexpected_final_frame(s, msg, len);
3479 s->current_status = T30_ERR_TX_NODIS;
3480 break;
3481 }
3482 }
3483 /*- End of function --------------------------------------------------------*/
3484
3485 static void process_state_i(t30_state_t *s, const uint8_t *msg, int len)
3486 {
3487 uint8_t fcf;
3488
3489 fcf = msg[2] & 0xFE;
3490 switch (fcf)
3491 {
3492 case T30_CRP:
3493 repeat_last_command(s);
3494 break;
3495 case T30_FNV:
3496 process_rx_fnv(s, msg, len);
3497 break;
3498 default:
3499 /* We don't know what to do with this. */
3500 unexpected_final_frame(s, msg, len);
3501 break;
3502 }
3503 }
3504 /*- End of function --------------------------------------------------------*/
3505
3506 static void process_state_ii(t30_state_t *s, const uint8_t *msg, int len)
3507 {
3508 uint8_t fcf;
3509
3510 fcf = msg[2] & 0xFE;
3511 switch (fcf)
3512 {
3513 case T30_CRP:
3514 repeat_last_command(s);
3515 break;
3516 case T30_FNV:
3517 process_rx_fnv(s, msg, len);
3518 break;
3519 default:
3520 /* We don't know what to do with this. */
3521 unexpected_final_frame(s, msg, len);
3522 break;
3523 }
3524 }
3525 /*- End of function --------------------------------------------------------*/
3526
3527 static void process_state_ii_q(t30_state_t *s, const uint8_t *msg, int len)
3528 {
3529 t4_stats_t stats;
3530 uint8_t fcf;
3531
3532 fcf = msg[2] & 0xFE;
3533 switch (fcf)
3534 {
3535 case T30_MCF:
3536 switch (s->next_tx_step)
3537 {
3538 case T30_MPS:
3539 case T30_PRI_MPS:
3540 tx_end_page(s);
3541 if (s->phase_d_handler)
3542 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3543 /* Transmit the next page */
3544 if (tx_start_page(s))
3545 {
3546 /* TODO: recover */
3547 break;
3548 }
3549 set_state(s, T30_STATE_I);
3550 queue_phase(s, T30_PHASE_C_NON_ECM_TX);
3551 break;
3552 case T30_EOM:
3553 case T30_PRI_EOM:
3554 case T30_EOS:
3555 tx_end_page(s);
3556 if (s->phase_d_handler)
3557 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3558 t4_tx_release(&s->t4);
3559 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
3560 if (span_log_test(&s->logging, SPAN_LOG_FLOW))
3561 {
3562 t4_get_transfer_statistics(&s->t4, &stats);
3563 span_log(&s->logging, SPAN_LOG_FLOW, "Success - delivered %d pages\n", stats.pages_transferred);
3564 }
3565 return_to_phase_b(s, FALSE);
3566 break;
3567 case T30_EOP:
3568 case T30_PRI_EOP:
3569 tx_end_page(s);
3570 if (s->phase_d_handler)
3571 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3572 t4_tx_release(&s->t4);
3573 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
3574 send_dcn(s);
3575 if (span_log_test(&s->logging, SPAN_LOG_FLOW))
3576 {
3577 t4_get_transfer_statistics(&s->t4, &stats);
3578 span_log(&s->logging, SPAN_LOG_FLOW, "Success - delivered %d pages\n", stats.pages_transferred);
3579 }
3580 break;
3581 }
3582 break;
3583 case T30_RTP:
3584 #if 0
3585 s->rtp_events++;
3586 #endif
3587 switch (s->next_tx_step)
3588 {
3589 case T30_MPS:
3590 case T30_PRI_MPS:
3591 tx_end_page(s);
3592 if (s->phase_d_handler)
3593 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3594 if (tx_start_page(s))
3595 {
3596 /* TODO: recover */
3597 break;
3598 }
3599 /* Send fresh training, and then the next page */
3600 if (step_fallback_entry(s) < 0)
3601 {
3602 /* We have fallen back as far as we can go. Give up. */
3603 s->current_fallback = 0;
3604 s->current_status = T30_ERR_CANNOT_TRAIN;
3605 send_dcn(s);
3606 break;
3607 }
3608 queue_phase(s, T30_PHASE_B_TX);
3609 restart_sending_document(s);
3610 break;
3611 case T30_EOM:
3612 case T30_PRI_EOM:
3613 case T30_EOS:
3614 tx_end_page(s);
3615 if (s->phase_d_handler)
3616 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3617 t4_tx_release(&s->t4);
3618 /* TODO: should go back to T, and resend */
3619 return_to_phase_b(s, TRUE);
3620 break;
3621 case T30_EOP:
3622 case T30_PRI_EOP:
3623 tx_end_page(s);
3624 if (s->phase_d_handler)
3625 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3626 t4_tx_release(&s->t4);
3627 send_dcn(s);
3628 break;
3629 }
3630 break;
3631 case T30_RTN:
3632 #if 0
3633 s->rtn_events++;
3634 #endif
3635 switch (s->next_tx_step)
3636 {
3637 case T30_MPS:
3638 case T30_PRI_MPS:
3639 s->retries = 0;
3640 if (s->phase_d_handler)
3641 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3642 #if 0
3643 if (!s->retransmit_capable)
3644 #endif
3645 {
3646 /* Send the next page, regardless of the problem with the current one. */
3647 if (tx_start_page(s))
3648 {
3649 /* TODO: recover */
3650 break;
3651 }
3652 }
3653 /* Send fresh training */
3654 if (step_fallback_entry(s) < 0)
3655 {
3656 /* We have fallen back as far as we can go. Give up. */
3657 s->current_fallback = 0;
3658 s->current_status = T30_ERR_CANNOT_TRAIN;
3659 send_dcn(s);
3660 break;
3661 }
3662 queue_phase(s, T30_PHASE_B_TX);
3663 restart_sending_document(s);
3664 break;
3665 case T30_EOM:
3666 case T30_PRI_EOM:
3667 case T30_EOS:
3668 s->retries = 0;
3669 if (s->phase_d_handler)
3670 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3671 #if 0
3672 if (s->retransmit_capable)
3673 {
3674 /* Wait for DIS */
3675 }
3676 else
3677 #endif
3678 {
3679 return_to_phase_b(s, TRUE);
3680 }
3681 break;
3682 case T30_EOP:
3683 case T30_PRI_EOP:
3684 s->retries = 0;
3685 if (s->phase_d_handler)
3686 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3687 #if 0
3688 if (s->retransmit_capable)
3689 {
3690 /* Send fresh training, and then repeat the last page */
3691 if (step_fallback_entry(s) < 0)
3692 {
3693 /* We have fallen back as far as we can go. Give up. */
3694 s->current_fallback = 0;
3695 s->current_status = T30_ERR_CANNOT_TRAIN;
3696 send_dcn(s);
3697 break;
3698 }
3699 queue_phase(s, T30_PHASE_B_TX);
3700 restart_sending_document(s);
3701 }
3702 else
3703 #endif
3704 {
3705 send_dcn(s);
3706 }
3707 break;
3708 }
3709 break;
3710 case T30_PIP:
3711 s->retries = 0;
3712 if (s->phase_d_handler)
3713 {
3714 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3715 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
3716 }
3717 break;
3718 case T30_PIN:
3719 s->retries = 0;
3720 if (s->phase_d_handler)
3721 {
3722 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3723 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
3724 }
3725 break;
3726 case T30_DCN:
3727 switch (s->next_tx_step)
3728 {
3729 case T30_MPS:
3730 case T30_PRI_MPS:
3731 case T30_EOM:
3732 case T30_PRI_EOM:
3733 case T30_EOS:
3734 /* Unexpected DCN after EOM, EOS or MPS sequence */
3735 s->current_status = T30_ERR_RX_DCNPHD;
3736 break;
3737 default:
3738 s->current_status = T30_ERR_TX_BADPG;
3739 break;
3740 }
3741 disconnect(s);
3742 break;
3743 case T30_CRP:
3744 repeat_last_command(s);
3745 break;
3746 case T30_FNV:
3747 process_rx_fnv(s, msg, len);
3748 break;
3749 default:
3750 /* We don't know what to do with this. */
3751 s->current_status = T30_ERR_TX_INVALRSP;
3752 unexpected_final_frame(s, msg, len);
3753 break;
3754 }
3755 }
3756 /*- End of function --------------------------------------------------------*/
3757
3758 static void process_state_iii_q_mcf(t30_state_t *s, const uint8_t *msg, int len)
3759 {
3760 uint8_t fcf;
3761
3762 fcf = msg[2] & 0xFE;
3763 switch (fcf)
3764 {
3765 case T30_EOP:
3766 case T30_EOM:
3767 case T30_EOS:
3768 case T30_MPS:
3769 /* Looks like they didn't see our signal. Repeat it */
3770 queue_phase(s, T30_PHASE_D_TX);
3771 set_state(s, T30_STATE_III_Q_MCF);
3772 send_simple_frame(s, T30_MCF);
3773 break;
3774 case T30_DIS:
3775 if (msg[2] == T30_DTC)
3776 process_rx_dis_dtc(s, msg, len);
3777 break;
3778 case T30_CRP:
3779 repeat_last_command(s);
3780 break;
3781 case T30_FNV:
3782 process_rx_fnv(s, msg, len);
3783 break;
3784 case T30_DCN:
3785 disconnect(s);
3786 break;
3787 default:
3788 /* We don't know what to do with this. */
3789 unexpected_final_frame(s, msg, len);
3790 break;
3791 }
3792 }
3793 /*- End of function --------------------------------------------------------*/
3794
3795 static void process_state_iii_q_rtp(t30_state_t *s, const uint8_t *msg, int len)
3796 {
3797 uint8_t fcf;
3798
3799 fcf = msg[2] & 0xFE;
3800 switch (fcf)
3801 {
3802 case T30_EOP:
3803 case T30_EOM:
3804 case T30_EOS:
3805 case T30_MPS:
3806 /* Looks like they didn't see our signal. Repeat it */
3807 queue_phase(s, T30_PHASE_D_TX);
3808 set_state(s, T30_STATE_III_Q_RTP);
3809 send_simple_frame(s, T30_RTP);
3810 break;
3811 case T30_DIS:
3812 if (msg[2] == T30_DTC)
3813 process_rx_dis_dtc(s, msg, len);
3814 break;
3815 case T30_CRP:
3816 repeat_last_command(s);
3817 break;
3818 case T30_FNV:
3819 process_rx_fnv(s, msg, len);
3820 break;
3821 default:
3822 /* We don't know what to do with this. */
3823 unexpected_final_frame(s, msg, len);
3824 break;
3825 }
3826 }
3827 /*- End of function --------------------------------------------------------*/
3828
3829 static void process_state_iii_q_rtn(t30_state_t *s, const uint8_t *msg, int len)
3830 {
3831 uint8_t fcf;
3832
3833 fcf = msg[2] & 0xFE;
3834 switch (fcf)
3835 {
3836 case T30_EOP:
3837 case T30_EOM:
3838 case T30_EOS:
3839 case T30_MPS:
3840 /* Looks like they didn't see our signal. Repeat it */
3841 queue_phase(s, T30_PHASE_D_TX);
3842 set_state(s, T30_STATE_III_Q_RTN);
3843 send_simple_frame(s, T30_RTN);
3844 break;
3845 case T30_DIS:
3846 if (msg[2] == T30_DTC)
3847 process_rx_dis_dtc(s, msg, len);
3848 break;
3849 case T30_CRP:
3850 repeat_last_command(s);
3851 break;
3852 case T30_FNV:
3853 process_rx_fnv(s, msg, len);
3854 break;
3855 case T30_DCN:
3856 s->current_status = T30_ERR_RX_DCNNORTN;
3857 disconnect(s);
3858 break;
3859 default:
3860 /* We don't know what to do with this. */
3861 unexpected_final_frame(s, msg, len);
3862 break;
3863 }
3864 }
3865 /*- End of function --------------------------------------------------------*/
3866
3867 static void process_state_iv(t30_state_t *s, const uint8_t *msg, int len)
3868 {
3869 uint8_t fcf;
3870
3871 fcf = msg[2] & 0xFE;
3872 switch (fcf)
3873 {
3874 case T30_CRP:
3875 repeat_last_command(s);
3876 break;
3877 case T30_FNV:
3878 process_rx_fnv(s, msg, len);
3879 break;
3880 default:
3881 /* We don't know what to do with this. */
3882 unexpected_final_frame(s, msg, len);
3883 break;
3884 }
3885 }
3886 /*- End of function --------------------------------------------------------*/
3887
3888 static void process_state_iv_pps_null(t30_state_t *s, const uint8_t *msg, int len)
3889 {
3890 t4_stats_t stats;
3891 uint8_t fcf;
3892
3893 fcf = msg[2] & 0xFE;
3894 switch (fcf)
3895 {
3896 case T30_MCF:
3897 s->retries = 0;
3898 s->timer_t5 = 0;
3899 /* Is there more of the current page to get, or do we move on? */
3900 span_log(&s->logging, SPAN_LOG_FLOW, "Is there more to send? - %d %d\n", s->ecm_frames, s->ecm_len[255]);
3901 if (!s->ecm_at_page_end && get_partial_ecm_page(s) > 0)
3902 {
3903 span_log(&s->logging, SPAN_LOG_FLOW, "Additional image data to send\n");
3904 s->ecm_block++;
3905 set_state(s, T30_STATE_IV);
3906 queue_phase(s, T30_PHASE_C_ECM_TX);
3907 send_first_ecm_frame(s);
3908 }
3909 else
3910 {
3911 span_log(&s->logging, SPAN_LOG_FLOW, "Moving on to the next page\n");
3912 switch (s->next_tx_step)
3913 {
3914 case T30_MPS:
3915 case T30_PRI_MPS:
3916 tx_end_page(s);
3917 if (s->phase_d_handler)
3918 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3919 if (tx_start_page(s))
3920 {
3921 /* TODO: recover */
3922 break;
3923 }
3924 if (get_partial_ecm_page(s) > 0)
3925 {
3926 set_state(s, T30_STATE_IV);
3927 queue_phase(s, T30_PHASE_C_ECM_TX);
3928 send_first_ecm_frame(s);
3929 }
3930 break;
3931 case T30_EOM:
3932 case T30_PRI_EOM:
3933 case T30_EOS:
3934 tx_end_page(s);
3935 if (s->phase_d_handler)
3936 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3937 t4_tx_release(&s->t4);
3938 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
3939 if (span_log_test(&s->logging, SPAN_LOG_FLOW))
3940 {
3941 t4_get_transfer_statistics(&s->t4, &stats);
3942 span_log(&s->logging, SPAN_LOG_FLOW, "Success - delivered %d pages\n", stats.pages_transferred);
3943 }
3944 return_to_phase_b(s, FALSE);
3945 break;
3946 case T30_EOP:
3947 case T30_PRI_EOP:
3948 tx_end_page(s);
3949 if (s->phase_d_handler)
3950 s->phase_d_handler(s, s->phase_d_user_data, fcf);
3951 t4_tx_release(&s->t4);
3952 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
3953 send_dcn(s);
3954 if (span_log_test(&s->logging, SPAN_LOG_FLOW))
3955 {
3956 t4_get_transfer_statistics(&s->t4, &stats);
3957 span_log(&s->logging, SPAN_LOG_FLOW, "Success - delivered %d pages\n", stats.pages_transferred);
3958 }
3959 break;
3960 }
3961 }
3962 break;
3963 case T30_PPR:
3964 process_rx_ppr(s, msg, len);
3965 break;
3966 case T30_RNR:
3967 if (s->timer_t5 == 0)
3968 s->timer_t5 = ms_to_samples(DEFAULT_TIMER_T5);
3969 queue_phase(s, T30_PHASE_D_TX);
3970 set_state(s, T30_STATE_IV_PPS_RNR);
3971 send_rr(s);
3972 break;
3973 case T30_DCN:
3974 s->current_status = T30_ERR_TX_BADPG;
3975 disconnect(s);
3976 break;
3977 case T30_CRP:
3978 repeat_last_command(s);
3979 break;
3980 case T30_FNV:
3981 process_rx_fnv(s, msg, len);
3982 break;
3983 default:
3984 /* We don't know what to do with this. */
3985 unexpected_final_frame(s, msg, len);
3986 s->current_status = T30_ERR_TX_ECMPHD;
3987 break;
3988 }
3989 }
3990 /*- End of function --------------------------------------------------------*/
3991
3992 static void process_state_iv_pps_q(t30_state_t *s, const uint8_t *msg, int len)
3993 {
3994 t4_stats_t stats;
3995 uint8_t fcf;
3996
3997 fcf = msg[2] & 0xFE;
3998 switch (fcf)
3999 {
4000 case T30_MCF:
4001 s->retries = 0;
4002 s->timer_t5 = 0;
4003 /* Is there more of the current page to get, or do we move on? */
4004 span_log(&s->logging, SPAN_LOG_FLOW, "Is there more to send? - %d %d\n", s->ecm_frames, s->ecm_len[255]);
4005 if (!s->ecm_at_page_end && get_partial_ecm_page(s) > 0)
4006 {
4007 span_log(&s->logging, SPAN_LOG_FLOW, "Additional image data to send\n");
4008 s->ecm_block++;
4009 set_state(s, T30_STATE_IV);
4010 queue_phase(s, T30_PHASE_C_ECM_TX);
4011 send_first_ecm_frame(s);
4012 }
4013 else
4014 {
4015 span_log(&s->logging, SPAN_LOG_FLOW, "Moving on to the next page\n");
4016 switch (s->next_tx_step)
4017 {
4018 case T30_MPS:
4019 case T30_PRI_MPS:
4020 tx_end_page(s);
4021 if (s->phase_d_handler)
4022 s->phase_d_handler(s, s->phase_d_user_data, fcf);
4023 if (tx_start_page(s))
4024 {
4025 /* TODO: recover */
4026 break;
4027 }
4028 if (get_partial_ecm_page(s) > 0)
4029 {
4030 set_state(s, T30_STATE_IV);
4031 queue_phase(s, T30_PHASE_C_ECM_TX);
4032 send_first_ecm_frame(s);
4033 }
4034 break;
4035 case T30_EOM:
4036 case T30_PRI_EOM:
4037 case T30_EOS:
4038 tx_end_page(s);
4039 if (s->phase_d_handler)
4040 s->phase_d_handler(s, s->phase_d_user_data, fcf);
4041 t4_tx_release(&s->t4);
4042 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
4043 if (span_log_test(&s->logging, SPAN_LOG_FLOW))
4044 {
4045 t4_get_transfer_statistics(&s->t4, &stats);
4046 span_log(&s->logging, SPAN_LOG_FLOW, "Success - delivered %d pages\n", stats.pages_transferred);
4047 }
4048 return_to_phase_b(s, FALSE);
4049 break;
4050 case T30_EOP:
4051 case T30_PRI_EOP:
4052 tx_end_page(s);
4053 if (s->phase_d_handler)
4054 s->phase_d_handler(s, s->phase_d_user_data, fcf);
4055 t4_tx_release(&s->t4);
4056 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
4057 send_dcn(s);
4058 if (span_log_test(&s->logging, SPAN_LOG_FLOW))
4059 {
4060 t4_get_transfer_statistics(&s->t4, &stats);
4061 span_log(&s->logging, SPAN_LOG_FLOW, "Success - delivered %d pages\n", stats.pages_transferred);
4062 }
4063 break;
4064 }
4065 }
4066 break;
4067 case T30_RNR:
4068 if (s->timer_t5 == 0)
4069 s->timer_t5 = ms_to_samples(DEFAULT_TIMER_T5);
4070 queue_phase(s, T30_PHASE_D_TX);
4071 set_state(s, T30_STATE_IV_PPS_RNR);
4072 send_rr(s);
4073 break;
4074 case T30_PIP:
4075 s->retries = 0;
4076 if (s->phase_d_handler)
4077 {
4078 s->phase_d_handler(s, s->phase_d_user_data, fcf);
4079 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
4080 }
4081 break;
4082 case T30_PIN:
4083 s->retries = 0;
4084 if (s->phase_d_handler)
4085 {
4086 s->phase_d_handler(s, s->phase_d_user_data, fcf);
4087 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
4088 }
4089 break;
4090 case T30_PPR:
4091 process_rx_ppr(s, msg, len);
4092 break;
4093 case T30_DCN:
4094 s->current_status = T30_ERR_TX_BADPG;
4095 disconnect(s);
4096 break;
4097 case T30_CRP:
4098 repeat_last_command(s);
4099 break;
4100 case T30_FNV:
4101 process_rx_fnv(s, msg, len);
4102 break;
4103 default:
4104 /* We don't know what to do with this. */
4105 unexpected_final_frame(s, msg, len);
4106 s->current_status = T30_ERR_TX_ECMPHD;
4107 break;
4108 }
4109 }
4110 /*- End of function --------------------------------------------------------*/
4111
4112 static void process_state_iv_pps_rnr(t30_state_t *s, const uint8_t *msg, int len)
4113 {
4114 t4_stats_t stats;
4115 uint8_t fcf;
4116
4117 fcf = msg[2] & 0xFE;
4118 switch (fcf)
4119 {
4120 case T30_MCF:
4121 s->retries = 0;
4122 s->timer_t5 = 0;
4123 /* Is there more of the current page to get, or do we move on? */
4124 span_log(&s->logging, SPAN_LOG_FLOW, "Is there more to send? - %d %d\n", s->ecm_frames, s->ecm_len[255]);
4125 if (!s->ecm_at_page_end && get_partial_ecm_page(s) > 0)
4126 {
4127 span_log(&s->logging, SPAN_LOG_FLOW, "Additional image data to send\n");
4128 s->ecm_block++;
4129 set_state(s, T30_STATE_IV);
4130 queue_phase(s, T30_PHASE_C_ECM_TX);
4131 send_first_ecm_frame(s);
4132 }
4133 else
4134 {
4135 span_log(&s->logging, SPAN_LOG_FLOW, "Moving on to the next page\n");
4136 switch (s->next_tx_step)
4137 {
4138 case T30_MPS:
4139 case T30_PRI_MPS:
4140 tx_end_page(s);
4141 if (s->phase_d_handler)
4142 s->phase_d_handler(s, s->phase_d_user_data, fcf);
4143 if (tx_start_page(s))
4144 {
4145 /* TODO: recover */
4146 break;
4147 }
4148 if (get_partial_ecm_page(s) > 0)
4149 {
4150 set_state(s, T30_STATE_IV);
4151 queue_phase(s, T30_PHASE_C_ECM_TX);
4152 send_first_ecm_frame(s);
4153 }
4154 break;
4155 case T30_EOM:
4156 case T30_PRI_EOM:
4157 case T30_EOS:
4158 tx_end_page(s);
4159 if (s->phase_d_handler)
4160 s->phase_d_handler(s, s->phase_d_user_data, fcf);
4161 t4_tx_release(&s->t4);
4162 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
4163 if (span_log_test(&s->logging, SPAN_LOG_FLOW))
4164 {
4165 t4_get_transfer_statistics(&s->t4, &stats);
4166 span_log(&s->logging, SPAN_LOG_FLOW, "Success - delivered %d pages\n", stats.pages_transferred);
4167 }
4168 return_to_phase_b(s, FALSE);
4169 break;
4170 case T30_EOP:
4171 case T30_PRI_EOP:
4172 tx_end_page(s);
4173 if (s->phase_d_handler)
4174 s->phase_d_handler(s, s->phase_d_user_data, fcf);
4175 t4_tx_release(&s->t4);
4176 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
4177 send_dcn(s);
4178 if (span_log_test(&s->logging, SPAN_LOG_FLOW))
4179 {
4180 t4_get_transfer_statistics(&s->t4, &stats);
4181 span_log(&s->logging, SPAN_LOG_FLOW, "Success - delivered %d pages\n", stats.pages_transferred);
4182 }
4183 break;
4184 }
4185 }
4186 break;
4187 case T30_RNR:
4188 if (s->timer_t5 == 0)
4189 s->timer_t5 = ms_to_samples(DEFAULT_TIMER_T5);
4190 queue_phase(s, T30_PHASE_D_TX);
4191 set_state(s, T30_STATE_IV_PPS_RNR);
4192 send_rr(s);
4193 break;
4194 case T30_PIP:
4195 s->retries = 0;
4196 if (s->phase_d_handler)
4197 {
4198 s->phase_d_handler(s, s->phase_d_user_data, fcf);
4199 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
4200 }
4201 break;
4202 case T30_PIN:
4203 s->retries = 0;
4204 if (s->phase_d_handler)
4205 {
4206 s->phase_d_handler(s, s->phase_d_user_data, fcf);
4207 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
4208 }
4209 break;
4210 case T30_DCN:
4211 s->current_status = T30_ERR_RX_DCNRRD;
4212 disconnect(s);
4213 break;
4214 case T30_CRP:
4215 repeat_last_command(s);
4216 break;
4217 case T30_FNV:
4218 process_rx_fnv(s, msg, len);
4219 break;
4220 default:
4221 /* We don't know what to do with this. */
4222 unexpected_final_frame(s, msg, len);
4223 break;
4224 }
4225 }
4226 /*- End of function --------------------------------------------------------*/
4227
4228 static void process_state_iv_ctc(t30_state_t *s, const uint8_t *msg, int len)
4229 {
4230 uint8_t fcf;
4231
4232 fcf = msg[2] & 0xFE;
4233 switch (fcf)
4234 {
4235 case T30_CTR:
4236 /* Valid response to a CTC received */
4237 /* T.30 says we change back to long training here */
4238 s->short_train = FALSE;
4239 /* Initiate resending of the remainder of the frames. */
4240 set_state(s, T30_STATE_IV);
4241 queue_phase(s, T30_PHASE_C_ECM_TX);
4242 send_first_ecm_frame(s);
4243 break;
4244 case T30_CRP:
4245 repeat_last_command(s);
4246 break;
4247 case T30_FNV:
4248 process_rx_fnv(s, msg, len);
4249 break;
4250 default:
4251 /* We don't know what to do with this. */
4252 unexpected_final_frame(s, msg, len);
4253 break;
4254 }
4255 }
4256 /*- End of function --------------------------------------------------------*/
4257
4258 static void process_state_iv_eor(t30_state_t *s, const uint8_t *msg, int len)
4259 {
4260 uint8_t fcf;
4261
4262 fcf = msg[2] & 0xFE;
4263 switch (fcf)
4264 {
4265 case T30_RNR:
4266 if (s->timer_t5 == 0)
4267 s->timer_t5 = ms_to_samples(DEFAULT_TIMER_T5);
4268 queue_phase(s, T30_PHASE_D_TX);
4269 set_state(s, T30_STATE_IV_EOR_RNR);
4270 send_rr(s);
4271 break;
4272 case T30_PIN:
4273 s->retries = 0;
4274 if (s->phase_d_handler)
4275 {
4276 s->phase_d_handler(s, s->phase_d_user_data, fcf);
4277 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
4278 }
4279 break;
4280 case T30_ERR:
4281 /* TODO: Continue with the next message if MPS or EOM? */
4282 s->timer_t5 = 0;
4283 send_dcn(s);
4284 break;
4285 case T30_CRP:
4286 repeat_last_command(s);
4287 break;
4288 case T30_FNV:
4289 process_rx_fnv(s, msg, len);
4290 break;
4291 default:
4292 /* We don't know what to do with this. */
4293 unexpected_final_frame(s, msg, len);
4294 break;
4295 }
4296 }
4297 /*- End of function --------------------------------------------------------*/
4298
4299 static void process_state_iv_eor_rnr(t30_state_t *s, const uint8_t *msg, int len)
4300 {
4301 uint8_t fcf;
4302
4303 fcf = msg[2] & 0xFE;
4304 switch (fcf)
4305 {
4306 case T30_RNR:
4307 if (s->timer_t5 == 0)
4308 s->timer_t5 = ms_to_samples(DEFAULT_TIMER_T5);
4309 queue_phase(s, T30_PHASE_D_TX);
4310 set_state(s, T30_STATE_IV_EOR_RNR);
4311 send_rr(s);
4312 break;
4313 case T30_PIN:
4314 s->retries = 0;
4315 if (s->phase_d_handler)
4316 {
4317 s->phase_d_handler(s, s->phase_d_user_data, fcf);
4318 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
4319 }
4320 break;
4321 case T30_ERR:
4322 /* TODO: Continue with the next message if MPS or EOM? */
4323 s->timer_t5 = 0;
4324 send_dcn(s);
4325 break;
4326 case T30_DCN:
4327 s->current_status = T30_ERR_RX_DCNRRD;
4328 disconnect(s);
4329 break;
4330 case T30_CRP:
4331 repeat_last_command(s);
4332 break;
4333 case T30_FNV:
4334 process_rx_fnv(s, msg, len);
4335 break;
4336 default:
4337 /* We don't know what to do with this. */
4338 unexpected_final_frame(s, msg, len);
4339 break;
4340 }
4341 }
4342 /*- End of function --------------------------------------------------------*/
4343
4344 static void process_state_call_finished(t30_state_t *s, const uint8_t *msg, int len)
4345 {
4346 /* Simply ignore anything which comes in when we have declared the call
4347 to have finished. */
4348 }
4349 /*- End of function --------------------------------------------------------*/
4350
4351 static void process_rx_control_msg(t30_state_t *s, const uint8_t *msg, int len)
4352 {
4353 /* We should only get good frames here. */
4354 print_frame(s, "Rx: ", msg, len);
4355 if (s->real_time_frame_handler)
4356 s->real_time_frame_handler(s, s->real_time_frame_user_data, TRUE, msg, len);
4357
4358 if ((msg[1] & 0x10) == 0)
4359 {
4360 /* This is not a final frame */
4361 /* It seems we should not restart the command or response timer when exchanging HDLC image
4362 data. If the modem looses sync in the middle of the image, we should just wait until
4363 the carrier goes away before proceeding. */
4364 if (s->phase != T30_PHASE_C_ECM_RX)
4365 {
4366 /* Restart the command or response timer, T2 or T4 */
4367 switch (s->timer_t2_t4_is)
4368 {
4369 case TIMER_IS_T1A:
4370 case TIMER_IS_T2:
4371 case TIMER_IS_T2A:
4372 case TIMER_IS_T2B:
4373 timer_t2a_start(s);
4374 break;
4375 case TIMER_IS_T4:
4376 case TIMER_IS_T4A:
4377 case TIMER_IS_T4B:
4378 timer_t4a_start(s);
4379 break;
4380 }
4381 }
4382 /* The following handles all the message types we expect to get without
4383 a final frame tag. If we get one that T.30 says we should not expect
4384 in a particular context, its pretty harmless, so don't worry. */
4385 switch (msg[2] & 0xFE)
4386 {
4387 case (T30_CSI & 0xFE):
4388 /* Called subscriber identification or Calling subscriber identification (T30_CIG) */
4389 /* OK in (NSF) (CSI) DIS */
4390 /* OK in (NSC) (CIG) DTC */
4391 /* OK in (PWD) (SEP) (CIG) DTC */
4392 decode_20digit_msg(s, s->rx_info.ident, &msg[2], len - 2);
4393 break;
4394 case (T30_NSF & 0xFE):
4395 if (msg[2] == T30_NSF)
4396 {
4397 /* Non-standard facilities */
4398 /* OK in (NSF) (CSI) DIS */
4399 t35_decode(&msg[3], len - 3, &s->country, &s->vendor, &s->model);
4400 if (s->country)
4401 span_log(&s->logging, SPAN_LOG_FLOW, "The remote was made in '%s'\n", s->country);
4402 if (s->vendor)
4403 span_log(&s->logging, SPAN_LOG_FLOW, "The remote was made by '%s'\n", s->vendor);
4404 if (s->model)
4405 span_log(&s->logging, SPAN_LOG_FLOW, "The remote is a '%s'\n", s->model);
4406 }
4407 else
4408 {
4409 /* NSC - Non-standard facilities command */
4410 /* OK in (NSC) (CIG) DTC */
4411 }
4412 break;
4413 case (T30_PWD & 0xFE):
4414 if (msg[2] == T30_PWD)
4415 {
4416 /* Password */
4417 /* OK in (SUB) (SID) (SEP) (PWD) (TSI) DCS */
4418 /* OK in (SUB) (SID) (SEP) (PWD) (CIG) DTC */
4419 decode_20digit_msg(s, s->rx_info.password, &msg[2], len - 2);
4420 }
4421 else
4422 {
4423 unexpected_non_final_frame(s, msg, len);
4424 }
4425 break;
4426 case (T30_SEP & 0xFE):
4427 if (msg[2] == T30_SEP)
4428 {
4429 /* Selective polling address */
4430 /* OK in (PWD) (SEP) (CIG) DTC */
4431 decode_20digit_msg(s, s->rx_info.selective_polling_address, &msg[2], len - 2);
4432 }
4433 else
4434 {
4435 unexpected_non_final_frame(s, msg, len);
4436 }
4437 break;
4438 case (T30_PSA & 0xFE):
4439 if (msg[2] == T30_PSA)
4440 {
4441 /* Polled sub-address */
4442 decode_20digit_msg(s, s->rx_info.polled_sub_address, &msg[2], len - 2);
4443 }
4444 else
4445 {
4446 unexpected_non_final_frame(s, msg, len);
4447 }
4448 break;
4449 case (T30_CIA & 0xFE):
4450 if (msg[2] == T30_CIA)
4451 {
4452 /* Calling subscriber internet address */
4453 decode_url_msg(s, NULL, &msg[2], len - 2);
4454 }
4455 else
4456 {
4457 unexpected_non_final_frame(s, msg, len);
4458 }
4459 break;
4460 case (T30_ISP & 0xFE):
4461 if (msg[2] == T30_ISP)
4462 {
4463 /* Internet selective polling address */
4464 decode_url_msg(s, NULL, &msg[2], len - 2);
4465 }
4466 else
4467 {
4468 unexpected_non_final_frame(s, msg, len);
4469 }
4470 break;
4471 case (T30_TSI & 0xFE):
4472 /* Transmitting subscriber identity */
4473 /* OK in (PWD) (SUB) (TSI) DCS */
4474 decode_20digit_msg(s, s->rx_info.ident, &msg[2], len - 2);
4475 break;
4476 case (T30_NSS & 0xFE):
4477 /* Non-standard facilities set-up */
4478 break;
4479 case (T30_SUB & 0xFE):
4480 /* Sub-address */
4481 /* OK in (PWD) (SUB) (TSI) DCS */
4482 decode_20digit_msg(s, s->rx_info.sub_address, &msg[2], len - 2);
4483 break;
4484 case (T30_SID & 0xFE):
4485 /* Sender Identification */
4486 /* OK in (SUB) (SID) (SEP) (PWD) (TSI) DCS */
4487 /* OK in (SUB) (SID) (SEP) (PWD) (CIG) DTC */
4488 decode_20digit_msg(s, s->rx_info.sender_ident, &msg[2], len - 2);
4489 break;
4490 case (T30_CSA & 0xFE):
4491 /* Calling subscriber internet address */
4492 decode_url_msg(s, NULL, &msg[2], len - 2);
4493 break;
4494 case (T30_TSA & 0xFE):
4495 /* Transmitting subscriber internet address */
4496 decode_url_msg(s, NULL, &msg[2], len - 2);
4497 break;
4498 case (T30_IRA & 0xFE):
4499 /* Internet routing address */
4500 decode_url_msg(s, NULL, &msg[2], len - 2);
4501 break;
4502 case T4_FCD:
4503 process_rx_fcd(s, msg, len);
4504 break;
4505 case T4_RCP:
4506 process_rx_rcp(s, msg, len);
4507 break;
4508 default:
4509 unexpected_non_final_frame(s, msg, len);
4510 break;
4511 }
4512 }
4513 else
4514 {
4515 /* This is a final frame */
4516 /* Once we have any successful message from the far end, we
4517 cancel timer T1 */
4518 s->timer_t0_t1 = 0;
4519
4520 /* The following handles context sensitive message types, which should
4521 occur at the end of message sequences. They should, therefore have
4522 the final frame flag set. */
4523 span_log(&s->logging, SPAN_LOG_FLOW, "In state %d\n", s->state);
4524
4525 switch (s->state)
4526 {
4527 case T30_STATE_ANSWERING:
4528 process_state_answering(s, msg, len);
4529 break;
4530 case T30_STATE_B:
4531 process_state_b(s, msg, len);
4532 break;
4533 case T30_STATE_C:
4534 process_state_c(s, msg, len);
4535 break;
4536 case T30_STATE_D:
4537 process_state_d(s, msg, len);
4538 break;
4539 case T30_STATE_D_TCF:
4540 process_state_d_tcf(s, msg, len);
4541 break;
4542 case T30_STATE_D_POST_TCF:
4543 process_state_d_post_tcf(s, msg, len);
4544 break;
4545 case T30_STATE_F_TCF:
4546 process_state_f_tcf(s, msg, len);
4547 break;
4548 case T30_STATE_F_CFR:
4549 process_state_f_cfr(s, msg, len);
4550 break;
4551 case T30_STATE_F_FTT:
4552 process_state_f_ftt(s, msg, len);
4553 break;
4554 case T30_STATE_F_DOC_NON_ECM:
4555 process_state_f_doc_non_ecm(s, msg, len);
4556 break;
4557 case T30_STATE_F_POST_DOC_NON_ECM:
4558 process_state_f_post_doc_non_ecm(s, msg, len);
4559 break;
4560 case T30_STATE_F_DOC_ECM:
4561 case T30_STATE_F_POST_DOC_ECM:
4562 process_state_f_doc_and_post_doc_ecm(s, msg, len);
4563 break;
4564 case T30_STATE_F_POST_RCP_MCF:
4565 process_state_f_post_rcp_mcf(s, msg, len);
4566 break;
4567 case T30_STATE_F_POST_RCP_PPR:
4568 process_state_f_post_rcp_ppr(s, msg, len);
4569 break;
4570 case T30_STATE_F_POST_RCP_RNR:
4571 process_state_f_post_rcp_rnr(s, msg, len);
4572 break;
4573 case T30_STATE_R:
4574 process_state_r(s, msg, len);
4575 break;
4576 case T30_STATE_T:
4577 process_state_t(s, msg, len);
4578 break;
4579 case T30_STATE_I:
4580 process_state_i(s, msg, len);
4581 break;
4582 case T30_STATE_II:
4583 process_state_ii(s, msg, len);
4584 break;
4585 case T30_STATE_II_Q:
4586 process_state_ii_q(s, msg, len);
4587 break;
4588 case T30_STATE_III_Q_MCF:
4589 process_state_iii_q_mcf(s, msg, len);
4590 break;
4591 case T30_STATE_III_Q_RTP:
4592 process_state_iii_q_rtp(s, msg, len);
4593 break;
4594 case T30_STATE_III_Q_RTN:
4595 process_state_iii_q_rtn(s, msg, len);
4596 break;
4597 case T30_STATE_IV:
4598 process_state_iv(s, msg, len);
4599 break;
4600 case T30_STATE_IV_PPS_NULL:
4601 process_state_iv_pps_null(s, msg, len);
4602 break;
4603 case T30_STATE_IV_PPS_Q:
4604 process_state_iv_pps_q(s, msg, len);
4605 break;
4606 case T30_STATE_IV_PPS_RNR:
4607 process_state_iv_pps_rnr(s, msg, len);
4608 break;
4609 case T30_STATE_IV_CTC:
4610 process_state_iv_ctc(s, msg, len);
4611 break;
4612 case T30_STATE_IV_EOR:
4613 process_state_iv_eor(s, msg, len);
4614 break;
4615 case T30_STATE_IV_EOR_RNR:
4616 process_state_iv_eor_rnr(s, msg, len);
4617 break;
4618 case T30_STATE_CALL_FINISHED:
4619 process_state_call_finished(s, msg, len);
4620 break;
4621 default:
4622 /* We don't know what to do with this. */
4623 unexpected_final_frame(s, msg, len);
4624 break;
4625 }
4626 }
4627 }
4628 /*- End of function --------------------------------------------------------*/
4629
4630 static void queue_phase(t30_state_t *s, int phase)
4631 {
4632 if (s->rx_signal_present)
4633 {
4634 /* We need to wait for that signal to go away */
4635 s->next_phase = phase;
4636 }
4637 else
4638 {
4639 set_phase(s, phase);
4640 s->next_phase = T30_PHASE_IDLE;
4641 }
4642 }
4643 /*- End of function --------------------------------------------------------*/
4644
4645 static void set_phase(t30_state_t *s, int phase)
4646 {
4647 //if (phase = s->phase)
4648 // return;
4649 span_log(&s->logging, SPAN_LOG_FLOW, "Changing from phase %s to %s\n", phase_names[s->phase], phase_names[phase]);
4650 /* We may be killing a receiver before it has declared the end of the
4651 signal. Force the signal present indicator to off, because the
4652 receiver will never be able to. */
4653 if (s->phase != T30_PHASE_A_CED && s->phase != T30_PHASE_A_CNG)
4654 s->rx_signal_present = FALSE;
4655 s->rx_trained = FALSE;
4656 s->rx_frame_received = FALSE;
4657 s->phase = phase;
4658 switch (phase)
4659 {
4660 case T30_PHASE_A_CED:
4661 if (s->set_rx_type_handler)
4662 s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_V21, 300, FALSE, TRUE);
4663 if (s->set_tx_type_handler)
4664 s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_CED, 0, FALSE, FALSE);
4665 break;
4666 case T30_PHASE_A_CNG:
4667 if (s->set_rx_type_handler)
4668 s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_V21, 300, FALSE, TRUE);
4669 if (s->set_tx_type_handler)
4670 s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_CNG, 0, FALSE, FALSE);
4671 break;
4672 case T30_PHASE_B_RX:
4673 case T30_PHASE_D_RX:
4674 if (s->set_rx_type_handler)
4675 s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_V21, 300, FALSE, TRUE);
4676 if (s->set_tx_type_handler)
4677 s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_NONE, 0, FALSE, FALSE);
4678 break;
4679 case T30_PHASE_B_TX:
4680 case T30_PHASE_D_TX:
4681 if (!s->far_end_detected && s->timer_t0_t1 > 0)
4682 {
4683 s->timer_t0_t1 = ms_to_samples(DEFAULT_TIMER_T1);
4684 s->far_end_detected = TRUE;
4685 }
4686 if (s->set_rx_type_handler)
4687 s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_NONE, 0, FALSE, FALSE);
4688 if (s->set_tx_type_handler)
4689 s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_V21, 300, FALSE, TRUE);
4690 break;
4691 case T30_PHASE_C_NON_ECM_RX:
4692 if (s->set_rx_type_handler)
4693 {
4694 /* Momentarily stop the receive modem, so the next change is forced to happen. If we don't do this
4695 an HDLC message on the slow modem, which has disabled the fast modem, will prevent the same
4696 fast modem from restarting. */
4697 s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_NONE, 0, FALSE, FALSE);
4698 s->set_rx_type_handler(s->set_rx_type_user_data, fallback_sequence[s->current_fallback].modem_type, fallback_sequence[s->current_fallback].bit_rate, s->short_train, FALSE);
4699 }
4700 if (s->set_tx_type_handler)
4701 s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_NONE, 0, FALSE, FALSE);
4702 break;
4703 case T30_PHASE_C_NON_ECM_TX:
4704 /* Pause before switching from anything to phase C */
4705 /* Always prime the training count for 1.5s of data at the current rate. Its harmless if
4706 we prime it and are not doing TCF. */
4707 s->tcf_test_bits = (3*fallback_sequence[s->current_fallback].bit_rate)/2;
4708 if (s->set_rx_type_handler)
4709 {
4710 /* Momentarily stop the receive modem, so the next change is forced to happen. If we don't do this
4711 an HDLC message on the slow modem, which has disabled the fast modem, will prevent the same
4712 fast modem from restarting. */
4713 s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_NONE, 0, FALSE, FALSE);
4714 s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_NONE, 0, FALSE, FALSE);
4715 }
4716 if (s->set_tx_type_handler)
4717 s->set_tx_type_handler(s->set_tx_type_user_data, fallback_sequence[s->current_fallback].modem_type, fallback_sequence[s->current_fallback].bit_rate, s->short_train, FALSE);
4718 break;
4719 case T30_PHASE_C_ECM_RX:
4720 if (s->set_rx_type_handler)
4721 s->set_rx_type_handler(s->set_rx_type_user_data, fallback_sequence[s->current_fallback].modem_type, fallback_sequence[s->current_fallback].bit_rate, s->short_train, TRUE);
4722 if (s->set_tx_type_handler)
4723 s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_NONE, 0, FALSE, FALSE);
4724 break;
4725 case T30_PHASE_C_ECM_TX:
4726 /* Pause before switching from anything to phase C */
4727 if (s->set_rx_type_handler)
4728 s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_NONE, 0, FALSE, FALSE);
4729 if (s->set_tx_type_handler)
4730 s->set_tx_type_handler(s->set_tx_type_user_data, fallback_sequence[s->current_fallback].modem_type, fallback_sequence[s->current_fallback].bit_rate, s->short_train, TRUE);
4731 break;
4732 case T30_PHASE_E:
4733 /* Send a little silence before ending things, to ensure the
4734 buffers are all flushed through, and the far end has seen
4735 the last message we sent. */
4736 s->tcf_test_bits = 0;
4737 s->tcf_current_zeros = 0;
4738 s->tcf_most_zeros = 0;
4739 if (s->set_rx_type_handler)
4740 s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_NONE, 0, FALSE, FALSE);
4741 if (s->set_tx_type_handler)
4742 s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_PAUSE, 0, FINAL_FLUSH_TIME, FALSE);
4743 break;
4744 case T30_PHASE_CALL_FINISHED:
4745 if (s->set_rx_type_handler)
4746 s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_DONE, 0, FALSE, FALSE);
4747 if (s->set_tx_type_handler)
4748 s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_DONE, 0, FALSE, FALSE);
4749 break;
4750 }
4751 }
4752 /*- End of function --------------------------------------------------------*/
4753
4754 static void set_state(t30_state_t *s, int state)
4755 {
4756 if (s->state != state)
4757 {
4758 span_log(&s->logging, SPAN_LOG_FLOW, "Changing from state %d to %d\n", s->state, state);
4759 s->state = state;
4760 }
4761 s->step = 0;
4762 }
4763 /*- End of function --------------------------------------------------------*/
4764
4765 static void repeat_last_command(t30_state_t *s)
4766 {
4767 s->step = 0;
4768 if (++s->retries >= MAX_COMMAND_TRIES)
4769 {
4770 span_log(&s->logging, SPAN_LOG_FLOW, "Too many retries. Giving up.\n");
4771 switch (s->state)
4772 {
4773 case T30_STATE_D_POST_TCF:
4774 /* Received no response to DCS or TCF */
4775 s->current_status = T30_ERR_TX_PHBDEAD;
4776 break;
4777 case T30_STATE_II_Q:
4778 case T30_STATE_IV_PPS_NULL:
4779 case T30_STATE_IV_PPS_Q:
4780 /* No response after sending a page */
4781 s->current_status = T30_ERR_TX_PHDDEAD;
4782 break;
4783 default:
4784 /* Disconnected after permitted retries */
4785 s->current_status = T30_ERR_RETRYDCN;
4786 break;
4787 }
4788 send_dcn(s);
4789 return;
4790 }
4791 span_log(&s->logging, SPAN_LOG_FLOW, "Retry number %d\n", s->retries);
4792 switch (s->state)
4793 {
4794 case T30_STATE_R:
4795 s->dis_received = FALSE;
4796 queue_phase(s, T30_PHASE_B_TX);
4797 send_dis_or_dtc_sequence(s, TRUE);
4798 break;
4799 case T30_STATE_III_Q_MCF:
4800 queue_phase(s, T30_PHASE_D_TX);
4801 send_simple_frame(s, T30_MCF);
4802 break;
4803 case T30_STATE_III_Q_RTP:
4804 queue_phase(s, T30_PHASE_D_TX);
4805 send_simple_frame(s, T30_RTP);
4806 break;
4807 case T30_STATE_III_Q_RTN:
4808 queue_phase(s, T30_PHASE_D_TX);
4809 send_simple_frame(s, T30_RTN);
4810 break;
4811 case T30_STATE_II_Q:
4812 queue_phase(s, T30_PHASE_D_TX);
4813 send_simple_frame(s, s->next_tx_step);
4814 break;
4815 case T30_STATE_IV_PPS_NULL:
4816 case T30_STATE_IV_PPS_Q:
4817 queue_phase(s, T30_PHASE_D_TX);
4818 send_pps_frame(s);
4819 break;
4820 case T30_STATE_IV_PPS_RNR:
4821 case T30_STATE_IV_EOR_RNR:
4822 queue_phase(s, T30_PHASE_D_TX);
4823 send_rr(s);
4824 break;
4825 case T30_STATE_D:
4826 queue_phase(s, T30_PHASE_B_TX);
4827 send_dcs_sequence(s, TRUE);
4828 break;
4829 case T30_STATE_F_FTT:
4830 queue_phase(s, T30_PHASE_B_TX);
4831 send_simple_frame(s, T30_FTT);
4832 break;
4833 case T30_STATE_F_CFR:
4834 queue_phase(s, T30_PHASE_B_TX);
4835 send_cfr_sequence(s, TRUE);
4836 break;
4837 case T30_STATE_D_POST_TCF:
4838 /* Need to send the whole training thing again */
4839 s->short_train = FALSE;
4840 queue_phase(s, T30_PHASE_B_TX);
4841 send_dcs_sequence(s, TRUE);
4842 break;
4843 case T30_STATE_F_POST_RCP_RNR:
4844 /* Just ignore */
4845 break;
4846 default:
4847 span_log(&s->logging,
4848 SPAN_LOG_FLOW,
4849 "Repeat command called with nothing to repeat - phase %s, state %d\n",
4850 phase_names[s->phase],
4851 s->state);
4852 break;
4853 }
4854 }
4855 /*- End of function --------------------------------------------------------*/
4856
4857 static void timer_t2_start(t30_state_t *s)
4858 {
4859 span_log(&s->logging, SPAN_LOG_FLOW, "Start T2\n");
4860 s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T2);
4861 s->timer_t2_t4_is = TIMER_IS_T2;
4862 }
4863 /*- End of function --------------------------------------------------------*/
4864
4865 static void timer_t2a_start(t30_state_t *s)
4866 {
4867 /* T.30 Annex A says timeout T1 should be used in ECM phase C to time out the
4868 first frame after the flags start. This seems a strange reuse of the name T1
4869 for a different purpose, but there it is. We distinguish it by calling it T1A. */
4870 if (s->phase == T30_PHASE_C_ECM_RX)
4871 {
4872 span_log(&s->logging, SPAN_LOG_FLOW, "Start T1A\n");
4873 s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T1A);
4874 s->timer_t2_t4_is = TIMER_IS_T1A;
4875 }
4876 else
4877 {
4878 span_log(&s->logging, SPAN_LOG_FLOW, "Start T2A\n");
4879 s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T2A);
4880 s->timer_t2_t4_is = TIMER_IS_T2A;
4881 }
4882 }
4883 /*- End of function --------------------------------------------------------*/
4884
4885 static void timer_t2b_start(t30_state_t *s)
4886 {
4887 span_log(&s->logging, SPAN_LOG_FLOW, "Start T2B\n");
4888 s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T2B);
4889 s->timer_t2_t4_is = TIMER_IS_T2B;
4890 }
4891 /*- End of function --------------------------------------------------------*/
4892
4893 static void timer_t4_start(t30_state_t *s)
4894 {
4895 span_log(&s->logging, SPAN_LOG_FLOW, "Start T4\n");
4896 s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T4);
4897 s->timer_t2_t4_is = TIMER_IS_T4;
4898 }
4899 /*- End of function --------------------------------------------------------*/
4900
4901 static void timer_t4a_start(t30_state_t *s)
4902 {
4903 span_log(&s->logging, SPAN_LOG_FLOW, "Start T4A\n");
4904 s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T4A);
4905 s->timer_t2_t4_is = TIMER_IS_T4A;
4906 }
4907 /*- End of function --------------------------------------------------------*/
4908
4909 static void timer_t4b_start(t30_state_t *s)
4910 {
4911 span_log(&s->logging, SPAN_LOG_FLOW, "Start T4B\n");
4912 s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T4B);
4913 s->timer_t2_t4_is = TIMER_IS_T4B;
4914 }
4915 /*- End of function --------------------------------------------------------*/
4916
4917 static void timer_t2_t4_stop(t30_state_t *s)
4918 {
4919 const char *tag;
4920
4921 switch (s->timer_t2_t4_is)
4922 {
4923 case TIMER_IS_IDLE:
4924 tag = "none";
4925 break;
4926 case TIMER_IS_T1A:
4927 tag = "T1A";
4928 break;
4929 case TIMER_IS_T2:
4930 tag = "T2";
4931 break;
4932 case TIMER_IS_T2A:
4933 tag = "T2A";
4934 break;
4935 case TIMER_IS_T2B:
4936 tag = "T2B";
4937 break;
4938 case TIMER_IS_T2C:
4939 tag = "T2C";
4940 break;
4941 case TIMER_IS_T4:
4942 tag = "T4";
4943 break;
4944 case TIMER_IS_T4A:
4945 tag = "T4A";
4946 break;
4947 case TIMER_IS_T4B:
4948 tag = "T4B";
4949 break;
4950 case TIMER_IS_T4C:
4951 tag = "T4C";
4952 break;
4953 default:
4954 tag = "T2/T4";
4955 break;
4956 }
4957 span_log(&s->logging, SPAN_LOG_FLOW, "Stop %s (%d remaining)\n", tag, s->timer_t2_t4);
4958 s->timer_t2_t4 = 0;
4959 s->timer_t2_t4_is = TIMER_IS_IDLE;
4960 }
4961 /*- End of function --------------------------------------------------------*/
4962
4963 static void timer_t0_expired(t30_state_t *s)
4964 {
4965 span_log(&s->logging, SPAN_LOG_FLOW, "T0 expired in state %d\n", s->state);
4966 s->current_status = T30_ERR_T0_EXPIRED;
4967 /* Just end the call */
4968 disconnect(s);
4969 }
4970 /*- End of function --------------------------------------------------------*/
4971
4972 static void timer_t1_expired(t30_state_t *s)
4973 {
4974 span_log(&s->logging, SPAN_LOG_FLOW, "T1 expired in state %d\n", s->state);
4975 /* The initial connection establishment has timeout out. In other words, we
4976 have been unable to communicate successfully with a remote machine.
4977 It is time to abandon the call. */
4978 s->current_status = T30_ERR_T1_EXPIRED;
4979 switch (s->state)
4980 {
4981 case T30_STATE_T:
4982 /* Just end the call */
4983 disconnect(s);
4984 break;
4985 case T30_STATE_R:
4986 /* Send disconnect, and then end the call. Since we have not
4987 successfully contacted the far end, it is unclear why we should
4988 send a disconnect message at this point. However, it is what T.30
4989 says we should do. */
4990 send_dcn(s);
4991 break;
4992 }
4993 }
4994 /*- End of function --------------------------------------------------------*/
4995
4996 static void timer_t2_expired(t30_state_t *s)
4997 {
4998 if (s->timer_t2_t4_is != TIMER_IS_T2B)
4999 span_log(&s->logging, SPAN_LOG_FLOW, "T2 expired in phase %s, state %d\n", phase_names[s->phase], s->state);
5000 switch (s->state)
5001 {
5002 case T30_STATE_III_Q_MCF:
5003 case T30_STATE_III_Q_RTP:
5004 case T30_STATE_III_Q_RTN:
5005 case T30_STATE_F_POST_RCP_PPR:
5006 case T30_STATE_F_POST_RCP_MCF:
5007 switch (s->next_rx_step)
5008 {
5009 case T30_EOM:
5010 case T30_PRI_EOM:
5011 case T30_EOS:
5012 /* We didn't receive a response to our T30_MCF after T30_EOM, so we must be OK
5013 to proceed to phase B, and pretty act like its the beginning of a call. */
5014 span_log(&s->logging, SPAN_LOG_FLOW, "Returning to phase B after %s\n", t30_frametype(s->next_rx_step));
5015 set_phase(s, T30_PHASE_B_TX);
5016 timer_t2_start(s);
5017 s->dis_received = FALSE;
5018 send_dis_or_dtc_sequence(s, TRUE);
5019 return;
5020 }
5021 break;
5022 case T30_STATE_F_TCF:
5023 span_log(&s->logging, SPAN_LOG_FLOW, "No TCF data received\n");
5024 set_phase(s, T30_PHASE_B_TX);
5025 set_state(s, T30_STATE_F_FTT);
5026 send_simple_frame(s, T30_FTT);
5027 return;
5028 case T30_STATE_F_DOC_ECM:
5029 case T30_STATE_F_DOC_NON_ECM:
5030 /* While waiting for FAX page */
5031 s->current_status = T30_ERR_RX_T2EXPFAX;
5032 break;
5033 case T30_STATE_F_POST_DOC_ECM:
5034 case T30_STATE_F_POST_DOC_NON_ECM:
5035 /* While waiting for next FAX page */
5036 s->current_status = T30_ERR_RX_T2EXPMPS;
5037 break;
5038 #if 0
5039 case ??????:
5040 /* While waiting for DCN */
5041 s->current_status = T30_ERR_RX_T2EXPDCN;
5042 break;
5043 case ??????:
5044 /* While waiting for phase D */
5045 s->current_status = T30_ERR_RX_T2EXPD;
5046 break;
5047 #endif
5048 case T30_STATE_IV_PPS_RNR:
5049 case T30_STATE_IV_EOR_RNR:
5050 /* While waiting for RR command */
5051 s->current_status = T30_ERR_RX_T2EXPRR;
5052 break;
5053 case T30_STATE_R:
5054 /* While waiting for NSS, DCS or MCF */
5055 s->current_status = T30_ERR_RX_T2EXP;
5056 break;
5057 case T30_STATE_F_FTT:
5058 break;
5059 }
5060 queue_phase(s, T30_PHASE_B_TX);
5061 start_receiving_document(s);
5062 }
5063 /*- End of function --------------------------------------------------------*/
5064
5065 static void timer_t1a_expired(t30_state_t *s)
5066 {
5067 span_log(&s->logging, SPAN_LOG_FLOW, "T1A expired in phase %s, state %d. An HDLC frame lasted too long.\n", phase_names[s->phase], s->state);
5068 s->current_status = T30_ERR_HDLC_CARRIER;
5069 disconnect(s);
5070 }
5071 /*- End of function --------------------------------------------------------*/
5072
5073 static void timer_t2a_expired(t30_state_t *s)
5074 {
5075 span_log(&s->logging, SPAN_LOG_FLOW, "T2A expired in phase %s, state %d. An HDLC frame lasted too long.\n", phase_names[s->phase], s->state);
5076 s->current_status = T30_ERR_HDLC_CARRIER;
5077 disconnect(s);
5078 }
5079 /*- End of function --------------------------------------------------------*/
5080
5081 static void timer_t2b_expired(t30_state_t *s)
5082 {
5083 span_log(&s->logging, SPAN_LOG_FLOW, "T2B expired in phase %s, state %d. The line is now quiet.\n", phase_names[s->phase], s->state);
5084 timer_t2_expired(s);
5085 }
5086 /*- End of function --------------------------------------------------------*/
5087
5088 static void timer_t3_expired(t30_state_t *s)
5089 {
5090 span_log(&s->logging, SPAN_LOG_FLOW, "T3 expired in phase %s, state %d\n", phase_names[s->phase], s->state);
5091 s->current_status = T30_ERR_T3_EXPIRED;
5092 disconnect(s);
5093 }
5094 /*- End of function --------------------------------------------------------*/
5095
5096 static void timer_t4_expired(t30_state_t *s)
5097 {
5098 /* There was no response (or only a corrupt response) to a command,
5099 within the T4 timeout period. */
5100 span_log(&s->logging, SPAN_LOG_FLOW, "T4 expired in phase %s, state %d\n", phase_names[s->phase], s->state);
5101 /* Of course, things might just be a little late, especially if there are T.38
5102 links in the path. There is no point in simply timing out, and resending,
5103 if we are currently receiving something from the far end - its a half-duplex
5104 path, so the two transmissions will conflict. Our best strategy is to wait
5105 until there is nothing being received, or give up after a long backstop timeout.
5106 In the meantime, if we get a meaningful, if somewhat delayed, response, we
5107 should accept it and carry on. */
5108 repeat_last_command(s);
5109 }
5110 /*- End of function --------------------------------------------------------*/
5111
5112 static void timer_t4a_expired(t30_state_t *s)
5113 {
5114 span_log(&s->logging, SPAN_LOG_FLOW, "T4A expired in phase %s, state %d. An HDLC frame lasted too long.\n", phase_names[s->phase], s->state);
5115 s->current_status = T30_ERR_HDLC_CARRIER;
5116 disconnect(s);
5117 }
5118 /*- End of function --------------------------------------------------------*/
5119
5120 static void timer_t4b_expired(t30_state_t *s)
5121 {
5122 span_log(&s->logging, SPAN_LOG_FLOW, "T4B expired in phase %s, state %d. The line is now quiet.\n", phase_names[s->phase], s->state);
5123 timer_t4_expired(s);
5124 }
5125 /*- End of function --------------------------------------------------------*/
5126
5127 static void timer_t5_expired(t30_state_t *s)
5128 {
5129 /* Give up waiting for the receiver to become ready in error correction mode */
5130 span_log(&s->logging, SPAN_LOG_FLOW, "T5 expired in phase %s, state %d\n", phase_names[s->phase], s->state);
5131 s->current_status = T30_ERR_TX_T5EXP;
5132 }
5133 /*- End of function --------------------------------------------------------*/
5134
5135 static void decode_20digit_msg(t30_state_t *s, char *msg, const uint8_t *pkt, int len)
5136 {
5137 int p;
5138 int k;
5139 char text[T30_MAX_IDENT_LEN + 1];
5140
5141 if (msg == NULL)
5142 msg = text;
5143 if (len > T30_MAX_IDENT_LEN + 1)
5144 {
5145 unexpected_frame_length(s, pkt, len);
5146 msg[0] = '\0';
5147 return;
5148 }
5149 p = len;
5150 /* Strip trailing spaces */
5151 while (p > 1 && pkt[p - 1] == ' ')
5152 p--;
5153 /* The string is actually backwards in the message */
5154 k = 0;
5155 while (p > 1)
5156 msg[k++] = pkt[--p];
5157 msg[k] = '\0';
5158 span_log(&s->logging, SPAN_LOG_FLOW, "Remote gave %s as: \"%s\"\n", t30_frametype(pkt[0]), msg);
5159 }
5160 /*- End of function --------------------------------------------------------*/
5161
5162 static void decode_url_msg(t30_state_t *s, char *msg, const uint8_t *pkt, int len)
5163 {
5164 char text[77 + 1];
5165
5166 /* TODO: decode properly, as per T.30 5.3.6.2.12 */
5167 if (msg == NULL)
5168 msg = text;
5169 if (len < 3 || len > 77 + 3 || len != pkt[2] + 3)
5170 {
5171 unexpected_frame_length(s, pkt, len);
5172 msg[0] = '\0';
5173 return;
5174 }
5175 /* First octet is the sequence number of the packet.
5176 Bit 7 = 1 for more follows, 0 for last packet in the sequence.
5177 Bits 6-0 = The sequence number, 0 to 0x7F
5178 Second octet is the type of internet address.
5179 Bits 7-4 = reserved
5180 Bits 3-0 = type:
5181 0 = reserved
5182 1 = e-mail address
5183 2 = URL
5184 3 = TCP/IP V4
5185 4 = TCP/IP V6
5186 5 = international phone number, in the usual +... format
5187 6-15 = reserved
5188 Third octet is the length of the internet address
5189 Bit 7 = 1 for more follows, 0 for last packet in the sequence.
5190 Bits 6-0 = length
5191 */
5192 memcpy(msg, &pkt[3], len - 3);
5193 msg[len - 3] = '\0';
5194 span_log(&s->logging, SPAN_LOG_FLOW, "Remote fax gave %s as: %d, %d, \"%s\"\n", t30_frametype(pkt[0]), pkt[0], pkt[1], msg);
5195 }
5196 /*- End of function --------------------------------------------------------*/
5197
5198 static void t30_non_ecm_rx_status(void *user_data, int status)
5199 {
5200 t30_state_t *s;
5201 int was_trained;
5202
5203 s = (t30_state_t *) user_data;
5204 span_log(&s->logging, SPAN_LOG_FLOW, "Non-ECM signal status is %s (%d) in state %d\n", signal_status_to_str(status), status, s->state);
5205 switch (status)
5206 {
5207 case SIG_STATUS_TRAINING_IN_PROGRESS:
5208 break;
5209 case SIG_STATUS_TRAINING_FAILED:
5210 s->rx_trained = FALSE;
5211 break;
5212 case SIG_STATUS_TRAINING_SUCCEEDED:
5213 /* The modem is now trained */
5214 /* In case we are in trainability test mode... */
5215 s->tcf_test_bits = 0;
5216 s->tcf_current_zeros = 0;
5217 s->tcf_most_zeros = 0;
5218 s->rx_signal_present = TRUE;
5219 s->rx_trained = TRUE;
5220 timer_t2_t4_stop(s);
5221 break;
5222 case SIG_STATUS_CARRIER_UP:
5223 break;
5224 case SIG_STATUS_CARRIER_DOWN:
5225 was_trained = s->rx_trained;
5226 s->rx_signal_present = FALSE;
5227 s->rx_trained = FALSE;
5228 switch (s->state)
5229 {
5230 case T30_STATE_F_TCF:
5231 /* Only respond if we managed to actually sync up with the source. We don't
5232 want to respond just because we saw a click. These often occur just
5233 before the real signal, with many modems. Presumably this is due to switching
5234 within the far end modem. We also want to avoid the possibility of responding
5235 to the tail end of any slow modem signal. If there was a genuine data signal
5236 which we failed to train on it should not matter. If things are that bad, we
5237 do not stand much chance of good quality communications. */
5238 if (was_trained)
5239 {
5240 /* Although T.30 says the training test should be 1.5s of all 0's, some FAX
5241 machines send a burst of all 1's before the all 0's. Tolerate this. */
5242 if (s->tcf_current_zeros > s->tcf_most_zeros)
5243 s->tcf_most_zeros = s->tcf_current_zeros;
5244 span_log(&s->logging, SPAN_LOG_FLOW, "Trainability (TCF) test result - %d total bits. longest run of zeros was %d\n", s->tcf_test_bits, s->tcf_most_zeros);
5245 if (s->tcf_most_zeros < fallback_sequence[s->current_fallback].bit_rate)
5246 {
5247 span_log(&s->logging, SPAN_LOG_FLOW, "Trainability (TCF) test failed - longest run of zeros was %d\n", s->tcf_most_zeros);
5248 set_phase(s, T30_PHASE_B_TX);
5249 set_state(s, T30_STATE_F_FTT);
5250 send_simple_frame(s, T30_FTT);
5251 }
5252 else
5253 {
5254 /* The training went OK */
5255 s->short_train = TRUE;
5256 s->in_message = TRUE;
5257 rx_start_page(s);
5258 set_phase(s, T30_PHASE_B_TX);
5259 set_state(s, T30_STATE_F_CFR);
5260 send_cfr_sequence(s, TRUE);
5261 }
5262 }
5263 break;
5264 case T30_STATE_F_POST_DOC_NON_ECM:
5265 /* Page ended cleanly */
5266 if (s->current_status == T30_ERR_RX_NOCARRIER)
5267 s->current_status = T30_ERR_OK;
5268 break;
5269 default:
5270 /* We should be receiving a document right now, but it did not end cleanly. */
5271 if (was_trained)
5272 {
5273 span_log(&s->logging, SPAN_LOG_WARNING, "Page did not end cleanly\n");
5274 /* We trained OK, so we should have some kind of received page, even though
5275 it did not end cleanly. */
5276 set_state(s, T30_STATE_F_POST_DOC_NON_ECM);
5277 set_phase(s, T30_PHASE_D_RX);
5278 timer_t2_start(s);
5279 if (s->current_status == T30_ERR_RX_NOCARRIER)
5280 s->current_status = T30_ERR_OK;
5281 }
5282 else
5283 {
5284 span_log(&s->logging, SPAN_LOG_WARNING, "Non-ECM carrier not found\n");
5285 s->current_status = T30_ERR_RX_NOCARRIER;
5286 }
5287 break;
5288 }
5289 if (s->next_phase != T30_PHASE_IDLE)
5290 {
5291 set_phase(s, s->next_phase);
5292 s->next_phase = T30_PHASE_IDLE;
5293 }
5294 break;
5295 default:
5296 span_log(&s->logging, SPAN_LOG_WARNING, "Unexpected non-ECM rx status - %d!\n", status);
5297 break;
5298 }
5299 }
5300 /*- End of function --------------------------------------------------------*/
5301
5302 SPAN_DECLARE_NONSTD(void) t30_non_ecm_put_bit(void *user_data, int bit)
5303 {
5304 t30_state_t *s;
5305
5306 if (bit < 0)
5307 {
5308 t30_non_ecm_rx_status(user_data, bit);
5309 return;
5310 }
5311 s = (t30_state_t *) user_data;
5312 switch (s->state)
5313 {
5314 case T30_STATE_F_TCF:
5315 /* Trainability test */
5316 s->tcf_test_bits++;
5317 if (bit)
5318 {
5319 if (s->tcf_current_zeros > s->tcf_most_zeros)
5320 s->tcf_most_zeros = s->tcf_current_zeros;
5321 s->tcf_current_zeros = 0;
5322 }
5323 else
5324 {
5325 s->tcf_current_zeros++;
5326 }
5327 break;
5328 case T30_STATE_F_DOC_NON_ECM:
5329 /* Document transfer */
5330 if (t4_rx_put_bit(&s->t4, bit))
5331 {
5332 /* That is the end of the document */
5333 set_state(s, T30_STATE_F_POST_DOC_NON_ECM);
5334 queue_phase(s, T30_PHASE_D_RX);
5335 timer_t2_start(s);
5336 }
5337 break;
5338 }
5339 }
5340 /*- End of function --------------------------------------------------------*/
5341
5342 SPAN_DECLARE(void) t30_non_ecm_put_byte(void *user_data, int byte)
5343 {
5344 t30_state_t *s;
5345
5346 s = (t30_state_t *) user_data;
5347 switch (s->state)
5348 {
5349 case T30_STATE_F_TCF:
5350 /* Trainability test */
5351 /* This makes counting zeros fast, but approximate. That really doesn't matter */
5352 s->tcf_test_bits += 8;
5353 if (byte)
5354 {
5355 if (s->tcf_current_zeros > s->tcf_most_zeros)
5356 s->tcf_most_zeros = s->tcf_current_zeros;
5357 s->tcf_current_zeros = 0;
5358 }
5359 else
5360 {
5361 s->tcf_current_zeros += 8;
5362 }
5363 break;
5364 case T30_STATE_F_DOC_NON_ECM:
5365 /* Document transfer */
5366 if (t4_rx_put_byte(&s->t4, (uint8_t) byte))
5367 {
5368 /* That is the end of the document */
5369 set_state(s, T30_STATE_F_POST_DOC_NON_ECM);
5370 queue_phase(s, T30_PHASE_D_RX);
5371 timer_t2_start(s);
5372 }
5373 break;
5374 }
5375 }
5376 /*- End of function --------------------------------------------------------*/
5377
5378 SPAN_DECLARE(void) t30_non_ecm_put_chunk(void *user_data, const uint8_t buf[], int len)
5379 {
5380 t30_state_t *s;
5381 int i;
5382
5383 s = (t30_state_t *) user_data;
5384 switch (s->state)
5385 {
5386 case T30_STATE_F_TCF:
5387 /* Trainability test */
5388 /* This makes counting zeros fast, but approximate. That really doesn't matter */
5389 s->tcf_test_bits += 8*len;
5390 for (i = 0; i < len; i++)
5391 {
5392 if (buf[i])
5393 {
5394 if (s->tcf_current_zeros > s->tcf_most_zeros)
5395 s->tcf_most_zeros = s->tcf_current_zeros;
5396 s->tcf_current_zeros = 0;
5397 }
5398 else
5399 {
5400 s->tcf_current_zeros += 8;
5401 }
5402 }
5403 break;
5404 case T30_STATE_F_DOC_NON_ECM:
5405 /* Document transfer */
5406 if (t4_rx_put_chunk(&s->t4, buf, len))
5407 {
5408 /* That is the end of the document */
5409 set_state(s, T30_STATE_F_POST_DOC_NON_ECM);
5410 queue_phase(s, T30_PHASE_D_RX);
5411 timer_t2_start(s);
5412 }
5413 break;
5414 }
5415 }
5416 /*- End of function --------------------------------------------------------*/
5417
5418 SPAN_DECLARE_NONSTD(int) t30_non_ecm_get_bit(void *user_data)
5419 {
5420 int bit;
5421 t30_state_t *s;
5422
5423 s = (t30_state_t *) user_data;
5424 switch (s->state)
5425 {
5426 case T30_STATE_D_TCF:
5427 /* Trainability test. */
5428 bit = 0;
5429 if (s->tcf_test_bits-- < 0)
5430 {
5431 /* Finished sending training test. */
5432 bit = SIG_STATUS_END_OF_DATA;
5433 }
5434 break;
5435 case T30_STATE_I:
5436 /* Transferring real data. */
5437 bit = t4_tx_get_bit(&s->t4);
5438 break;
5439 case T30_STATE_D_POST_TCF:
5440 case T30_STATE_II_Q:
5441 /* We should be padding out a block of samples if we are here */
5442 bit = 0;
5443 break;
5444 default:
5445 span_log(&s->logging, SPAN_LOG_WARNING, "t30_non_ecm_get_bit in bad state %d\n", s->state);
5446 bit = SIG_STATUS_END_OF_DATA;
5447 break;
5448 }
5449 return bit;
5450 }
5451 /*- End of function --------------------------------------------------------*/
5452
5453 SPAN_DECLARE(int) t30_non_ecm_get_byte(void *user_data)
5454 {
5455 int byte;
5456 t30_state_t *s;
5457
5458 s = (t30_state_t *) user_data;
5459 switch (s->state)
5460 {
5461 case T30_STATE_D_TCF:
5462 /* Trainability test. */
5463 byte = 0;
5464 if ((s->tcf_test_bits -= 8) < 0)
5465 {
5466 /* Finished sending training test. */
5467 byte = 0x100;
5468 }
5469 break;
5470 case T30_STATE_I:
5471 /* Transferring real data. */
5472 byte = t4_tx_get_byte(&s->t4);
5473 break;
5474 case T30_STATE_D_POST_TCF:
5475 case T30_STATE_II_Q:
5476 /* We should be padding out a block of samples if we are here */
5477 byte = 0;
5478 break;
5479 default:
5480 span_log(&s->logging, SPAN_LOG_WARNING, "t30_non_ecm_get_byte in bad state %d\n", s->state);
5481 byte = 0x100;
5482 break;
5483 }
5484 return byte;
5485 }
5486 /*- End of function --------------------------------------------------------*/
5487
5488 SPAN_DECLARE(int) t30_non_ecm_get_chunk(void *user_data, uint8_t buf[], int max_len)
5489 {
5490 int len;
5491 t30_state_t *s;
5492
5493 s = (t30_state_t *) user_data;
5494 switch (s->state)
5495 {
5496 case T30_STATE_D_TCF:
5497 /* Trainability test. */
5498 for (len = 0; len < max_len; len++)
5499 {
5500 buf[len] = 0;
5501 if ((s->tcf_test_bits -= 8) < 0)
5502 break;
5503 }
5504 break;
5505 case T30_STATE_I:
5506 /* Transferring real data. */
5507 len = t4_tx_get_chunk(&s->t4, buf, max_len);
5508 break;
5509 case T30_STATE_D_POST_TCF:
5510 case T30_STATE_II_Q:
5511 /* We should be padding out a block of samples if we are here */
5512 len = 0;
5513 break;
5514 default:
5515 span_log(&s->logging, SPAN_LOG_WARNING, "t30_non_ecm_get_chunk in bad state %d\n", s->state);
5516 len = 0;
5517 break;
5518 }
5519 return len;
5520 }
5521 /*- End of function --------------------------------------------------------*/
5522
5523 static void t30_hdlc_rx_status(void *user_data, int status)
5524 {
5525 t30_state_t *s;
5526 int was_trained;
5527
5528 s = (t30_state_t *) user_data;
5529 span_log(&s->logging, SPAN_LOG_FLOW, "HDLC signal status is %s (%d) in state %d\n", signal_status_to_str(status), status, s->state);
5530 switch (status)
5531 {
5532 case SIG_STATUS_TRAINING_IN_PROGRESS:
5533 break;
5534 case SIG_STATUS_TRAINING_FAILED:
5535 s->rx_trained = FALSE;
5536 break;
5537 case SIG_STATUS_TRAINING_SUCCEEDED:
5538 /* The modem is now trained */
5539 s->rx_signal_present = TRUE;
5540 s->rx_trained = TRUE;
5541 break;
5542 case SIG_STATUS_CARRIER_UP:
5543 s->rx_signal_present = TRUE;
5544 switch (s->timer_t2_t4_is)
5545 {
5546 case TIMER_IS_T2B:
5547 timer_t2_t4_stop(s);
5548 s->timer_t2_t4_is = TIMER_IS_T2C;
5549 break;
5550 case TIMER_IS_T4B:
5551 timer_t2_t4_stop(s);
5552 s->timer_t2_t4_is = TIMER_IS_T4C;
5553 break;
5554 }
5555 break;
5556 case SIG_STATUS_CARRIER_DOWN:
5557 was_trained = s->rx_trained;
5558 s->rx_signal_present = FALSE;
5559 s->rx_trained = FALSE;
5560 /* If a phase change has been queued to occur after the receive signal drops,
5561 its time to change. */
5562 if (s->state == T30_STATE_F_DOC_ECM)
5563 {
5564 /* We should be receiving a document right now, but we haven't seen an RCP at the end of
5565 transmission. */
5566 if (was_trained)
5567 {
5568 /* We trained OK, so we should have some kind of received page, possibly with
5569 zero good HDLC frames. It just did'nt end cleanly with an RCP. */
5570 span_log(&s->logging, SPAN_LOG_WARNING, "ECM signal did not end cleanly\n");
5571 /* Fake the existance of an RCP, and proceed */
5572 set_state(s, T30_STATE_F_POST_DOC_ECM);
5573 queue_phase(s, T30_PHASE_D_RX);
5574 timer_t2_start(s);
5575 /* We at least trained, so any missing carrier status is out of date */
5576 if (s->current_status == T30_ERR_RX_NOCARRIER)
5577 s->current_status = T30_ERR_OK;
5578 }
5579 else
5580 {
5581 /* Either there was no image carrier, or we failed to train to it. */
5582 span_log(&s->logging, SPAN_LOG_WARNING, "ECM carrier not found\n");
5583 s->current_status = T30_ERR_RX_NOCARRIER;
5584 }
5585 }
5586 if (s->next_phase != T30_PHASE_IDLE)
5587 {
5588 /* The appropriate timer for the next phase should already be in progress */
5589 set_phase(s, s->next_phase);
5590 s->next_phase = T30_PHASE_IDLE;
5591 }
5592 else
5593 {
5594 switch (s->timer_t2_t4_is)
5595 {
5596 case TIMER_IS_T1A:
5597 case TIMER_IS_T2A:
5598 case TIMER_IS_T2C:
5599 timer_t2b_start(s);
5600 break;
5601 case TIMER_IS_T4A:
5602 case TIMER_IS_T4C:
5603 timer_t4b_start(s);
5604 break;
5605 }
5606 }
5607 break;
5608 case SIG_STATUS_FRAMING_OK:
5609 if (!s->far_end_detected && s->timer_t0_t1 > 0)
5610 {
5611 s->timer_t0_t1 = ms_to_samples(DEFAULT_TIMER_T1);
5612 s->far_end_detected = TRUE;
5613 if (s->phase == T30_PHASE_A_CED || s->phase == T30_PHASE_A_CNG)
5614 set_phase(s, T30_PHASE_B_RX);
5615 }
5616 /* 5.4.3.1 Timer T2 is reset if flag is received. Timer T2A must be started. */
5617 /* Unstated, but implied, is that timer T4 and T4A are handled the same way. */
5618 if (s->timer_t2_t4 > 0)
5619 {
5620 switch(s->timer_t2_t4_is)
5621 {
5622 case TIMER_IS_T1A:
5623 case TIMER_IS_T2:
5624 case TIMER_IS_T2A:
5625 timer_t2a_start(s);
5626 break;
5627 case TIMER_IS_T4:
5628 case TIMER_IS_T4A:
5629 timer_t4a_start(s);
5630 break;
5631 }
5632 }
5633 break;
5634 case SIG_STATUS_ABORT:
5635 /* Just ignore these */
5636 break;
5637 default:
5638 span_log(&s->logging, SPAN_LOG_FLOW, "Unexpected HDLC special length - %d!\n", status);
5639 break;
5640 }
5641 }
5642 /*- End of function --------------------------------------------------------*/
5643
5644 SPAN_DECLARE_NONSTD(void) t30_hdlc_accept(void *user_data, const uint8_t *msg, int len, int ok)
5645 {
5646 t30_state_t *s;
5647
5648 if (len < 0)
5649 {
5650 t30_hdlc_rx_status(user_data, len);
5651 return;
5652 }
5653
5654 s = (t30_state_t *) user_data;
5655 /* The spec. says a command or response is not valid if:
5656 - any of the frames, optional or mandatory, have an FCS error.
5657 - any single frame exceeds 3s +- 15% (i.e. no frame should exceed 2.55s)
5658 - the final frame is not tagged as a final frame
5659 - the final frame is not a recognised one.
5660 The first point seems benign. If we accept an optional frame, and a later
5661 frame is bad, having accepted the optional frame should be harmless.
5662 The 2.55s maximum seems to limit signalling frames to no more than 95 octets,
5663 including FCS, and flag octets (assuming the use of V.21).
5664 */
5665 if (!ok)
5666 {
5667 span_log(&s->logging, SPAN_LOG_FLOW, "Bad HDLC CRC received\n");
5668 if (s->phase != T30_PHASE_C_ECM_RX)
5669 {
5670 /* We either force a resend, or we wait until a resend occurs through a timeout. */
5671 if ((s->supported_t30_features & T30_SUPPORT_COMMAND_REPEAT))
5672 {
5673 s->step = 0;
5674 if (s->phase == T30_PHASE_B_RX)
5675 queue_phase(s, T30_PHASE_B_TX);
5676 else
5677 queue_phase(s, T30_PHASE_D_TX);
5678 send_simple_frame(s, T30_CRP);
5679 }
5680 else
5681 {
5682 /* Cancel the command or response timer (if one is running) */
5683 span_log(&s->logging, SPAN_LOG_FLOW, "Bad CRC and timer is %d\n", s->timer_t2_t4_is);
5684 if (s->timer_t2_t4_is == TIMER_IS_T2A)
5685 timer_t2_t4_stop(s);
5686 }
5687 }
5688 return;
5689 }
5690
5691 if (len < 3)
5692 {
5693 span_log(&s->logging, SPAN_LOG_FLOW, "Bad HDLC frame length - %d\n", len);
5694 /* Cancel the command or response timer (if one is running) */
5695 timer_t2_t4_stop(s);
5696 return;
5697 }
5698 if (msg[0] != ADDRESS_FIELD
5699 ||
5700 !(msg[1] == CONTROL_FIELD_NON_FINAL_FRAME || msg[1] == CONTROL_FIELD_FINAL_FRAME))
5701 {
5702 span_log(&s->logging, SPAN_LOG_FLOW, "Bad HDLC frame header - %02x %02x\n", msg[0], msg[1]);
5703 /* Cancel the command or response timer (if one is running) */
5704 timer_t2_t4_stop(s);
5705 return;
5706 }
5707 s->rx_frame_received = TRUE;
5708 /* Cancel the command or response timer (if one is running) */
5709 timer_t2_t4_stop(s);
5710 process_rx_control_msg(s, msg, len);
5711 }
5712 /*- End of function --------------------------------------------------------*/
5713
5714 SPAN_DECLARE(void) t30_front_end_status(void *user_data, int status)
5715 {
5716 t30_state_t *s;
5717
5718 s = (t30_state_t *) user_data;
5719
5720 switch (status)
5721 {
5722 case T30_FRONT_END_SEND_STEP_COMPLETE:
5723 span_log(&s->logging, SPAN_LOG_FLOW, "Send complete in phase %s, state %d\n", phase_names[s->phase], s->state);
5724 /* We have finished sending our messages, so move on to the next operation. */
5725 switch (s->state)
5726 {
5727 case T30_STATE_ANSWERING:
5728 span_log(&s->logging, SPAN_LOG_FLOW, "Starting answer mode\n");
5729 set_phase(s, T30_PHASE_B_TX);
5730 timer_t2_start(s);
5731 s->dis_received = FALSE;
5732 send_dis_or_dtc_sequence(s, TRUE);
5733 break;
5734 case T30_STATE_R:
5735 if (send_dis_or_dtc_sequence(s, FALSE))
5736 {
5737 /* Wait for an acknowledgement. */
5738 set_phase(s, T30_PHASE_B_RX);
5739 timer_t4_start(s);
5740 }
5741 break;
5742 case T30_STATE_F_CFR:
5743 if (s->step == 0)
5744 {
5745 /* Shut down HDLC transmission. */
5746 if (s->send_hdlc_handler)
5747 s->send_hdlc_handler(s->send_hdlc_user_data, NULL, 0);
5748 s->step++;
5749 }
5750 else
5751 {
5752 if (s->error_correcting_mode)
5753 {
5754 set_state(s, T30_STATE_F_DOC_ECM);
5755 queue_phase(s, T30_PHASE_C_ECM_RX);
5756 }
5757 else
5758 {
5759 set_state(s, T30_STATE_F_DOC_NON_ECM);
5760 queue_phase(s, T30_PHASE_C_NON_ECM_RX);
5761 }
5762 timer_t2_start(s);
5763 s->next_rx_step = T30_MPS;
5764 }
5765 break;
5766 case T30_STATE_F_FTT:
5767 if (s->step == 0)
5768 {
5769 /* Shut down HDLC transmission. */
5770 if (s->send_hdlc_handler)
5771 s->send_hdlc_handler(s->send_hdlc_user_data, NULL, 0);
5772 s->step++;
5773 }
5774 else
5775 {
5776 set_phase(s, T30_PHASE_B_RX);
5777 timer_t2_start(s);
5778 }
5779 break;
5780 case T30_STATE_III_Q_MCF:
5781 case T30_STATE_III_Q_RTP:
5782 case T30_STATE_III_Q_RTN:
5783 case T30_STATE_F_POST_RCP_PPR:
5784 case T30_STATE_F_POST_RCP_MCF:
5785 if (s->step == 0)
5786 {
5787 /* Shut down HDLC transmission. */
5788 if (s->send_hdlc_handler)
5789 s->send_hdlc_handler(s->send_hdlc_user_data, NULL, 0);
5790 s->step++;
5791 }
5792 else
5793 {
5794 switch (s->next_rx_step)
5795 {
5796 case T30_MPS:
5797 case T30_PRI_MPS:
5798 /* We should now start to get another page */
5799 if (s->error_correcting_mode)
5800 {
5801 set_state(s, T30_STATE_F_DOC_ECM);
5802 queue_phase(s, T30_PHASE_C_ECM_RX);
5803 }
5804 else
5805 {
5806 set_state(s, T30_STATE_F_DOC_NON_ECM);
5807 queue_phase(s, T30_PHASE_C_NON_ECM_RX);
5808 }
5809 timer_t2_start(s);
5810 break;
5811 case T30_EOM:
5812 case T30_PRI_EOM:
5813 case T30_EOS:
5814 /* See if we get something back, before moving to phase B. */
5815 timer_t2_start(s);
5816 set_phase(s, T30_PHASE_D_RX);
5817 break;
5818 case T30_EOP:
5819 case T30_PRI_EOP:
5820 /* Wait for a DCN. */
5821 set_phase(s, T30_PHASE_D_RX);
5822 timer_t4_start(s);
5823 break;
5824 default:
5825 span_log(&s->logging, SPAN_LOG_FLOW, "Unknown next rx step - %d\n", s->next_rx_step);
5826 disconnect(s);
5827 break;
5828 }
5829 }
5830 break;
5831 case T30_STATE_II_Q:
5832 case T30_STATE_IV_PPS_NULL:
5833 case T30_STATE_IV_PPS_Q:
5834 case T30_STATE_IV_PPS_RNR:
5835 case T30_STATE_IV_EOR_RNR:
5836 case T30_STATE_F_POST_RCP_RNR:
5837 case T30_STATE_IV_EOR:
5838 case T30_STATE_IV_CTC:
5839 if (s->step == 0)
5840 {
5841 /* Shut down HDLC transmission. */
5842 if (s->send_hdlc_handler)
5843 s->send_hdlc_handler(s->send_hdlc_user_data, NULL, 0);
5844 s->step++;
5845 }
5846 else
5847 {
5848 /* We have finished sending the post image message. Wait for an
5849 acknowledgement. */
5850 set_phase(s, T30_PHASE_D_RX);
5851 timer_t4_start(s);
5852 }
5853 break;
5854 case T30_STATE_B:
5855 /* We have now allowed time for the last message to flush through
5856 the system, so it is safe to report the end of the call. */
5857 if (s->phase_e_handler)
5858 s->phase_e_handler(s, s->phase_e_user_data, s->current_status);
5859 set_state(s, T30_STATE_CALL_FINISHED);
5860 set_phase(s, T30_PHASE_CALL_FINISHED);
5861 release_resources(s);
5862 break;
5863 case T30_STATE_C:
5864 if (s->step == 0)
5865 {
5866 /* Shut down HDLC transmission. */
5867 if (s->send_hdlc_handler)
5868 s->send_hdlc_handler(s->send_hdlc_user_data, NULL, 0);
5869 s->step++;
5870 }
5871 else
5872 {
5873 /* We just sent the disconnect message. Now it is time to disconnect. */
5874 disconnect(s);
5875 }
5876 break;
5877 case T30_STATE_D:
5878 if (send_dcs_sequence(s, FALSE))
5879 {
5880 if ((s->iaf & T30_IAF_MODE_NO_TCF))
5881 {
5882 /* Skip the trainability test */
5883 s->retries = 0;
5884 s->short_train = TRUE;
5885 if (s->error_correcting_mode)
5886 {
5887 set_state(s, T30_STATE_IV);
5888 queue_phase(s, T30_PHASE_C_ECM_TX);
5889 }
5890 else
5891 {
5892 set_state(s, T30_STATE_I);
5893 queue_phase(s, T30_PHASE_C_NON_ECM_TX);
5894 }
5895 }
5896 else
5897 {
5898 /* Do the trainability test */
5899 /* TCF is always sent with long training */
5900 s->short_train = FALSE;
5901 set_state(s, T30_STATE_D_TCF);
5902 set_phase(s, T30_PHASE_C_NON_ECM_TX);
5903 }
5904 }
5905 break;
5906 case T30_STATE_D_TCF:
5907 /* Finished sending training test. Listen for the response. */
5908 set_phase(s, T30_PHASE_B_RX);
5909 timer_t4_start(s);
5910 set_state(s, T30_STATE_D_POST_TCF);
5911 break;
5912 case T30_STATE_I:
5913 /* Send the end of page message */
5914 set_phase(s, T30_PHASE_D_TX);
5915 set_state(s, T30_STATE_II_Q);
5916 /* We might need to resend the page we are on, but we need to check if there
5917 are any more pages to send, so we can send the correct signal right now. */
5918 send_simple_frame(s, s->next_tx_step = check_next_tx_step(s));
5919 break;
5920 case T30_STATE_IV:
5921 /* We have finished sending an FCD frame */
5922 if (s->step == 0)
5923 {
5924 if (send_next_ecm_frame(s))
5925 {
5926 /* Shut down HDLC transmission. */
5927 if (s->send_hdlc_handler)
5928 s->send_hdlc_handler(s->send_hdlc_user_data, NULL, 0);
5929 s->step++;
5930 }
5931 }
5932 else
5933 {
5934 /* Send the end of page or partial page message */
5935 set_phase(s, T30_PHASE_D_TX);
5936 s->next_tx_step = check_next_tx_step(s);
5937 if (send_pps_frame(s) == T30_NULL)
5938 set_state(s, T30_STATE_IV_PPS_NULL);
5939 else
5940 set_state(s, T30_STATE_IV_PPS_Q);
5941 }
5942 break;
5943 case T30_STATE_F_DOC_ECM:
5944 /* This should be the end of a CTR being sent. */
5945 if (s->step == 0)
5946 {
5947 /* Shut down HDLC transmission. */
5948 if (s->send_hdlc_handler)
5949 s->send_hdlc_handler(s->send_hdlc_user_data, NULL, 0);
5950 s->step++;
5951 }
5952 else
5953 {
5954 /* We have finished sending the CTR. Wait for image data again. */
5955 queue_phase(s, T30_PHASE_C_ECM_RX);
5956 timer_t2_start(s);
5957 }
5958 break;
5959 case T30_STATE_CALL_FINISHED:
5960 /* Just ignore anything that happens now. We might get here if a premature
5961 disconnect from the far end overlaps something. */
5962 break;
5963 default:
5964 span_log(&s->logging, SPAN_LOG_FLOW, "Bad state for send complete in t30_front_end_status - %d\n", s->state);
5965 break;
5966 }
5967 break;
5968 case T30_FRONT_END_RECEIVE_COMPLETE:
5969 span_log(&s->logging, SPAN_LOG_FLOW, "Receive complete in phase %s, state %d\n", phase_names[s->phase], s->state);
5970 /* Usually receive complete is notified by a carrier down signal. However,
5971 in cases like a T.38 packet stream dying in the middle of reception
5972 there needs to be a means to stop things. */
5973 switch (s->phase)
5974 {
5975 case T30_PHASE_C_NON_ECM_RX:
5976 t30_non_ecm_rx_status(s, SIG_STATUS_CARRIER_DOWN);
5977 break;
5978 default:
5979 t30_hdlc_rx_status(s, SIG_STATUS_CARRIER_DOWN);
5980 break;
5981 }
5982 break;
5983 case T30_FRONT_END_SIGNAL_PRESENT:
5984 span_log(&s->logging, SPAN_LOG_FLOW, "A signal is present\n");
5985 /* The front end is explicitly telling us the signal we expect is present. This might
5986 be a premature indication from a T.38 implementation, but we have to believe it.
5987 if we don't we can time out improperly. For example, we might get an image modem
5988 carrier signal, but the first HDLC frame might only occur several seconds later.
5989 Many ECM senders idle on HDLC flags while waiting for the paper or filing system
5990 to become ready. T.38 offers no specific indication of correct carrier training, so
5991 if we don't kill the timer on the initial carrier starting signal, we will surely
5992 time out quite often before the next thing we receive. */
5993 switch (s->phase)
5994 {
5995 case T30_PHASE_A_CED:
5996 case T30_PHASE_A_CNG:
5997 case T30_PHASE_B_RX:
5998 case T30_PHASE_D_RX:
5999 /* We are running a V.21 receive modem, where an explicit training indication
6000 will not occur. */
6001 t30_hdlc_rx_status(s, SIG_STATUS_CARRIER_UP);
6002 t30_hdlc_rx_status(s, SIG_STATUS_FRAMING_OK);
6003 break;
6004 default:
6005 /* Cancel any receive timeout, and declare that a receive signal is present,
6006 since the front end is explicitly telling us we have seen something. */
6007 s->rx_signal_present = TRUE;
6008 timer_t2_t4_stop(s);
6009 break;
6010 }
6011 break;
6012 case T30_FRONT_END_SIGNAL_ABSENT:
6013 span_log(&s->logging, SPAN_LOG_FLOW, "No signal is present\n");
6014 /* TODO: Should we do anything here? */
6015 break;
6016 case T30_FRONT_END_CED_PRESENT:
6017 span_log(&s->logging, SPAN_LOG_FLOW, "CED tone is present\n");
6018 /* TODO: Should we do anything here? */
6019 break;
6020 case T30_FRONT_END_CNG_PRESENT:
6021 span_log(&s->logging, SPAN_LOG_FLOW, "CNG tone is present\n");
6022 /* TODO: Should we do anything here? */
6023 break;
6024 }
6025 }
6026 /*- End of function --------------------------------------------------------*/
6027
6028 SPAN_DECLARE(void) t30_timer_update(t30_state_t *s, int samples)
6029 {
6030 int previous;
6031
6032 if (s->timer_t0_t1 > 0)
6033 {
6034 if ((s->timer_t0_t1 -= samples) <= 0)
6035 {
6036 s->timer_t0_t1 = 0;
6037 if (s->far_end_detected)
6038 timer_t1_expired(s);
6039 else
6040 timer_t0_expired(s);
6041 }
6042 }
6043 if (s->timer_t3 > 0)
6044 {
6045 if ((s->timer_t3 -= samples) <= 0)
6046 {
6047 s->timer_t3 = 0;
6048 timer_t3_expired(s);
6049 }
6050 }
6051 if (s->timer_t2_t4 > 0)
6052 {
6053 if ((s->timer_t2_t4 -= samples) <= 0)
6054 {
6055 previous = s->timer_t2_t4_is;
6056 /* Don't allow the count to be left at a small negative number.
6057 It looks cosmetically bad in the logs. */
6058 s->timer_t2_t4 = 0;
6059 s->timer_t2_t4_is = TIMER_IS_IDLE;
6060 switch (previous)
6061 {
6062 case TIMER_IS_T1A:
6063 timer_t1a_expired(s);
6064 break;
6065 case TIMER_IS_T2:
6066 timer_t2_expired(s);
6067 break;
6068 case TIMER_IS_T2A:
6069 timer_t2a_expired(s);
6070 break;
6071 case TIMER_IS_T2B:
6072 timer_t2b_expired(s);
6073 break;
6074 case TIMER_IS_T4:
6075 timer_t4_expired(s);
6076 break;
6077 case TIMER_IS_T4A:
6078 timer_t4a_expired(s);
6079 break;
6080 case TIMER_IS_T4B:
6081 timer_t4b_expired(s);
6082 break;
6083 }
6084 }
6085 }
6086 if (s->timer_t5 > 0)
6087 {
6088 if ((s->timer_t5 -= samples) <= 0)
6089 {
6090 s->timer_t5 = 0;
6091 timer_t5_expired(s);
6092 }
6093 }
6094 }
6095 /*- End of function --------------------------------------------------------*/
6096
6097 SPAN_DECLARE(void) t30_terminate(t30_state_t *s)
6098 {
6099 if (s->phase != T30_PHASE_CALL_FINISHED)
6100 {
6101 /* The far end disconnected early, but was it just a tiny bit too early,
6102 as we were just tidying up, or seriously early as in a failure? */
6103 switch (s->state)
6104 {
6105 case T30_STATE_C:
6106 /* We were sending the final disconnect, so just hussle things along. */
6107 disconnect(s);
6108 break;
6109 case T30_STATE_B:
6110 /* We were in the final wait for everything to flush through, so just
6111 hussle things along. */
6112 break;
6113 default:
6114 /* The call terminated prematurely. */
6115 s->current_status = T30_ERR_CALLDROPPED;
6116 break;
6117 }
6118 if (s->phase_e_handler)
6119 s->phase_e_handler(s, s->phase_e_user_data, s->current_status);
6120 set_state(s, T30_STATE_CALL_FINISHED);
6121 set_phase(s, T30_PHASE_CALL_FINISHED);
6122 release_resources(s);
6123 }
6124 }
6125 /*- End of function --------------------------------------------------------*/
6126
6127 SPAN_DECLARE(void) t30_get_transfer_statistics(t30_state_t *s, t30_stats_t *t)
6128 {
6129 t4_stats_t stats;
6130
6131 t->bit_rate = fallback_sequence[s->current_fallback].bit_rate;
6132 t->error_correcting_mode = s->error_correcting_mode;
6133 t->error_correcting_mode_retries = s->error_correcting_mode_retries;
6134 t4_get_transfer_statistics(&s->t4, &stats);
6135 t->pages_tx = s->tx_page_number;
6136 t->pages_rx = s->rx_page_number;
6137 t->pages_in_file = stats.pages_in_file;
6138 t->width = stats.width;
6139 t->length = stats.length;
6140 t->bad_rows = stats.bad_rows;
6141 t->longest_bad_row_run = stats.longest_bad_row_run;
6142 t->x_resolution = stats.x_resolution;
6143 t->y_resolution = stats.y_resolution;
6144 t->encoding = stats.encoding;
6145 t->image_size = stats.line_image_size;
6146 t->current_status = s->current_status;
6147 #if 0
6148 t->rtn_events = s->rtn_events;
6149 t->rtp_events = s->rtp_events;
6150 #endif
6151 }
6152 /*- End of function --------------------------------------------------------*/
6153
6154 SPAN_DECLARE(void) t30_local_interrupt_request(t30_state_t *s, int state)
6155 {
6156 if (s->timer_t3 > 0)
6157 {
6158 /* Accept the far end's outstanding request for interrupt. */
6159 /* TODO: */
6160 send_simple_frame(s, (state) ? T30_PIP : T30_PIN);
6161 }
6162 s->local_interrupt_pending = state;
6163 }
6164 /*- End of function --------------------------------------------------------*/
6165
6166 SPAN_DECLARE(int) t30_restart(t30_state_t *s)
6167 {
6168 s->phase = T30_PHASE_IDLE;
6169 s->next_phase = T30_PHASE_IDLE;
6170 s->current_fallback = 0;
6171 s->rx_signal_present = FALSE;
6172 s->rx_trained = FALSE;
6173 s->rx_frame_received = FALSE;
6174 s->current_status = T30_ERR_OK;
6175 s->ppr_count = 0;
6176 s->ecm_progress = 0;
6177 s->receiver_not_ready_count = 0;
6178 s->far_dis_dtc_len = 0;
6179 memset(&s->far_dis_dtc_frame, 0, sizeof(s->far_dis_dtc_frame));
6180 t30_build_dis_or_dtc(s);
6181 memset(&s->rx_info, 0, sizeof(s->rx_info));
6182 release_resources(s);
6183 /* The page number is only reset at call establishment */
6184 s->rx_page_number = 0;
6185 s->tx_page_number = 0;
6186 #if 0
6187 s->rtn_events = 0;
6188 s->rtp_events = 0;
6189 #endif
6190 s->far_end_detected = FALSE;
6191 s->timer_t0_t1 = ms_to_samples(DEFAULT_TIMER_T0);
6192 if (s->calling_party)
6193 {
6194 set_state(s, T30_STATE_T);
6195 set_phase(s, T30_PHASE_A_CNG);
6196 }
6197 else
6198 {
6199 set_state(s, T30_STATE_ANSWERING);
6200 set_phase(s, T30_PHASE_A_CED);
6201 }
6202 return 0;
6203 }
6204 /*- End of function --------------------------------------------------------*/
6205
6206 SPAN_DECLARE(t30_state_t *) t30_init(t30_state_t *s,
6207 int calling_party,
6208 t30_set_handler_t *set_rx_type_handler,
6209 void *set_rx_type_user_data,
6210 t30_set_handler_t *set_tx_type_handler,
6211 void *set_tx_type_user_data,
6212 t30_send_hdlc_handler_t *send_hdlc_handler,
6213 void *send_hdlc_user_data)
6214 {
6215 if (s == NULL)
6216 {
6217 if ((s = (t30_state_t *) malloc(sizeof(*s))) == NULL)
6218 return NULL;
6219 }
6220 memset(s, 0, sizeof(*s));
6221 s->calling_party = calling_party;
6222 s->set_rx_type_handler = set_rx_type_handler;
6223 s->set_rx_type_user_data = set_rx_type_user_data;
6224 s->set_tx_type_handler = set_tx_type_handler;
6225 s->set_tx_type_user_data = set_tx_type_user_data;
6226 s->send_hdlc_handler = send_hdlc_handler;
6227 s->send_hdlc_user_data = send_hdlc_user_data;
6228
6229 /* Default to the basic modems. */
6230 s->supported_modems = T30_SUPPORT_V27TER | T30_SUPPORT_V29 | T30_SUPPORT_V17;
6231 s->supported_compressions = T30_SUPPORT_T4_1D_COMPRESSION | T30_SUPPORT_T4_2D_COMPRESSION;
6232 s->supported_resolutions = T30_SUPPORT_STANDARD_RESOLUTION | T30_SUPPORT_FINE_RESOLUTION | T30_SUPPORT_SUPERFINE_RESOLUTION
6233 | T30_SUPPORT_R8_RESOLUTION;
6234 s->supported_image_sizes = T30_SUPPORT_US_LETTER_LENGTH | T30_SUPPORT_US_LEGAL_LENGTH | T30_SUPPORT_UNLIMITED_LENGTH
6235 | T30_SUPPORT_215MM_WIDTH;
6236 /* Set the output encoding to something safe. Most things get 1D and 2D
6237 encoding right. Quite a lot get other things wrong. */
6238 s->output_encoding = T4_COMPRESSION_ITU_T4_2D;
6239 s->local_min_scan_time_code = T30_MIN_SCAN_0MS;
6240 span_log_init(&s->logging, SPAN_LOG_NONE, NULL);
6241 span_log_set_protocol(&s->logging, "T.30");
6242 t30_restart(s);
6243 return s;
6244 }
6245 /*- End of function --------------------------------------------------------*/
6246
6247 SPAN_DECLARE(int) t30_release(t30_state_t *s)
6248 {
6249 /* Make sure any FAX in progress is tidied up. If the tidying up has
6250 already happened, repeating it here is harmless. */
6251 switch (s->operation_in_progress)
6252 {
6253 case OPERATION_IN_PROGRESS_T4_TX:
6254 t4_tx_release(&s->t4);
6255 break;
6256 case OPERATION_IN_PROGRESS_T4_RX:
6257 t4_rx_release(&s->t4);
6258 break;
6259 }
6260 s->operation_in_progress = OPERATION_IN_PROGRESS_NONE;
6261 return 0;
6262 }
6263 /*- End of function --------------------------------------------------------*/
6264
6265 SPAN_DECLARE(int) t30_free(t30_state_t *s)
6266 {
6267 t30_release(s);
6268 free(s);
6269 return 0;
6270 }
6271 /*- End of function --------------------------------------------------------*/
6272
6273 SPAN_DECLARE(int) t30_call_active(t30_state_t *s)
6274 {
6275 return (s->phase != T30_PHASE_CALL_FINISHED);
6276 }
6277 /*- End of function --------------------------------------------------------*/
6278 /*- End of file ------------------------------------------------------------*/

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